Test program done
This commit is contained in:
271
SHAL/Src/STM32H7xx/Peripheral/ADC/SHAL_ADC.cpp
Normal file
271
SHAL/Src/STM32H7xx/Peripheral/ADC/SHAL_ADC.cpp
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@@ -0,0 +1,271 @@
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//
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// Created by Luca on 9/21/2025.
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//
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#include "SHAL_ADC.h"
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#include "SHAL_GPIO.h"
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#include "SHAL_UART.h"
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#include <cstdio>
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bool SHAL_ADC::isValid() const {
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if(m_ADCKey == ADC_Key::INVALID || m_ADCKey == ADC_Key::NUM_ADC){
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return false;
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}
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return true;
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}
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SHAL_Result SHAL_ADC::init(const ADC_Key key, SHAL_ADC_Sample_Mode mode){
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m_ADCKey = key;
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if(!isValid()){
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return SHAL_Result::ERROR;
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}
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auto rcc = getADCRCCEnableRegister(m_ADCKey); //Clock enable
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auto ccr = getADCCommonControl(m_ADCKey);
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SHAL_apply_bitmask(rcc.reg,rcc.mask); //Enable clock
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wakeFromDeepSleep(); //Wake and enable LDO
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//Configure clock source
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SHAL_set_bits(ccr.reg,2,static_cast<uint32_t>(SHAL_ADC_Clock_Mode::SYNC_BY_2),ccr.clock_mode_position); //TODO take as param?
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configureResolution(SHAL_ADC_Resolution::B12); //Configure resolution
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SHAL_apply_bitmask(ccr.reg,ccr.VoltageRefEnable);
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if(calibrate(mode) != SHAL_Result::OKAY){ //Calibrate
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return SHAL_Result::ERROR;
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}
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if(enable() != SHAL_Result::OKAY){
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return SHAL_Result::ERROR;
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}
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return SHAL_Result::OKAY;
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}
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SHAL_Result SHAL_ADC::calibrate(SHAL_ADC_Sample_Mode sampleMode) const {
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const SHAL_ADC_Control_Reg control_reg = getADCControlReg(m_ADCKey);
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if(disable() != SHAL_Result::OKAY){
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return SHAL_Result::ERROR;
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}
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SHAL_set_bits(control_reg.reg, 1, static_cast<uint32_t>(sampleMode), control_reg.sample_mode_offset); //Set sample mode (differential or single ended)
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SHAL_apply_bitmask(control_reg.reg, control_reg.calibration_mask); //Start calibration
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if (!SHAL_wait_for_bit_clear_us(control_reg.reg, control_reg.calibration_mask, 100)) { //Wait for calibration
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return SHAL_Result::ERROR;
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}
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return SHAL_Result::OKAY;
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}
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uint32_t SHAL_ADC::singleConvertSingle(SHAL_ADC_Channel channel, SHAL_ADC_SampleTime time) const {
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auto data_reg = getADCDataReg(m_ADCKey);
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auto ISR_reg = getADCISRReg(m_ADCKey);
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auto sampleTimeReg = getADCChannelSamplingTimeRegister(m_ADCKey, channel);
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SHAL_set_bits(sampleTimeReg.reg, 3, static_cast<uint8_t>(time), sampleTimeReg.channel_offset); //Set sample time
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if(setADCSequenceAmount(1) == SHAL_Result::ERROR) { return 0; } //Set sequence amount to 1
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addADCChannelToSequence(channel, 1);
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startConversion();
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if (!SHAL_wait_for_bit_set_us(ISR_reg.reg, ISR_reg.end_of_conversion_mask, 200)) {
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return 0;
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}
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uint32_t result = *data_reg.reg;
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return result;
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}
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SHAL_Result SHAL_ADC::multiConvertSingle(SHAL_ADC_Channel* channels, int numChannels, uint16_t* result, SHAL_ADC_SampleTime time) {
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auto data_reg = getADCDataReg(m_ADCKey); //Where our output will be stored
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setADCSequenceAmount(numChannels); //Convert the correct amount of channels
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for(int i = 0; i < numChannels; i++){
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auto channel = channels[i];
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auto sampleTimeReg = getADCChannelSamplingTimeRegister(m_ADCKey,channel);
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SHAL_set_bits(sampleTimeReg.reg,3,static_cast<uint8_t>(time),sampleTimeReg.channel_offset); //Set sample time register TODO un-hardcode bit width?
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addADCChannelToSequence(channel,i); //Use index 0 to convert channel
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}
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startConversion(); //Start ADC conversion
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auto ISR_reg = getADCISRReg(m_ADCKey);
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for(int i = 0; i < numChannels; i++) {
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if (!SHAL_WAIT_FOR_CONDITION_US(((*ISR_reg.reg & ISR_reg.end_of_conversion_mask) != 0),500)) { //Wait for conversion
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return SHAL_Result::ERROR; //Failed conversion
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}
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result[i] = *data_reg.reg;
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}
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if (!SHAL_WAIT_FOR_CONDITION_US(((*ISR_reg.reg & ISR_reg.end_of_sequence_mask) != 0),500)) { //Wait for conversion
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return SHAL_Result::ERROR; //Failed sequence
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}
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return SHAL_Result::OKAY;
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}
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SHAL_Result SHAL_ADC::enable() const {
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if(!isValid()){
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return SHAL_Result::ERROR;
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}
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const SHAL_ADC_Control_Reg control_reg = getADCControlReg(m_ADCKey);
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const SHAL_ADC_ISR_Reg ISR_reg = getADCISRReg(m_ADCKey);
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SHAL_apply_bitmask(ISR_reg.reg, ISR_reg.ready_mask); //Clear ready flag (write is correct as per datasheet)
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SHAL_apply_bitmask(control_reg.reg, control_reg.enable_mask); //Enable mask
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if (!SHAL_wait_for_bit_set_us(ISR_reg.reg,ISR_reg.ready_mask,500)) { //Check ADRDY
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return SHAL_Result::ERROR;
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}
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return SHAL_Result::OKAY;
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}
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/// Disables the ADC
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/// @return
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SHAL_Result SHAL_ADC::disable() const {
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if(!isValid()){
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return SHAL_Result::ERROR;
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}
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const auto control_reg = getADCControlReg(m_ADCKey);
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//Stop any ongoing conversion
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if (SHAL_check_bit(control_reg.reg, control_reg.start_mask)) {
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SHAL_apply_bitmask(control_reg.reg, control_reg.stop_mask);
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}
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if (SHAL_check_bit(control_reg.reg,control_reg.enable_mask)) { //DO NOT disable if the ADC is already disabled
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SHAL_apply_bitmask(control_reg.reg, control_reg.disable_mask);
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if (!SHAL_wait_for_bit_clear_ms(control_reg.reg,(control_reg.enable_mask | control_reg.disable_mask),50)) {
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return SHAL_Result::ERROR;
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}
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}
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return SHAL_Result::OKAY;
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}
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SHAL_Result SHAL_ADC::wakeFromDeepSleep() const {
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const SHAL_ADC_Control_Reg control_reg = getADCControlReg(m_ADCKey); //ADC Control register
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const SHAL_ADC_ISR_Reg ISR_reg = getADCISRReg(m_ADCKey);
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SHAL_clear_bitmask(control_reg.reg,control_reg.deep_power_down_mask); //Wake ADC from sleep
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SHAL_apply_bitmask(control_reg.reg,control_reg.voltage_regulator_mask);
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if (!SHAL_wait_for_bit_set_us(ISR_reg.reg,ISR_reg.ldo_ready_mask,50)) { //Wait for LDO
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return SHAL_Result::ERROR;
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}
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return SHAL_Result::OKAY;
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}
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SHAL_Result SHAL_ADC::startConversion() const {
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auto control_reg = getADCControlReg(m_ADCKey);
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SHAL_apply_bitmask(control_reg.reg,control_reg.start_mask);
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return SHAL_Result::OKAY;
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}
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SHAL_Result SHAL_ADC::configureResolution(SHAL_ADC_Resolution resolution) const {
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if(!isValid()){
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return SHAL_Result::ERROR;
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}
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const SHAL_ADC_Config_Reg config_reg = getADCConfigReg(m_ADCKey);
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/*
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SHAL_set_bits(config_reg.reg,2,static_cast<uint8_t>(resolution),config_reg.resolution_offset);
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char buff[20];
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snprintf(buff,16,"CFGR: %lu\r\n", (unsigned long)ADC1->CFGR);
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SHAL_UART3.sendString(buff);
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*/
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SHAL_set_register_value(config_reg.reg, 0);
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return SHAL_Result::OKAY;
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}
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SHAL_Result SHAL_ADC::configureAlignment(SHAL_ADC_Alignment alignment) const {
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if(!isValid()){
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return SHAL_Result::ERROR;
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}
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const SHAL_ADC_Config_Reg config_reg = getADCConfigReg(m_ADCKey);
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//TODO check if this needs to be abstracted (Do other platforms have >2 resolution possibilities?
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SHAL_set_bits(config_reg.reg,1,static_cast<uint8_t>(alignment),config_reg.alignment_offset);
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return SHAL_Result::OKAY;
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}
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SHAL_Result SHAL_ADC::preselectChannel(SHAL_ADC_Channel channel) const {
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auto preselect = getADCPreselectRegister(ADC_Key::S_ADC1, SHAL_ADC_Channel::CH15);
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SHAL_set_bits(preselect.reg,1,1,preselect.channel_offset);
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return SHAL_Result::OKAY;
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}
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SHAL_Result SHAL_ADC::setADCSequenceAmount(uint32_t amount) const {
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if(!isValid()){return SHAL_Result::ERROR;}
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if(amount == 0){
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return SHAL_Result::ERROR;
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}
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SHAL_ADC_Sequence_Amount_Reg sequence_amount_reg = getADCSequenceAmountRegister(m_ADCKey);
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SHAL_set_bits(sequence_amount_reg.reg, 4, amount - 1, 0); //Sequence amount reg is just SQR1 least significant 4 bits, this offset should always be 0
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return SHAL_Result::OKAY;
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}
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SHAL_Result SHAL_ADC::addADCChannelToSequence(SHAL_ADC_Channel channel, const uint32_t conversionNumber) const {
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if(!isValid()) { return SHAL_Result::ERROR; }
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auto sqr = getADCSequenceRegister(m_ADCKey, conversionNumber);
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auto channelNum = static_cast<uint8_t>(channel);
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SHAL_wait_for_bit_clear_ms(&ADC1->CR,ADC_CR_ADSTART,50);
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SHAL_set_bits(sqr.reg, 5, channelNum, sqr.sequence_offset); //Set regular sequence register
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return SHAL_Result::OKAY;
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}
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SHAL_ADC &ADCManager::get(ADC_Key key) {
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return m_ADCs[static_cast<uint8_t>(key)];
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}
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SHAL_ADC& ADCManager::getByIndex(int index) {
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if(index < static_cast<int>(ADC_Key::NUM_ADC)){
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return m_ADCs[index];
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}
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return m_ADCs[0];
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}
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@@ -18,44 +18,46 @@ SHAL_GPIO::SHAL_GPIO(GPIO_Key key) : m_GPIO_KEY(key) {
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SHAL_apply_bitmask(GPIORCCEnable.reg,GPIORCCEnable.mask);
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}
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void SHAL_GPIO::setLow() {
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void SHAL_GPIO::setLow() const {
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auto outputDataReg = getGPIOOutputDataRegister(m_GPIO_KEY);
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SHAL_set_bits(outputDataReg.reg,1,0,outputDataReg.offset);
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}
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void SHAL_GPIO::setHigh() {
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void SHAL_GPIO::setHigh() const {
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auto outputDataReg = getGPIOOutputDataRegister(m_GPIO_KEY);
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SHAL_set_bits(outputDataReg.reg,1,1,outputDataReg.offset);
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}
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void SHAL_GPIO::toggle() volatile {
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void SHAL_GPIO::toggle() const volatile {
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auto outputDataReg = getGPIOOutputDataRegister(m_GPIO_KEY);
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SHAL_flip_bits(outputDataReg.reg,1,outputDataReg.offset);
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}
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void SHAL_GPIO::setOutputType(PinType type) volatile {
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void SHAL_GPIO::setOutputType(PinType type) const volatile {
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auto outputTypeReg = getGPIOOutputTypeRegister(m_GPIO_KEY);
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SHAL_set_bits(outputTypeReg.reg,2,static_cast<uint8_t>(type),outputTypeReg.offset);
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}
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void SHAL_GPIO::setOutputSpeed(OutputSpeed speed) volatile {
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void SHAL_GPIO::setOutputSpeed(OutputSpeed speed) const volatile {
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auto outputSpeedReg = getGPIOOutputSpeedRegister(m_GPIO_KEY);
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SHAL_set_bits(outputSpeedReg.reg,2,static_cast<uint8_t>(speed),outputSpeedReg.offset);
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}
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void SHAL_GPIO::setInternalResistor(InternalResistorType type) volatile {
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void SHAL_GPIO::setInternalResistor(InternalResistorType type) const volatile {
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auto pupdreg = getGPIOPUPDRegister(m_GPIO_KEY);
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SHAL_set_bits(pupdreg.reg,2,static_cast<uint8_t>(type),pupdreg.offset);
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}
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void SHAL_GPIO::setAlternateFunction(GPIO_Alternate_Function AF) volatile {
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void SHAL_GPIO::setAlternateFunction(GPIO_Alternate_Function AF) const volatile {
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auto alternateFunctionReg = getGPIOAlternateFunctionRegister(m_GPIO_KEY);
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SHAL_set_bits(alternateFunctionReg.reg,4,static_cast<uint8_t>(AF),alternateFunctionReg.offset);
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}
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SHAL_Result SHAL_GPIO::setPinMode(PinMode mode) volatile {
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SHAL_Result SHAL_GPIO::setPinMode(PinMode mode) const volatile {
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auto pinModeReg = getGPIOModeRegister(m_GPIO_KEY);
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GPIOManager::initGPIO(m_GPIO_KEY);
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/*
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if(mode == PinMode::ANALOG_MODE && getGPIOPortInfo(m_GPIO_KEY).ADCChannel == SHAL_ADC_Channel::NO_ADC_MAPPING){
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char buff[100];
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@@ -69,6 +71,12 @@ SHAL_Result SHAL_GPIO::setPinMode(PinMode mode) volatile {
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return SHAL_Result::OKAY;
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}
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uint16_t SHAL_GPIO::digitalRead() const {
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auto offset = getGPIOPinNumber(m_GPIO_KEY);
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return (SHAL_check_bit(getGPIOInputDataRegister(m_GPIO_KEY).reg, 1 << offset)) ? 1 : 0;
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}
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/* TODO Fix implementation for STM32F072
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void SHAL_GPIO::useAsExternalInterrupt(TriggerMode mode, EXTICallback callback) {
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@@ -116,10 +124,20 @@ uint16_t SHAL_GPIO::analogRead(SHAL_ADC_SampleTime sampleTime) {
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SHAL_ADC_Channel channel = getGPIOPortInfo(m_GPIO_KEY).ADCChannel;
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return GPIOManager::getGPIOADC().singleConvertSingle(channel,sampleTime);
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return GPIOManager::getGPIOADC().singleConvertSingle(channel,sampleTime);
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}
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*/
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SHAL_GPIO& GPIOManager::get(GPIO_Key key) {
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SHAL_GPIO& GPIOManager::get(const uint8_t portNum, const uint8_t pinNum) {
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uint8_t pinIndex = (PINS_PER_PORT * portNum) + pinNum;
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initGPIO(static_cast<GPIO_Key>(pinIndex));
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return m_gpios[portNum][pinNum];
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}
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void GPIOManager::initGPIO(GPIO_Key key) {
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unsigned int gpioPort = getGPIOPortNumber(key);
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uint8_t gpioPin = getGPIOPinNumber(key);
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@@ -127,6 +145,12 @@ SHAL_GPIO& GPIOManager::get(GPIO_Key key) {
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if (m_gpios[gpioPort][gpioPin].m_GPIO_KEY == GPIO_Key::INVALID){
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m_gpios[gpioPort][gpioPin] = SHAL_GPIO(key);
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}
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return m_gpios[gpioPort][gpioPin];
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}
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SHAL_GPIO& GPIOManager::get(const GPIO_Key key) {
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initGPIO(key);
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return m_gpios[getGPIOPortNumber(key)][getGPIOPinNumber(key)];
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}
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@@ -14,49 +14,56 @@ Timer::Timer() : m_key(Timer_Key::S_TIM_INVALID){
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}
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void Timer::start() {
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auto control_reg = getTimerControlRegister1(m_key);
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auto event_reg = getTimerEventGenerationRegister(m_key);
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auto status_reg = getTimerStatusRegister(m_key);
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auto bdtr_reg = getTimerBreakDeadTimeRegister(m_key);
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auto rcc_reg = getTimerRCC(m_key);
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auto control_reg = getTimerControlRegister1(m_key);
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auto event_generation_reg = getTimerEventGenerationRegister(m_key);
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auto status_reg = getTimerStatusRegister(m_key);
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auto break_time_dead_reg = getTimerBreakDeadTimeRegister(m_key);
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SHAL_apply_bitmask(event_reg.reg, event_reg.update_generation_mask);
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SHAL_clear_bitmask(status_reg.reg, status_reg.update_interrupt_flag_mask);
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auto rcc_reg = getTimerRCC(m_key);
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SHAL_apply_bitmask(control_reg.reg, control_reg.auto_reload_preload_enable_mask);
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SHAL_apply_bitmask(control_reg.reg, control_reg.counter_enable_mask); //Enable counter
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SHAL_apply_bitmask(control_reg.reg, control_reg.auto_reload_preload_enable_mask); //Preload enable (buffer)
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SHAL_apply_bitmask(event_generation_reg.reg, event_generation_reg.update_generation_mask);
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SHAL_clear_bitmask(status_reg.reg,status_reg.update_interrupt_flag_mask);
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SHAL_apply_bitmask(rcc_reg.reg,rcc_reg.enable_mask);
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SHAL_apply_bitmask(break_time_dead_reg.reg,break_time_dead_reg.main_output_enable_mask);
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SHAL_apply_bitmask(rcc_reg.reg, rcc_reg.enable_mask);
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SHAL_apply_bitmask(control_reg.reg, control_reg.counter_enable_mask);
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SHAL_apply_bitmask(bdtr_reg.reg, bdtr_reg.main_output_enable_mask);
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enableInterrupt();
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}
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void Timer::stop() const {
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auto rcc_reg = getTimerRCC(m_key);
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auto control_reg = getTimerControlRegister1(m_key);
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SHAL_clear_bitmask(rcc_reg.reg,rcc_reg.enable_mask);
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SHAL_clear_bitmask(control_reg.reg, control_reg.counter_enable_mask);
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getTimerRegister(m_key)->CNT = 0;
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// Force an update event to flush shadow registers NOW
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auto event_reg = getTimerEventGenerationRegister(m_key);
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SHAL_apply_bitmask(event_reg.reg, event_reg.update_generation_mask);
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|
||||
auto rcc_reg = getTimerRCC(m_key);
|
||||
SHAL_clear_bitmask(rcc_reg.reg, rcc_reg.enable_mask);
|
||||
}
|
||||
|
||||
void Timer::setPrescaler(const uint16_t presc) const {
|
||||
void Timer::setPrescaler(const uint32_t presc) const {
|
||||
auto prescalerReg = getTimerPrescalerRegister(m_key);
|
||||
|
||||
SHAL_set_bits(prescalerReg.reg,16,presc,0);
|
||||
SHAL_set_register_value(prescalerReg.reg,presc);
|
||||
}
|
||||
|
||||
void Timer::setARR(const uint16_t arr) const {
|
||||
void Timer::setARR(const uint32_t arr) const {
|
||||
auto autoReloadReg = getTimerAutoReloadRegister(m_key);
|
||||
|
||||
SHAL_set_bits(autoReloadReg.reg,16,arr,0);}
|
||||
SHAL_set_register_value(autoReloadReg.reg,arr);
|
||||
}
|
||||
|
||||
void Timer::enableInterrupt() {
|
||||
getTimerRegister(m_key)->DIER |= TIM_DIER_UIE;
|
||||
NVIC_EnableIRQ(getIRQn(m_key));
|
||||
}
|
||||
|
||||
void Timer::init(uint16_t prescaler, uint16_t autoReload) {
|
||||
void Timer::init(uint32_t prescaler, uint32_t autoReload) {
|
||||
SHAL_TIM_RCC_Register rcc = getTimerRCC(m_key);
|
||||
|
||||
SHAL_apply_bitmask(rcc.reg,rcc.enable_mask);
|
||||
@@ -65,18 +72,23 @@ void Timer::init(uint16_t prescaler, uint16_t autoReload) {
|
||||
setARR(autoReload);
|
||||
}
|
||||
|
||||
void Timer::configurePWM(SHAL_Timer_Channel channel, uint16_t prescaler, uint16_t autoReload, uint16_t captureCompareThreshold) {
|
||||
void Timer::init() const {
|
||||
SHAL_TIM_RCC_Register rcc = getTimerRCC(m_key);
|
||||
|
||||
SHAL_apply_bitmask(rcc.reg,rcc.enable_mask);
|
||||
}
|
||||
|
||||
void Timer::configurePWM(SHAL_Timer_Channel channel, uint32_t prescaler, uint32_t autoReload, uint32_t captureCompareThreshold) {
|
||||
|
||||
setPrescaler(prescaler);
|
||||
setARR(autoReload);
|
||||
setCaptureCompareValue(channel, captureCompareThreshold);
|
||||
|
||||
setOutputCompareMode(channel, SHAL_TIM_Output_Compare_Mode::PWMMode1);
|
||||
enableChannel(channel,SHAL_Timer_Channel_Main_Output_Mode::Polarity_Normal,SHAL_Timer_Channel_Complimentary_Output_Mode::Disabled);
|
||||
|
||||
setCaptureCompareValue(channel, captureCompareThreshold);
|
||||
}
|
||||
|
||||
void Timer::configureOneshot(SHAL_Timer_Channel channel, uint16_t prescaler, uint16_t autoReload, uint16_t captureCompareThreshold) {
|
||||
void Timer::configureOneshot(SHAL_Timer_Channel channel, uint32_t prescaler, uint32_t autoReload, uint32_t captureCompareThreshold) {
|
||||
|
||||
setPrescaler(prescaler);
|
||||
setARR(autoReload);
|
||||
@@ -111,13 +123,13 @@ void Timer::enableChannel(SHAL_Timer_Channel channel, SHAL_Timer_Channel_Main_Ou
|
||||
setValue |= (static_cast<uint8_t>(mainOutputMode) << ((channelNum - 1) * channelStride)); //xxBB shifted by c - 1
|
||||
setValue |= (static_cast<uint8_t>(complimentaryOutputMode) << (((channelNum - 1) * channelStride) + 2)); //BBxx shifted by c - 1
|
||||
|
||||
SHAL_set_bits(captureCompareEnableReg.reg,16,setValue,0);
|
||||
SHAL_set_register_value(captureCompareEnableReg.reg,setValue);
|
||||
}
|
||||
|
||||
void Timer::setCaptureCompareValue(SHAL_Timer_Channel channel, uint16_t value) {
|
||||
void Timer::setCaptureCompareValue(SHAL_Timer_Channel channel, uint32_t value) const {
|
||||
auto captureCompareReg = getTimerCaptureCompareRegister(m_key,channel);
|
||||
|
||||
SHAL_set_bits(captureCompareReg.reg,16,value,0);
|
||||
SHAL_set_register_value(captureCompareReg.reg,value);
|
||||
}
|
||||
|
||||
|
||||
|
||||
@@ -45,6 +45,9 @@ void SHAL_UART::begin(uint32_t baudRate, SHAL_USART_Word_Length wordLength) cons
|
||||
SHAL_apply_bitmask(CR.reg, static_cast<uint32_t>(wordLength));
|
||||
SHAL_apply_bitmask(CR.reg, CR.receive_enable_mask);
|
||||
SHAL_apply_bitmask(CR.reg, CR.transmit_enable_mask);
|
||||
SHAL_apply_bitmask(CR.reg, CR.Rx_interrupt_enable_mask);
|
||||
|
||||
SHAL_set_register_value(getUARTTransmitDataRegister(m_key).reg,0); //Clear TDR
|
||||
|
||||
uint16_t baud = SystemCoreClock / (1 * baudRate);
|
||||
SHAL_set_bits_16(BRR.reg, 16, baud, 0);
|
||||
@@ -52,34 +55,23 @@ void SHAL_UART::begin(uint32_t baudRate, SHAL_USART_Word_Length wordLength) cons
|
||||
SHAL_apply_bitmask(CR.reg, CR.usart_enable_mask); //Enable
|
||||
}
|
||||
|
||||
void SHAL_UART::sendString(const char *s) volatile {
|
||||
void SHAL_UART::sendString(const char *s) const volatile {
|
||||
const auto ISR = getUARTISR(m_key);
|
||||
|
||||
while (*s) sendChar(*s++); //Send chars while we haven't reached end of s
|
||||
|
||||
if(!SHAL_WAIT_FOR_CONDITION_US((*ISR.reg & ISR.transmission_complete_mask) != 0, 1000)){
|
||||
if (!SHAL_wait_for_bit_set_us(ISR.reg, ISR.transmit_data_register_empty_mask, 500)) {
|
||||
assert(false);
|
||||
}
|
||||
}
|
||||
|
||||
void SHAL_UART::sendChar(char c) volatile {
|
||||
void SHAL_UART::sendChar(const char c) const volatile {
|
||||
|
||||
/* TODO fix old
|
||||
auto ISR = getUARTISR(m_key);
|
||||
const auto ISR = getUARTISR(m_key);
|
||||
|
||||
if(!SHAL_WAIT_FOR_CONDITION_US((*ISR.reg & ISR.transmit_data_register_empty_mask) == 0, 20)){ //TODO check if this is too slow for this? Need to check busy reg
|
||||
assert(false);
|
||||
}
|
||||
SHAL_wait_for_bit_set_us(ISR.reg,ISR.transmit_data_register_empty_mask,500);
|
||||
|
||||
|
||||
*getUARTTransmitDataRegister(m_key).reg = c; //Send character
|
||||
*/
|
||||
/* Wait until TXE (Transmit Data Register Empty) */
|
||||
while (!(USART3->ISR & USART_ISR_TXE_TXFNF))
|
||||
{
|
||||
/* spin */
|
||||
}
|
||||
USART3->TDR = (uint32_t)(uint8_t)c;
|
||||
SHAL_set_register_value(getUARTTransmitDataRegister(m_key).reg,static_cast<uint32_t>(c));
|
||||
}
|
||||
|
||||
|
||||
|
||||
Reference in New Issue
Block a user