Test program done

This commit is contained in:
Luca Lizaranzu
2026-03-20 11:41:44 -07:00
parent 303a554595
commit 1b29371fff
20 changed files with 1037 additions and 114 deletions

View File

@@ -45,6 +45,9 @@ void SHAL_UART::begin(uint32_t baudRate, SHAL_USART_Word_Length wordLength) cons
SHAL_apply_bitmask(CR.reg, static_cast<uint32_t>(wordLength));
SHAL_apply_bitmask(CR.reg, CR.receive_enable_mask);
SHAL_apply_bitmask(CR.reg, CR.transmit_enable_mask);
SHAL_apply_bitmask(CR.reg, CR.Rx_interrupt_enable_mask);
SHAL_set_register_value(getUARTTransmitDataRegister(m_key).reg,0); //Clear TDR
uint16_t baud = SystemCoreClock / (1 * baudRate);
SHAL_set_bits_16(BRR.reg, 16, baud, 0);
@@ -52,34 +55,23 @@ void SHAL_UART::begin(uint32_t baudRate, SHAL_USART_Word_Length wordLength) cons
SHAL_apply_bitmask(CR.reg, CR.usart_enable_mask); //Enable
}
void SHAL_UART::sendString(const char *s) volatile {
void SHAL_UART::sendString(const char *s) const volatile {
const auto ISR = getUARTISR(m_key);
while (*s) sendChar(*s++); //Send chars while we haven't reached end of s
if(!SHAL_WAIT_FOR_CONDITION_US((*ISR.reg & ISR.transmission_complete_mask) != 0, 1000)){
if (!SHAL_wait_for_bit_set_us(ISR.reg, ISR.transmit_data_register_empty_mask, 500)) {
assert(false);
}
}
void SHAL_UART::sendChar(char c) volatile {
void SHAL_UART::sendChar(const char c) const volatile {
/* TODO fix old
auto ISR = getUARTISR(m_key);
const auto ISR = getUARTISR(m_key);
if(!SHAL_WAIT_FOR_CONDITION_US((*ISR.reg & ISR.transmit_data_register_empty_mask) == 0, 20)){ //TODO check if this is too slow for this? Need to check busy reg
assert(false);
}
SHAL_wait_for_bit_set_us(ISR.reg,ISR.transmit_data_register_empty_mask,500);
*getUARTTransmitDataRegister(m_key).reg = c; //Send character
*/
/* Wait until TXE (Transmit Data Register Empty) */
while (!(USART3->ISR & USART_ISR_TXE_TXFNF))
{
/* spin */
}
USART3->TDR = (uint32_t)(uint8_t)c;
SHAL_set_register_value(getUARTTransmitDataRegister(m_key).reg,static_cast<uint32_t>(c));
}