Changed SHAL_Peripheral to take in a void* of any peripheral struct, and added SHAL_Peripheral_Register for individual registers
This commit is contained in:
@@ -467,7 +467,7 @@ typedef struct
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__IO uint32_t CR; /*!< RTC control register, Address offset: 0x08 */
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__IO uint32_t ISR; /*!< RTC initialization and status register, Address offset: 0x0C */
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__IO uint32_t PRER; /*!< RTC prescaler register, Address offset: 0x10 */
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__IO uint32_t WUTR; /*!< RTC wakeup timer register, Address offset: 0x14 */
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__IO uint32_t WUTR; /*!< RTC wakeup TIMER_KEY register, Address offset: 0x14 */
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uint32_t RESERVED1; /*!< Reserved, Address offset: 0x18 */
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__IO uint32_t ALRMAR; /*!< RTC alarm A register, Address offset: 0x1C */
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uint32_t RESERVED2; /*!< Reserved, Address offset: 0x20 */
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@@ -14,6 +14,11 @@
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//Universal structs and defines ---------------------------
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struct SHAL_Peripheral {
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void* registers;
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unsigned long global_offset;
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};
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struct SHAL_Peripheral_Register {
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volatile uint32_t* reg;
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unsigned long offset;
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};
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@@ -8,6 +8,8 @@
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#include <stm32f072xb.h>
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#include <cassert>
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#include "SHAL_CORE.h"
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#define AVAILABLE_GPIO \
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X(A0) X(A1) X(A2) X(A3) X(A4) X(A5) X(A6) X(A7) X(A8) X(A9) X(A10) X(A11) X(A12) X(A13) X(A14) X(A15) \
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X(B0) X(B1) X(B2) X(B3) X(B4) X(B5) X(B6) X(B7) X(B8) X(B9) X(B10) X(B11) X(B12) X(B13) X(B14) X(B15) \
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@@ -22,63 +24,61 @@ enum class GPIO_Key {
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INVALID
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};
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constexpr volatile GPIO_TypeDef* getGPIORegister(GPIO_Key g) {
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constexpr SHAL_Peripheral getGPIORegister(const GPIO_Key g){
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switch(g) {
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case GPIO_Key::A0:
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case GPIO_Key::A1:
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case GPIO_Key::A2:
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case GPIO_Key::A3:
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case GPIO_Key::A4:
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case GPIO_Key::A5:
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case GPIO_Key::A6:
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case GPIO_Key::A7:
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case GPIO_Key::A8:
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case GPIO_Key::A9:
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case GPIO_Key::A10:
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case GPIO_Key::A11:
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case GPIO_Key::A12:
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case GPIO_Key::A13:
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case GPIO_Key::A14:
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case GPIO_Key::A15:
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return GPIOA;
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case GPIO_Key::B0:
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case GPIO_Key::B1:
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case GPIO_Key::B2:
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case GPIO_Key::B3:
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case GPIO_Key::B4:
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case GPIO_Key::B5:
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case GPIO_Key::B6:
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case GPIO_Key::B7:
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case GPIO_Key::B8:
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case GPIO_Key::B9:
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case GPIO_Key::B10:
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case GPIO_Key::B11:
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case GPIO_Key::B12:
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case GPIO_Key::B13:
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case GPIO_Key::B14:
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case GPIO_Key::B15:
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return GPIOB;
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case GPIO_Key::C0:
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case GPIO_Key::C1:
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case GPIO_Key::C2:
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case GPIO_Key::C3:
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case GPIO_Key::C4:
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case GPIO_Key::C5:
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case GPIO_Key::C6:
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case GPIO_Key::C7:
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case GPIO_Key::C8:
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case GPIO_Key::C9:
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case GPIO_Key::C10:
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case GPIO_Key::C11:
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case GPIO_Key::C12:
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case GPIO_Key::C13:
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case GPIO_Key::C14:
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case GPIO_Key::C15:
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return GPIOC;
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case GPIO_Key::A0: return {GPIOA,0};
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case GPIO_Key::A1: return {GPIOA,1};
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case GPIO_Key::A2: return {GPIOA,2};
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case GPIO_Key::A3: return {GPIOA,3};
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case GPIO_Key::A4: return {GPIOA,4};
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case GPIO_Key::A5: return {GPIOA,5};
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case GPIO_Key::A6: return {GPIOA,6};
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case GPIO_Key::A7: return {GPIOA,7};
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case GPIO_Key::A8: return {GPIOA,8};
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case GPIO_Key::A9: return {GPIOA,9};
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case GPIO_Key::A10: return {GPIOA,10};
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case GPIO_Key::A11: return {GPIOA,11};
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case GPIO_Key::A12: return {GPIOA,12};
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case GPIO_Key::A13: return {GPIOA,13};
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case GPIO_Key::A14: return {GPIOA,14};
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case GPIO_Key::A15: return {GPIOA,15};
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case GPIO_Key::B0: return {GPIOB,0};
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case GPIO_Key::B1: return {GPIOB,1};
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case GPIO_Key::B2: return {GPIOB,2};
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case GPIO_Key::B3: return {GPIOB,3};
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case GPIO_Key::B4: return {GPIOB,4};
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case GPIO_Key::B5: return {GPIOB,5};
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case GPIO_Key::B6: return {GPIOB,6};
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case GPIO_Key::B7: return {GPIOB,7};
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case GPIO_Key::B8: return {GPIOB,8};
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case GPIO_Key::B9: return {GPIOB,9};
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case GPIO_Key::B10: return {GPIOB,10};
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case GPIO_Key::B11: return {GPIOB,11};
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case GPIO_Key::B12: return {GPIOB,12};
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case GPIO_Key::B13: return {GPIOB,13};
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case GPIO_Key::B14: return {GPIOB,14};
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case GPIO_Key::B15: return {GPIOB,15};
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case GPIO_Key::C0: return {GPIOC,0};
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case GPIO_Key::C1: return {GPIOC,1};
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case GPIO_Key::C2: return {GPIOC,2};
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case GPIO_Key::C3: return {GPIOC,3};
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case GPIO_Key::C4: return {GPIOC,4};
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case GPIO_Key::C5: return {GPIOC,5};
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case GPIO_Key::C6: return {GPIOC,6};
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case GPIO_Key::C7: return {GPIOC,7};
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case GPIO_Key::C8: return {GPIOC,8};
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case GPIO_Key::C9: return {GPIOC,9};
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case GPIO_Key::C10: return {GPIOC,10};
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case GPIO_Key::C11: return {GPIOC,11};
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case GPIO_Key::C12: return {GPIOC,12};
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case GPIO_Key::C13: return {GPIOC,13};
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case GPIO_Key::C14: return {GPIOC,14};
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case GPIO_Key::C15: return {GPIOC,15};
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case GPIO_Key::INVALID:
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case GPIO_Key::NUM_GPIO:
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assert(false);
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return nullptr; //Unreachable
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return SHAL_Peripheral(nullptr,0); //Unreachable
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}
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__builtin_unreachable();
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}
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@@ -8,6 +8,38 @@
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#include "SHAL_CORE.h"
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#include <cassert>
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#include <stm32f072xb.h>
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#include "SHAL_GPIO_REG_F072xB.h"
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enum class PinMode {
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INPUT_MODE = 0b00,
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OUTPUT_MODE = 0b01,
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ALTERNATE_FUNCTION_MODE = 0b10,
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ANALOG_MODE = 0b11
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};
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enum class PinValue {
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HI = 1,
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LOW = 0,
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};
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class GPIO{
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public:
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void toggle();
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//TODO replace stupid offset hack from APB
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void setHigh();
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void setLow();
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private:
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friend class GPIOManager;
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explicit GPIO(GPIO_Key key);
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GPIO();
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GPIO_Key GPIO_KEY;
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};
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#endif //SHMINGO_HAL_SHAL_GPIO_H
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@@ -29,8 +29,8 @@ enum class Timer_Key { //For STM32F072
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};
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//Get timer peripheral struct including bus register, enable mask, timer mask
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constexpr SHAL_Peripheral getTimerRCC(Timer_Key t) {
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//Get TIMER_KEY peripheral struct including bus register, enable mask, TIMER_KEY mask
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constexpr SHAL_Peripheral_Register getTimerRCC(Timer_Key t) {
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switch(t) {
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case Timer_Key::S_TIM1: return {&RCC->APB2ENR, RCC_APB2ENR_TIM1EN_Pos};
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case Timer_Key::S_TIM2: return {&RCC->APB1ENR, RCC_APB1ENR_TIM2EN_Pos};
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@@ -2,7 +2,7 @@
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******************************************************************************
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* @file SHAL_TIM.h
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* @author Luca Lizaranzu
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* @brief Declarations of timer related objects
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* @brief Declarations of TIMER_KEY related objects
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******************************************************************************
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*/
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@@ -33,9 +33,9 @@ public:
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//Enable interrupts
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void enableInterrupt();
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//Set timer IRQ callback function
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//Set TIMER_KEY IRQ callback function
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void setCallbackFunc(TimerCallback callback){
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registerTimerCallback(timer, callback);
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registerTimerCallback(TIMER_KEY, callback);
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}
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private:
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@@ -43,8 +43,7 @@ private:
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explicit Timer(Timer_Key t);
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Timer();
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Timer_Key timer;
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volatile TIM_TypeDef* timer_reg;
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Timer_Key TIMER_KEY;
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};
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@@ -2,8 +2,8 @@
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******************************************************************************
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* @file SHAL.h
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* @author Luca Lizaranzu
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* @brief Utilities for creating and populating the timer IRQ callback table
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* globally, see usage in SHAL_TIM.h. Created in use for singleton timer abstractions
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* @brief Utilities for creating and populating the TIMER_KEY IRQ callback table
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* globally, see usage in SHAL_TIM.h. Created in use for singleton TIMER_KEY abstractions
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******************************************************************************
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*/
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25
SHAL/Src/Peripheral/GPIO/SHAL_GPIO.cpp
Normal file
25
SHAL/Src/Peripheral/GPIO/SHAL_GPIO.cpp
Normal file
@@ -0,0 +1,25 @@
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//
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// Created by Luca on 8/30/2025.
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//
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#include "SHAL_GPIO.h"
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GPIO::GPIO() {
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}
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GPIO::GPIO(GPIO_Key key) {
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}
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void GPIO::setLow() {
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getGPIORegister(GPIO_KEY)->ODR &= ~(1 << getGPIOAPB(GPIO_KEY).offset);
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}
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void GPIO::setHigh() {
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getGPIORegister(GPIO_KEY)->ODR |= (1 << getGPIOAPB(GPIO_KEY).offset);
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}
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void GPIO::toggle() {
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}
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@@ -5,36 +5,36 @@
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#include "SHAL_TIM.h"
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#include <cassert>
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Timer::Timer(Timer_Key t) : timer(t), timer_reg(getTimerRegister(t)){
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SHAL_Peripheral rcc = getTimerRCC(timer);
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Timer::Timer(Timer_Key t) : TIMER_KEY(t){
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SHAL_Peripheral_Register rcc = getTimerRCC(TIMER_KEY);
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*rcc.reg |= (1 << rcc.offset);
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}
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Timer::Timer() : timer(Timer_Key::S_TIM_INVALID), timer_reg(nullptr){
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Timer::Timer() : TIMER_KEY(Timer_Key::S_TIM_INVALID){
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}
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void Timer::start() {
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timer_reg->CR1 |= TIM_CR1_CEN;
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timer_reg->EGR |= TIM_EGR_UG; //load prescaler reg and ARR
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getTimerRegister(TIMER_KEY)->CR1 |= TIM_CR1_CEN;
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getTimerRegister(TIMER_KEY)->EGR |= TIM_EGR_UG; //load prescaler reg and ARR
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enableInterrupt();
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}
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void Timer::stop() {
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timer_reg->CR1 &= ~TIM_CR1_CEN;
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getTimerRegister(TIMER_KEY)->CR1 &= ~TIM_CR1_CEN;
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}
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void Timer::setPrescaler(uint16_t presc) {
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timer_reg->PSC = presc;
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getTimerRegister(TIMER_KEY)->PSC = presc;
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}
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void Timer::setARR(uint16_t arr) {
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timer_reg->ARR = arr;
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getTimerRegister(TIMER_KEY)->ARR = arr;
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}
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void Timer::enableInterrupt() {
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timer_reg->DIER |= TIM_DIER_UIE;
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NVIC_EnableIRQ(getIRQn(timer));
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getTimerRegister(TIMER_KEY)->DIER |= TIM_DIER_UIE;
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NVIC_EnableIRQ(getIRQn(TIMER_KEY));
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}
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@@ -46,8 +46,8 @@ Timer &TimerManager::get(Timer_Key timer_key) {
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Timer& selected = timers[static_cast<int>(timer_key)];
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//Timer queried is not initialized yet (defaults to invalid)
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if(selected.timer == Timer_Key::S_TIM_INVALID){
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timers[static_cast<int>(timer_key)] = Timer(timer_key); //Initialize timer
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if(selected.TIMER_KEY == Timer_Key::S_TIM_INVALID){
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timers[static_cast<int>(timer_key)] = Timer(timer_key); //Initialize TIMER_KEY
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}
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return timers[static_cast<int>(timer_key)];
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@@ -12,7 +12,7 @@
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*
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* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
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* by the user application to setup the SysTick
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* timer or configure other parameters.
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* TIMER_KEY or configure other parameters.
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*
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* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
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* be called whenever the core clock is changed
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@@ -136,7 +136,7 @@ void SystemInit(void)
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/**
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* @brief Update SystemCoreClock variable according to Clock Register Values.
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* The SystemCoreClock variable contains the core clock (HCLK), it can
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* be used by the user application to setup the SysTick timer or configure
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* be used by the user application to setup the SysTick TIMER_KEY or configure
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* other parameters.
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*
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* @note Each time the core clock (HCLK) changes, this function must be called
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