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@@ -45,8 +45,8 @@
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* @brief Configuration of the Cortex-M4 Processor and Core Peripherals
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*/
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#define __CM4_REV 0x0001U /*!< Cortex-M4 revision r0p1 */
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#define __MPU_PRESENT 1U /*!< STM32L4XX provides an MPU */
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#define __NVIC_PRIO_BITS 4U /*!< STM32L4XX uses 4 Bits for the Priority Levels */
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#define __MPU_PRESENT 1U /*!< STM32L4xx provides an MPU */
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#define __NVIC_PRIO_BITS 4U /*!< STM32L4xx uses 4 Bits for the Priority Levels */
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#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */
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#define __FPU_PRESENT 1U /*!< FPU present */
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@@ -59,7 +59,7 @@
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*/
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/**
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* @brief STM32L4XX Interrupt Number Definition, according to the selected device
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* @brief STM32L4xx Interrupt Number Definition, according to the selected device
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* in @ref Library_configuration_section
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*/
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typedef enum
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