lucalizaranzu/Shmingo-HAL
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Bare functionality finished for basic GPIO pin abstraction

Browse Source
This commit is contained in:
Luca Lizaranzu
2025-09-02 00:12:08 -07:00
parent db75c06c90
commit 35bc902187
6 changed files with 37 additions and 40 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h
View File

@@ -7875,7 +7875,7 @@ typedef struct
#define RCC_AHBENR_GPIOEEN RCC_AHBENR_GPIOEEN_Msk /*!< GPIOE clock enable */
#define RCC_AHBENR_GPIOFEN_Pos (22U)
#define RCC_AHBENR_GPIOFEN_Msk (0x1UL << RCC_AHBENR_GPIOFEN_Pos) /*!< 0x00400000 */
#define RCC_AHBENR_GPIOFEN RCC_AHBENR_GPIOFEN_Msk /*!< GPIOF clock enable */RCC_AHBENR_GPIOAEN
#define RCC_AHBENR_GPIOFEN RCC_AHBENR_GPIOFEN_Msk /*!< GPIOF clock enable */
#define RCC_AHBENR_TSCEN_Pos (24U)
#define RCC_AHBENR_TSCEN_Msk (0x1UL << RCC_AHBENR_TSCEN_Pos) /*!< 0x01000000 */
#define RCC_AHBENR_TSCEN RCC_AHBENR_TSCEN_Msk /*!< TS controller clock enable */

2
SHAL/Include/Peripheral/GPIO/Reg/SHAL_GPIO_REG_F072xB.h
View File

@@ -20,7 +20,7 @@
//Build enum map of available GPIO pins
enum class GPIO_Key {
enum class GPIO_Key : uint8_t {
#define X(key) key,
AVAILABLE_GPIO
#undef X

9
SHAL/Include/Peripheral/GPIO/SHAL_GPIO.h
View File

@@ -10,7 +10,7 @@
#include <cassert>
#include "SHAL_GPIO_REG_F072xB.h"
enum class PinMode {
enum class PinMode : uint8_t{
INPUT_MODE,
OUTPUT_MODE,
ALTERNATE_FUNCTION_MODE,
@@ -39,10 +39,7 @@ private:
GPIO();
GPIO_Key m_GPIO_KEY = GPIO_Key::INVALID;
PinMode m_pinMode = PinMode::INVALID;
GPIO_TypeDef* p_GPIORegister = nullptr;
unsigned long m_offset = 0;
};
@@ -53,12 +50,12 @@ class GPIOManager{
public:
static GPIO* get(GPIO_Key, PinMode pinMode);
static GPIO& get(GPIO_Key, PinMode pinMode);
GPIOManager() = delete;
private:
inline static GPIO* m_gpios[AVAILABLE_PORTS][PINS_PER_PORT] = {{nullptr}};
inline static GPIO m_gpios[AVAILABLE_PORTS][PINS_PER_PORT] = {{}};
};

2
SHAL/Include/Peripheral/Timer/Reg/SHAL_TIM_REG_F072xB.h
View File

@@ -14,7 +14,7 @@
#include "SHAL_CORE.h"
enum class Timer_Key { //For STM32F072
enum class Timer_Key : uint8_t { //For STM32F072
S_TIM1,
S_TIM2,
S_TIM3,

33
SHAL/Src/Peripheral/GPIO/SHAL_GPIO.cpp
View File

@@ -25,47 +25,50 @@ unsigned long getPinMode(PinMode mode){
GPIO::GPIO(){
GPIO::GPIO() : m_GPIO_KEY(GPIO_Key::INVALID){
//Do not initialize anything
}
GPIO::GPIO(GPIO_Key key, PinMode pinMode) : m_GPIO_KEY(key),
p_GPIORegister(static_cast<GPIO_TypeDef*>(getGPIORegister(key).registers)),
m_offset(getGPIORegister(key).global_offset){
GPIO::GPIO(GPIO_Key key, PinMode pinMode) : m_GPIO_KEY(key) {
SHAL_Peripheral gpioPeripheral = getGPIORegister(key);
auto gpioRegister = static_cast<GPIO_TypeDef*>(gpioPeripheral.registers);
unsigned long registerOffset = gpioPeripheral.global_offset;
volatile unsigned long* gpioEnable = getGPIORCCEnable(key).reg;
unsigned long gpioOffset = getGPIORCCEnable(key).offset;
*gpioEnable |= (1 << gpioOffset); //Set enable flag
p_GPIORegister->MODER &= ~(0b11 << (2 * m_offset)); //Clear any previous mode
p_GPIORegister->MODER |= (getPinMode(pinMode) << (2 * m_offset)); //Set mode based on pinmode bit structure
gpioRegister->MODER &= ~(0b11 << (2 * registerOffset)); //Clear any previous mode
gpioRegister->MODER |= (getPinMode(pinMode) << (2 * registerOffset)); //Set mode based on pinmode bit structure
}
void GPIO::setLow() {
p_GPIORegister->ODR &= ~(1 << m_offset);
auto gpioPeripheral = getGPIORegister(m_GPIO_KEY);
static_cast<GPIO_TypeDef*>(gpioPeripheral.registers)->ODR &= ~(1 << gpioPeripheral.global_offset);
}
void GPIO::setHigh() {
p_GPIORegister->ODR |= (1 << m_offset);
auto gpioPeripheral = getGPIORegister(m_GPIO_KEY);
static_cast<GPIO_TypeDef*>(gpioPeripheral.registers)->ODR |= (1 << gpioPeripheral.global_offset);
}
void GPIO::toggle() {
p_GPIORegister->ODR ^= (1 << m_offset);
auto gpioPeripheral = getGPIORegister(m_GPIO_KEY);
static_cast<GPIO_TypeDef*>(gpioPeripheral.registers)->ODR ^= (1 << gpioPeripheral.global_offset);
}
GPIO* GPIOManager::get(GPIO_Key key, PinMode pinMode) {
GPIO& GPIOManager::get(GPIO_Key key, PinMode pinMode) {
unsigned int gpioPort = getGPIOPortNumber(key);
unsigned long gpioPin = getGPIORegister(key).global_offset; //Use existing structs to get offset
GPIO curr = *m_gpios[gpioPort][gpioPin];
if(curr.m_GPIO_KEY == GPIO_Key::INVALID || curr.m_pinMode != pinMode){
*m_gpios[gpioPort][gpioPin] = GPIO(key,pinMode);
if (m_gpios[gpioPort][gpioPin].m_GPIO_KEY == GPIO_Key::INVALID){
m_gpios[gpioPort][gpioPin] = GPIO(key,pinMode);
}
return m_gpios[gpioPort][gpioPin];

27
SHAL/Src/main.cpp
View File

@@ -1,18 +1,19 @@
#include "SHAL.h"
#include "stm32f0xx.h"
GPIO* blueLED;
GPIO* greenLED;
GPIO* blueLED = nullptr;
GPIO* greenLED = nullptr;
extern "C" void EXTI0_1_IRQHandler(void) {
if (EXTI->PR & (1 << 0)) { //Check pending flag
EXTI->PR |= (1 << 0); //Clear it by writing 1
blueLED->toggle();
greenLED->toggle();
}
}
void tim2Handler(){
greenLED->toggle();
blueLED->toggle();
}
int main() {
@@ -20,27 +21,23 @@ int main() {
Timer timer2 = getTimer(Timer_Key::S_TIM2);
blueLED = initGPIO(GPIO_Key::A4, PinMode::OUTPUT_MODE);
greenLED = initGPIO(GPIO_Key::A5, PinMode::OUTPUT_MODE);
blueLED = &initGPIO(GPIO_Key::A4, PinMode::OUTPUT_MODE);
greenLED = &initGPIO(GPIO_Key::A5, PinMode::OUTPUT_MODE);
timer2.setPrescaler(8000 - 1);
timer2.setARR(1500 - 1);
timer2.setCallbackFunc(tim2Handler);
timer2.start();
RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN; //Enable SYSCFG clock (needed for EXTI)
GPIOB->MODER &= ~(0x3 << (0 * 2));
GPIOB->MODER |= (0x0 << (0 * 2));
SYSCFG->EXTICR[0] &= ~SYSCFG_EXTICR1_EXTI0; //Clear EXTI0 mapping
SYSCFG->EXTICR[0] |= SYSCFG_EXTICR1_EXTI0_PB; //Map PA0 -> EXTI0
SYSCFG->EXTICR[0] &= ~SYSCFG_EXTICR1_EXTI0; // Clear EXTI0 mapping
SYSCFG->EXTICR[0] |= SYSCFG_EXTICR1_EXTI0_PB; // Map PA0 -> EXTI0
EXTI->IMR |= (1 << 0); //Unmask EXTI0
EXTI->RTSR |= (1 << 0); //Trigger on rising edge
EXTI->IMR |= (1 << 0); // Unmask EXTI0
EXTI->RTSR |= (1 << 0); // Trigger on rising edge
NVIC_EnableIRQ(EXTI0_1_IRQn); // EXTI lines 0 and 1 share an IRQ vector
NVIC_EnableIRQ(EXTI0_1_IRQn); //EXTI lines 0 and 1 share an IRQ vector
__enable_irq();