Changed directory structure to eventually support multi-MCU family support

SHAL/Include/Core/SHAL_CORE.h

@@ -0,0 +1,16 @@
+//
+// Created by Luca on 8/29/2025.
+//
+
+#ifndef SHMINGO_HAL_SHAL_CORE_H
+#define SHMINGO_HAL_SHAL_CORE_H
+
+#include <cstdint>
+
+
+struct RCC_Peripheral {
+    volatile uint32_t* reg;
+    uint32_t bitmask;
+};
+
+#endif //SHMINGO_HAL_SHAL_CORE_H

SHAL/Include/Peripheral/GPIO/SHAL_GPIO.h

@@ -0,0 +1,10 @@
+//
+// Created by Luca on 8/29/2025.
+//
+
+#ifndef SHMINGO_HAL_SHAL_GPIO_H
+#define SHMINGO_HAL_SHAL_GPIO_H
+
+
+
+#endif //SHMINGO_HAL_SHAL_GPIO_H

SHAL/Include/Peripheral/GPIO/SHAL_GPIO_REG.h

@@ -0,0 +1,14 @@
+//
+// Created by Luca on 8/29/2025.
+//
+
+#ifndef SHMINGO_HAL_SHAL_GPIO_REG_H
+#define SHMINGO_HAL_SHAL_GPIO_REG_H
+
+enum class GPIO_Key {
+    A0,
+    A1,
+
+};
+
+#endif //SHMINGO_HAL_SHAL_GPIO_REG_H

SHAL/Include/Peripheral/Timer/Reg/SHAL_TIM_CALLBACK.h

@@ -0,0 +1,26 @@
+//
+// Created by Luca on 8/28/2025.
+//
+
+#ifndef SHMINGO_HAL_SHAL_TIM_CALLBACK_H
+#define SHMINGO_HAL_SHAL_TIM_CALLBACK_H
+
+#include "SHAL_TIM_REG.h"
+
+#define DEFINE_TIMER_IRQ(key, irq_handler)                \
+extern "C" void irq_handler(void) {                       \
+    auto tim_reg = getTimerRegister(key);                 \
+    if (tim_reg->SR & TIM_SR_UIF) {                       \
+        tim_reg->SR &= ~TIM_SR_UIF; /* clear flag */      \
+        auto cb = timer_callbacks[static_cast<int>(key)]; \
+        if (cb) cb();                                     \
+    };                                                    \
+};
+
+typedef void (*TimerCallback)(); //Typedef for callback function
+
+[[maybe_unused]] static TimerCallback timer_callbacks[static_cast<int>(Timer_Key::NUM_TIMERS)] = {nullptr}; //Timer IRQ Callback table
+
+void registerTimerCallback(Timer_Key key, TimerCallback callback);
+
+#endif //SHMINGO_HAL_SHAL_TIM_CALLBACK_H

SHAL/Include/Peripheral/Timer/Reg/SHAL_TIM_REG.h

@@ -0,0 +1,76 @@
+#ifndef SHAL_TIM_REG_H
+#define SHAL_TIM_REG_H
+
+#include <cassert>
+#include <stm32f072xb.h>
+
+enum class Timer_Key { //For STM32F072
+    S_TIM1,
+    S_TIM2,
+    S_TIM3,
+    S_TIM14,
+    S_TIM15,
+    S_TIM16,
+    S_TIM17,
+    NUM_TIMERS,
+    S_TIM_INVALID
+};
+
+
+//Get timer peripheral struct including bus register, enable mask, timer mask
+constexpr RCC_Peripheral getTimerRCC(Timer_Key t) {
+    switch(t) {
+        case Timer_Key::S_TIM1:  return {&RCC->APB2ENR, RCC_APB2ENR_TIM1EN};
+        case Timer_Key::S_TIM2:  return {&RCC->APB1ENR, RCC_APB1ENR_TIM2EN};
+        case Timer_Key::S_TIM3:  return {&RCC->APB1ENR, RCC_APB1ENR_TIM3EN};
+        case Timer_Key::S_TIM14: return {&RCC->APB1ENR, RCC_APB1ENR_TIM14EN};
+        case Timer_Key::S_TIM15: return {&RCC->APB2ENR, RCC_APB2ENR_TIM15EN};
+        case Timer_Key::S_TIM16: return {&RCC->APB2ENR, RCC_APB2ENR_TIM16EN};
+        case Timer_Key::S_TIM17: return {&RCC->APB2ENR, RCC_APB2ENR_TIM17EN};
+        case Timer_Key::NUM_TIMERS:
+        case Timer_Key::S_TIM_INVALID:
+            assert(false);
+            return {nullptr, 0};; //Unreachable
+    }
+
+    __builtin_unreachable();
+}
+
+//Get actual register value based on enum
+constexpr volatile TIM_TypeDef* getTimerRegister(Timer_Key t) {
+    switch(t) {
+        case Timer_Key::S_TIM1:  return TIM1;
+        case Timer_Key::S_TIM2:  return TIM2;
+        case Timer_Key::S_TIM3:  return TIM3;
+        case Timer_Key::S_TIM14:  return TIM14;
+        case Timer_Key::S_TIM15:  return TIM15;
+        case Timer_Key::S_TIM16:  return TIM16;
+        case Timer_Key::S_TIM17:  return TIM17;
+        case Timer_Key::NUM_TIMERS:
+        case Timer_Key::S_TIM_INVALID:
+            assert(false);
+            return nullptr; //Unreachable
+    }
+    __builtin_unreachable();
+}
+
+constexpr IRQn_Type getIRQn(Timer_Key t) {
+    switch(t) {
+        case Timer_Key::S_TIM1:  return TIM1_BRK_UP_TRG_COM_IRQn;
+        case Timer_Key::S_TIM2:  return TIM2_IRQn;
+        case Timer_Key::S_TIM3:  return TIM3_IRQn;
+        case Timer_Key::S_TIM14: return TIM14_IRQn;
+        case Timer_Key::S_TIM15: return TIM15_IRQn;
+        case Timer_Key::S_TIM16: return TIM16_IRQn;
+        case Timer_Key::S_TIM17: return TIM17_IRQn;
+        case Timer_Key::NUM_TIMERS:
+        case Timer_Key::S_TIM_INVALID:
+            assert(false);
+            return TIM1_BRK_UP_TRG_COM_IRQn; //Unreachable
+    }
+    __builtin_unreachable();
+}
+
+
+
+#endif

SHAL/Include/Peripheral/Timer/SHAL_TIM.h

@@ -0,0 +1,56 @@
+#ifndef SHAL_TIM_H
+#define SHAL_TIM_H
+
+#include "SHAL_TIM_REG.h"
+#include "SHAL_TIM_CALLBACK.h"
+
+#include <array>
+
+class Timer {
+    friend class TimerManager;
+public:
+
+    //Starts the counter
+    void start();
+
+    //Stops the counter
+    void stop();
+
+    //Set prescaler value
+    void setPrescaler(uint16_t presc);
+
+    //Set auto reload register
+    void setARR(uint16_t arr);
+
+    //Enable interrupts
+    void enableInterrupt();
+
+    //Set timer IRQ callback function
+    void setCallbackFunc(TimerCallback callback){
+        registerTimerCallback(timer, callback);
+    }
+
+private:
+
+    explicit Timer(Timer_Key t);
+    Timer();
+
+    Timer_Key timer;
+    volatile TIM_TypeDef* timer_reg;
+
+};
+
+#define getTimer(timer_key) TimerManager::get(timer_key);
+
+//Manages all timers so user does not have to personally initialize
+class TimerManager{
+public:
+
+    static Timer& get(Timer_Key);
+    TimerManager() = delete;
+
+private:
+    inline static Timer timers[static_cast<int>(Timer_Key::NUM_TIMERS)] = {};
+};
+
+#endif

SHAL/Include/SHAL.h

@@ -0,0 +1,14 @@
+/**
+  ******************************************************************************
+  * @file    SHAL.h
+  * @brief   The main header file for the Shmingo Hardware Abstraction Layer
+  ******************************************************************************
+  */
+
+#ifndef SHAL_H
+#define SHAL_H
+
+#include "SHAL_TIM.h"
+
+
+#endif