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Broken H7 Implementation

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This commit is contained in:
Luca Lizaranzu
2026-03-12 16:33:16 -07:00
parent 5b0819a300
commit ae965d747c
22 changed files with 29934 additions and 75 deletions
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241
SHAL/Include/Peripheral/GPIO/Reg/SHAL_GPIO_REG_H753xx.h Normal file
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@@ -0,0 +1,241 @@
//
// Created by Luca on 8/29/2025.
//
#ifndef SHAL_GPIO_REG_H753ZIT6
#define SHAL_GPIO_REG_H753ZIT6
#include <stm32h753xx.h>
#include <cassert>
#include "SHAL_GPIO_TYPES.h"
#define AVAILABLE_PORTS 5
#define PINS_PER_PORT 16
#define NUM_EXTI_LINES 16
#define AVAILABLE_GPIO \
X(A0) X(A1) X(A2) X(A3) X(A4) X(A5) X(A6) X(A7) X(A8) X(A9) X(A10) X(A11) X(A12) X(A13) X(A14) X(A15) \
X(B0) X(B1) X(B2) X(B3) X(B4) X(B5) X(B6) X(B7) X(B8) X(B9) X(B10) X(B11) X(B12) X(B13) X(B14) X(B15) \
X(C0) X(C1) X(C2) X(C3) X(C4) X(C5) X(C6) X(C7) X(C8) X(C9) X(C10) X(C11) X(C12) X(C13) X(C14) X(C15) \
X(D0) X(D1) X(D2) X(D3) X(D4) X(D5) X(D6) X(D7) X(D8) X(D9) X(D10) X(D11) X(D12) X(D13) X(D14) X(D15) \
X(E0) X(E1) X(E2) X(E3) X(E4) X(E5) X(E6) X(E7) X(E8) X(E9) X(E10) X(E11) X(E12) X(E13) X(E14) X(E15) \
//Build enum map of available SHAL_GPIO pins
enum class GPIO_Key : uint8_t {
#define X(key) key,
AVAILABLE_GPIO
#undef X
NUM_GPIO,
INVALID
};
static volatile GPIO_TypeDef * GPIO_TABLE[5] = { //Lookup table for ADCs
GPIOA,
GPIOB,
GPIOC,
GPIOD,
GPIOE,
};
constexpr uint8_t getGPIOPinNumber(GPIO_Key key){
return static_cast<uint8_t>(key) % 16;
}
static uint32_t getGPIOPortNumber(const GPIO_Key g){
return (static_cast<uint8_t>(g) / 16);
}
static SHAL_GPIO_RCC_Enable_Register getGPIORCCEnable(const GPIO_Key g){
volatile uint32_t* reg = &RCC->AHB4ENR; //register
uint32_t mask = RCC_AHB4ENR_GPIOAEN << getGPIOPortNumber(g); //Should shift to get each port number
return {reg,mask};
}
/*
constexpr SHAL_GPIO_EXTI_Register getGPIOEXTICR(const GPIO_Key g){
switch(g) {
case GPIO_Key::A0: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI0_PA,EXTI0_IRQn};
case GPIO_Key::A1: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI1_PA,EXTI1_IRQn};
case GPIO_Key::A2: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI2_PA,EXTI2_IRQn};
case GPIO_Key::A3: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI3_PA,EXTI3_IRQn};
case GPIO_Key::A4: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI4_PA,EXTI4_15_IRQn};
case GPIO_Key::A5: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI5_PA,EXTI4_15_IRQn};
case GPIO_Key::A6: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI6_PA,EXTI4_15_IRQn};
case GPIO_Key::A7: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI7_PA,EXTI4_15_IRQn};
case GPIO_Key::A8: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI8_PA,EXTI4_15_IRQn};
case GPIO_Key::A9: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI9_PA,EXTI4_15_IRQn};
case GPIO_Key::A10: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI10_PA,EXTI4_15_IRQn};
case GPIO_Key::A11: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI11_PA,EXTI4_15_IRQn};
case GPIO_Key::A12: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI12_PA,EXTI4_15_IRQn};
case GPIO_Key::A13: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI13_PA,EXTI4_15_IRQn};
case GPIO_Key::A14: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI14_PA,EXTI4_15_IRQn};
case GPIO_Key::A15: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI15_PA,EXTI4_15_IRQn};
case GPIO_Key::B0: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI0_PB,EXTI0_1_IRQn};
case GPIO_Key::B1: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI1_PB,EXTI0_1_IRQn};
case GPIO_Key::B2: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI2_PB,EXTI2_3_IRQn};
case GPIO_Key::B3: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI3_PB,EXTI2_3_IRQn};
case GPIO_Key::B4: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI4_PB,EXTI4_15_IRQn};
case GPIO_Key::B5: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI5_PB,EXTI4_15_IRQn};
case GPIO_Key::B6: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI6_PB,EXTI4_15_IRQn};
case GPIO_Key::B7: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI7_PB,EXTI4_15_IRQn};
case GPIO_Key::B8: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI8_PB,EXTI4_15_IRQn};
case GPIO_Key::B9: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI9_PB,EXTI4_15_IRQn};
case GPIO_Key::B10: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI10_PB,EXTI4_15_IRQn};
case GPIO_Key::B11: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI11_PB,EXTI4_15_IRQn};
case GPIO_Key::B12: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI12_PB,EXTI4_15_IRQn};
case GPIO_Key::B13: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI13_PB,EXTI4_15_IRQn};
case GPIO_Key::B14: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI14_PB,EXTI4_15_IRQn};
case GPIO_Key::B15: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI15_PB,EXTI4_15_IRQn};
case GPIO_Key::C0: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI0_PC,EXTI0_1_IRQn};
case GPIO_Key::C1: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI1_PC,EXTI0_1_IRQn};
case GPIO_Key::C2: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI2_PC,EXTI2_3_IRQn};
case GPIO_Key::C3: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI3_PC,EXTI2_3_IRQn};
case GPIO_Key::C4: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI4_PC,EXTI4_15_IRQn};
case GPIO_Key::C5: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI5_PC,EXTI4_15_IRQn};
case GPIO_Key::C6: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI6_PC,EXTI4_15_IRQn};
case GPIO_Key::C7: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI7_PC,EXTI4_15_IRQn};
case GPIO_Key::C8: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI8_PC,EXTI4_15_IRQn};
case GPIO_Key::C9: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI9_PC,EXTI4_15_IRQn};
case GPIO_Key::C10: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI10_PC,EXTI4_15_IRQn};
case GPIO_Key::C11: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI11_PC,EXTI4_15_IRQn};
case GPIO_Key::C12: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI12_PC,EXTI4_15_IRQn};
case GPIO_Key::C13: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI13_PC,EXTI4_15_IRQn};
case GPIO_Key::C14: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI14_PC,EXTI4_15_IRQn};
case GPIO_Key::C15: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI15_PC,EXTI4_15_IRQn};
case GPIO_Key::INVALID:
case GPIO_Key::NUM_GPIO:
assert(false);
return SHAL_GPIO_EXTI_Register(nullptr, 0, EXTI4_15_IRQn); //Unreachable
}
__builtin_unreachable();
}
*/
static inline SHAL_GPIO_Mode_Register getGPIOModeRegister(const GPIO_Key key){
volatile uint32_t* reg = &GPIO_TABLE[static_cast<uint8_t>(key) / 16]->MODER;
uint32_t offset = 2 * (static_cast<uint8_t>(key) % 16);
return {reg,offset};
}
static inline SHAL_GPIO_Pullup_Pulldown_Register getGPIOPUPDRegister(const GPIO_Key key){
volatile uint32_t* reg = &GPIO_TABLE[static_cast<uint8_t>(key) / 16]->PUPDR;
uint32_t offset = 2 * static_cast<uint8_t>(key) % 16;
return {reg,offset};
}
static inline SHAL_GPIO_Alternate_Function_Register getGPIOAlternateFunctionRegister(const GPIO_Key key){
uint32_t pinNumber = static_cast<uint8_t>(key) % 16; //Number of pin (We need 0-7 to be AFR 1 and 8-15 to be AFR 2)
uint32_t afrIndex = pinNumber < 8 ? 0 : 1;
volatile uint32_t* reg = &GPIO_TABLE[static_cast<uint8_t>(key) / 16]->AFR[afrIndex];
uint32_t offset = (pinNumber % 8) * 4; //Increment in groups of four
return {reg,offset};
}
static inline SHAL_GPIO_Output_Speed_Register getGPIOOutputSpeedRegister(const GPIO_Key key){
volatile uint32_t* reg = &GPIO_TABLE[static_cast<uint8_t>(key) / 16]->OSPEEDR;
uint32_t offset = 2 * static_cast<uint8_t>(key) % 16;
return {reg,offset};
}
static inline SHAL_GPIO_Output_Type_Register getGPIOOutputTypeRegister(const GPIO_Key key){
volatile uint32_t* reg = &GPIO_TABLE[static_cast<uint8_t>(key) / 16]->OTYPER;
uint32_t offset = static_cast<uint8_t>(key) % 16;
return {reg,offset};
}
static inline SHAL_GPIO_Output_Data_Register getGPIOOutputDataRegister(const GPIO_Key key){
volatile uint32_t* reg = &GPIO_TABLE[static_cast<uint8_t>(key) / 16]->ODR;
uint32_t offset = (static_cast<uint8_t>(key) % 16);
return {reg,offset};
}
static inline SHAL_GPIO_Input_Data_Register getGPIOInputDataRegister(const GPIO_Key key){
volatile uint32_t* reg = &GPIO_TABLE[static_cast<uint8_t>(key) / 16]->IDR;
uint32_t offset = static_cast<uint8_t>(key) % 16;
return {reg,offset};
}
/* TODO reimplement
constexpr SHAL_GPIO_Port_Info getGPIOPortInfo(GPIO_Key key){
switch(key){
case GPIO_Key::A0:
case GPIO_Key::B0:
case GPIO_Key::C0:
return {0, SHAL_ADC_Channel::CH0};
case GPIO_Key::A1:
case GPIO_Key::B1:
case GPIO_Key::C1:
return {1, SHAL_ADC_Channel::CH1};
case GPIO_Key::A2:
case GPIO_Key::B2:
case GPIO_Key::C2:
return {2, SHAL_ADC_Channel::CH2};
case GPIO_Key::A3:
case GPIO_Key::B3:
case GPIO_Key::C3:
return {3, SHAL_ADC_Channel::CH3};
case GPIO_Key::A4:
case GPIO_Key::B4:
case GPIO_Key::C4:
return {4, SHAL_ADC_Channel::CH4};
case GPIO_Key::A5:
case GPIO_Key::B5:
case GPIO_Key::C5:
return {5, SHAL_ADC_Channel::CH5};
case GPIO_Key::A6:
case GPIO_Key::B6:
case GPIO_Key::C6:
return {6, SHAL_ADC_Channel::CH6};
case GPIO_Key::A7:
case GPIO_Key::B7:
case GPIO_Key::C7:
return {7, SHAL_ADC_Channel::CH7};
case GPIO_Key::A8:
case GPIO_Key::B8:
case GPIO_Key::C8:
return {8, SHAL_ADC_Channel::CH8};
case GPIO_Key::A9:
case GPIO_Key::B9:
case GPIO_Key::C9:
return {9, SHAL_ADC_Channel::CH9};
case GPIO_Key::A10:
case GPIO_Key::B10:
case GPIO_Key::C10:
return {10, SHAL_ADC_Channel::CH10};
case GPIO_Key::A11:
case GPIO_Key::B11:
case GPIO_Key::C11:
return {11, SHAL_ADC_Channel::CH11};
case GPIO_Key::A12:
case GPIO_Key::B12:
case GPIO_Key::C12:
return {12, SHAL_ADC_Channel::CH12};
case GPIO_Key::A13:
case GPIO_Key::B13:
case GPIO_Key::C13:
return {13, SHAL_ADC_Channel::CH13};
case GPIO_Key::A14:
case GPIO_Key::B14:
case GPIO_Key::C14:
return {14, SHAL_ADC_Channel::CH14};
case GPIO_Key::A15:
case GPIO_Key::B15:
case GPIO_Key::C15:
return {15, SHAL_ADC_Channel::CH15};
case GPIO_Key::NUM_GPIO:
case GPIO_Key::INVALID:
return {0, SHAL_ADC_Channel::CH0};
}
__builtin_unreachable();
}
*/
#endif //SHMINGO_HAL_SHAL_GPIO_REG_H753ZIT6_H

1
SHAL/Include/Peripheral/GPIO/SHAL_GPIO.h
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@@ -12,7 +12,6 @@
//#include "SHAL_EXTI_CALLBACK.h"
//#include "SHAL_ADC.h"
//Abstraction of SHAL_GPIO registers
class SHAL_GPIO{

46
SHAL/Include/Peripheral/GPIO/SHAL_GPIO_REG.h
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@@ -39,6 +39,50 @@
#include "stm32f030xc.h"
#elif defined(STM32F030xC)
#include "stm32f030xc.h"
#elif defined(STM32H743xx)
#include "stm32h743xx.h"
#elif defined(STM32H753xx)
#include "SHAL_GPIO_REG_H753xx.h"
#elif defined(STM32H750xx)
#include "stm32h750xx.h"
#elif defined(STM32H742xx)
#include "stm32h742xx.h"
#elif defined(STM32H745xx)
#include "stm32h745xx.h"
#elif defined(STM32H745xG)
#include "stm32h745xg.h"
#elif defined(STM32H755xx)
#include "stm32h755xx.h"
#elif defined(STM32H747xx)
#include "stm32h747xx.h"
#elif defined(STM32H747xG)
#include "stm32h747xg.h"
#elif defined(STM32H757xx)
#include "stm32h757xx.h"
#elif defined(STM32H7B0xx)
#include "stm32h7b0xx.h"
#elif defined(STM32H7B0xxQ)
#include "stm32h7b0xxq.h"
#elif defined(STM32H7A3xx)
#include "stm32h7a3xx.h"
#elif defined(STM32H7B3xx)
#include "stm32h7b3xx.h"
#elif defined(STM32H7A3xxQ)
#include "stm32h7a3xxq.h"
#elif defined(STM32H7B3xxQ)
#include "stm32h7b3xxq.h"
#elif defined(STM32H735xx)
#include "stm32h735xx.h"
#elif defined(STM32H733xx)
#include "stm32h733xx.h"
#elif defined(STM32H730xx)
#include "stm32h730xx.h"
#elif defined(STM32H730xxQ)
#include "stm32h730xxq.h"
#elif defined(STM32H725xx)
#include "stm32h725xx.h"
#elif defined(STM32H723xx)
#include "stm32h723xx.h"
#elif defined(STM32L412xx)
#include "stm32l412xx.h"
#elif defined(STM32L422xx)
@@ -95,6 +139,4 @@
#endif
#endif //SHMINGO_HAL_SHAL_GPIO_REG_H

2
SHAL/Include/Peripheral/GPIO/SHAL_GPIO_TYPES.h
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@@ -105,4 +105,4 @@ enum class TriggerMode : uint8_t{
};
#endif //SHMINGO_HAL_SHAL_GPIO_TYPES_H
#endif //SHAL_GPIO_TYPES_H