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ADC sequence abstracted

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This commit is contained in:
Ea-r-th
2025-10-16 21:34:01 -07:00
parent 3561879c24
commit af21480aff
10 changed files with 141 additions and 45 deletions
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56
SHAL/Include/Peripheral/ADC/Reg/SHAL_ADC_REG_L432KC.h
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@@ -11,6 +11,32 @@
#define SHAL_ADC1 SHAL_ADC(1)
#define NUM_ADCS 1
#define NUM_ADC_CHANNELS 16
enum class SHAL_ADC_Channel : uint32_t {
CH0,
CH1,
CH2,
CH3,
CH4,
CH5,
CH6,
CH7,
CH8,
CH9,
CH10,
CH11,
CH12,
CH13,
CH14,
CH15,
CHTemp,
CHRef,
CHBat
};
enum class ADC_Key : uint8_t{
S_ADC1 = 0,
NUM_ADC = 1,
@@ -89,7 +115,7 @@ SHAL_ADC_Channel_Sampling_Time_Reg getADCChannelSamplingTimeRegister(ADC_Key key
volatile ADC_TypeDef* ADCReg = ADC_TABLE[static_cast<uint8_t>(key)];
volatile uint32_t* SMPReg = nullptr;
uint32_t pos = 0;
uint32_t pos;
auto channelNum = static_cast<uint8_t>(channel);
@@ -104,6 +130,34 @@ SHAL_ADC_Channel_Sampling_Time_Reg getADCChannelSamplingTimeRegister(ADC_Key key
return {SMPReg, pos};
}
SHAL_ADC_Sequence_Amount_Reg getADCSequenceAmountRegister(ADC_Key key){
SHAL_ADC_Sequence_Amount_Reg res = {nullptr, ADC_SQR1_L_Pos};
res.reg = &(ADC_TABLE[static_cast<uint8_t>(key)]->SQR1);
return res;
}
SHAL_ADC_Sequence_Reg getADCSequenceRegisters(ADC_Key key){
volatile ADC_TypeDef* adc_reg = ADC_TABLE[static_cast<uint8_t>(key)];
SHAL_ADC_Sequence_Reg res = {{&adc_reg->SQR1,
&adc_reg->SQR2,
&adc_reg->SQR3,
&adc_reg->SQR4,
nullptr,
nullptr},
{1UL << 0,
1UL << 6,
1UL << 12,
1UL << 18,
1UL << 24}
};
return res;
}
constexpr ADC_TypeDef* getADCRegister(ADC_Key key){
switch(key){
case ADC_Key::S_ADC1:

22
SHAL/Include/Peripheral/ADC/SHAL_ADC.h
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@@ -26,16 +26,16 @@ public:
/// Performs analog to digital conversion on a single channel, one time
/// \param channel Channel to be converted
/// \param time ADC_SampleTime - amount of clock cycles per conversion
/// \param time SHAL_ADC_SampleTime - amount of clock cycles per conversion
/// \return resulting value
uint16_t singleConvertSingle(SHAL_ADC_Channel channel, ADC_SampleTime time = ADC_SampleTime::C239);
uint16_t singleConvertSingle(SHAL_ADC_Channel channel, SHAL_ADC_SampleTime time = SHAL_ADC_SampleTime::C8);
/// Performs analog to digital conversion on multiple channels, one time
/// \param channels Pointer to an array of channels to convert
/// \param numChannels Number of channels to convert
/// \param result Pointer to store converted channel results in
/// \param time ADC_SampleTime - amount of clock cycles per conversion
void multiConvertSingle(SHAL_ADC_Channel* channels, int numChannels, uint16_t* result, ADC_SampleTime time = ADC_SampleTime::C239);
/// \param time SHAL_ADC_SampleTime - amount of clock cycles per conversion
void multiConvertSingle(SHAL_ADC_Channel* channels, int numChannels, uint16_t* result, SHAL_ADC_SampleTime time = SHAL_ADC_SampleTime::C8);
@@ -45,9 +45,23 @@ private:
ADC_Key m_ADCKey = ADC_Key::INVALID;
//Checks to see if instance is initialized with a proper ADC peripheral tag
bool isValid();
//Disables peripheral
SHAL_Result disable();
/// Adds an ADC channel to the conversion sequence
/// \param channel Channel to add
/// \param index Index to add channel to (ADC channel will be the nth channel to convert
/// \return Result
SHAL_Result addADCChannelToSequence(SHAL_ADC_Channel channel, uint32_t index);
/// Sets the amount of ADC channels to convert
/// \param amount Number of channels to convert
/// \return
SHAL_Result setADCSequenceAmount(uint32_t amount);
};

53
SHAL/Include/Peripheral/ADC/SHAL_ADC_TYPES.h
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@@ -5,21 +5,21 @@
#ifndef SHMINGO_HAL_SHAL_ADC_TYPES_H
#define SHMINGO_HAL_SHAL_ADC_TYPES_H
//Common register among all ADC peripherals
struct SHAL_ADC_Common_Control_Reg {
volatile uint32_t* reg;
uint32_t VoltageRefEnable;
uint32_t TempSensorEnable;
uint32_t VBatteryEnable;
};
//Register controlling the ADC peripheral clock
struct SHAL_ADC_RCC_Enable_Reg {
volatile uint32_t* reg;
uint32_t mask;
};
//Register with ADC controls
struct SHAL_ADC_Control_Reg {
volatile uint32_t* reg;
uint32_t enable_mask;
@@ -28,6 +28,7 @@ struct SHAL_ADC_Control_Reg {
uint32_t start_mask;
};
//Register controlling ADC configuration
struct SHAL_ADC_Config_Reg {
volatile uint32_t* reg;
uint32_t continue_mask;
@@ -36,53 +37,51 @@ struct SHAL_ADC_Config_Reg {
uint32_t alignment_offset;
};
//Register for all ADC data
struct SHAL_ADC_Data_Reg {
volatile uint32_t* reg;
uint32_t mask;
};
//Register for the interrupt service routine for ADCs
struct SHAL_ADC_ISR {
volatile uint32_t* reg;
uint32_t end_of_conversion_mask;
};
//Register controlling the clock source for the ADC
struct SHAL_ADC_Clock_Reg {
volatile uint32_t* reg;
uint32_t clear;
uint32_t mask;
};
//Register controlling the sampling time of ADC samples
struct SHAL_ADC_Channel_Sampling_Time_Reg {
volatile uint32_t* reg;
uint32_t channel_offset;
};
enum class SHAL_ADC_Channel : uint32_t {
CH0,
CH1,
CH2,
CH3,
CH4,
CH5,
CH6,
CH7,
CH8,
CH9,
CH10,
CH11,
CH12,
CH13,
CH14,
CH15,
CHTemp,
CHRef,
CHBat
//Register controlling the number of conversions to do in one sequence
struct SHAL_ADC_Sequence_Amount_Reg {
volatile uint32_t* reg;
uint32_t offset;
};
enum class ADC_SampleTime : uint32_t {
C1 = 0x00, //1.5 cycles per sample F0
/*Register group controlling which ADC channels to convert. DO NOT USE THE FOLLOWING ILLEGAL COMBINATIONS:
*reg 1 + offset 1
*Any sections after the last one (for example, max for a 16 channel register is reg 4 offset 2*/
struct SHAL_ADC_Sequence_Reg {
volatile uint32_t* regs[6];
uint32_t offsets[5];
};
enum class SHAL_ADC_SampleTime : uint32_t {
C1 = 0x00, //1.5 cycles per sample (F0 only, timings change on other ADC architectures)
C2 = 0x01, //7.5 cycles
C3 = 0x02, //13.5 cycles
C4 = 0x03, //28.5 cycles

2
SHAL/Include/Peripheral/GPIO/SHAL_GPIO.h
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@@ -27,7 +27,7 @@ public:
/// Uses the ADC to read an analog voltage value
/// \param sampleTime The amount of clock cycles to use for the ADC
/// \return ADC result
uint16_t analogRead(ADC_SampleTime sampleTime = ADC_SampleTime::C239);
uint16_t analogRead(SHAL_ADC_SampleTime sampleTime = SHAL_ADC_SampleTime::C239);
void setPinMode(PinMode mode) volatile;

3
SHAL/Include/Peripheral/UART/SHAL_UART.h
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@@ -10,13 +10,14 @@
#define SHMINGO_HAL_SHAL_UART_H
#include "SHAL_UART_REG.h"
#include "SHAL_UART_TYPES.h"
class SHAL_UART{
friend class UARTManager;
public:
void init(UART_Pair pair);
void init(SHAL_UART_Pair pair);
//begins Tx and Usart TODO either modify this function or add a new one that supports Rx
void begin(uint32_t baudRate) volatile;

4
SHAL/Src/STM32F0XX/Peripheral/ADC/SHAL_ADC.cpp
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@@ -64,7 +64,7 @@ SHAL_Result SHAL_ADC::calibrate() {
return SHAL_Result::OKAY;
}
uint16_t SHAL_ADC::singleConvertSingle(SHAL_ADC_Channel channel, ADC_SampleTime time) {
uint16_t SHAL_ADC::singleConvertSingle(SHAL_ADC_Channel channel, SHAL_ADC_SampleTime time) {
ADC_TypeDef* ADC_reg = getADCRegister(m_ADCKey);
@@ -81,7 +81,7 @@ uint16_t SHAL_ADC::singleConvertSingle(SHAL_ADC_Channel channel, ADC_SampleTime
return result;
}
void SHAL_ADC::multiConvertSingle(SHAL_ADC_Channel* channels, const int numChannels, uint16_t* result, ADC_SampleTime time) {
void SHAL_ADC::multiConvertSingle(SHAL_ADC_Channel* channels, const int numChannels, uint16_t* result, SHAL_ADC_SampleTime time) {
ADC_TypeDef* ADC_reg = getADCRegister(m_ADCKey);
ADC->CCR |= ADC_CCR_VREFEN | ADC_CCR_TSEN; //Enable VREFINT and Temp sensor in global ADC struct

2
SHAL/Src/STM32F0XX/Peripheral/GPIO/SHAL_GPIO.cpp
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@@ -107,7 +107,7 @@ void SHAL_GPIO::useAsExternalInterrupt(TriggerMode mode, EXTICallback callback)
__enable_irq(); //Enable IRQ just in case
}
uint16_t SHAL_GPIO::analogRead(ADC_SampleTime sampleTime) {
uint16_t SHAL_GPIO::analogRead(SHAL_ADC_SampleTime sampleTime) {
SHAL_ADC_Channel channel = getGPIOPortInfo(m_GPIO_KEY).ADCChannel;

40
SHAL/Src/STM32L4XX/Peripheral/ADC/SHAL_ADC.cpp
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@@ -55,15 +55,17 @@ SHAL_Result SHAL_ADC::calibrate() {
return SHAL_Result::OKAY;
}
uint16_t SHAL_ADC::singleConvertSingle(SHAL_ADC_Channel channel, ADC_SampleTime time) {
uint16_t SHAL_ADC::singleConvertSingle(SHAL_ADC_Channel channel, SHAL_ADC_SampleTime time) {
ADC_TypeDef* ADC_reg = getADCRegister(m_ADCKey);
auto sampleTimeReg = getADCChannelSamplingTimeRegister(m_ADCKey,channel);
SHAL_set_bits(sampleTimeReg.reg,3,static_cast<uint8_t>(time),sampleTimeReg.channel_offset); //Set sample time register TODO un-hardcode bit width?
ADC->CCR |= ADC_CCR_VREFEN | ADC_CCR_TSEN; //Enable VREFINT and Temp sensor in global ADC struct
auto sequenceReg = getADCSequenceRegisters(m_ADCKey);
ADC_reg->CHSELR = static_cast<uint32_t>(channel); //Enable channel for conversion
ADC_reg->SMPR |= static_cast<uint32_t>(time); //Set sampling time
addADCChannelToSequence(channel,0); //Use index 0 to convert channel
setADCSequenceAmount(1); //Since we're using single convert, convert 1 channel
if(!SHAL_WAIT_FOR_CONDITION_US(((ADC_reg->ISR & ADC_ISR_EOC) != 0),500)){ //Wait for conversion
return 0; //Failed
@@ -73,7 +75,7 @@ uint16_t SHAL_ADC::singleConvertSingle(SHAL_ADC_Channel channel, ADC_SampleTime
return result;
}
void SHAL_ADC::multiConvertSingle(SHAL_ADC_Channel* channels, const int numChannels, uint16_t* result, ADC_SampleTime time) {
void SHAL_ADC::multiConvertSingle(SHAL_ADC_Channel* channels, const int numChannels, uint16_t* result, SHAL_ADC_SampleTime time) {
ADC_TypeDef* ADC_reg = getADCRegister(m_ADCKey);
ADC->CCR |= ADC_CCR_VREFEN | ADC_CCR_TSEN; //Enable VREFINT and Temp sensor in global ADC struct
@@ -145,6 +147,32 @@ SHAL_Result SHAL_ADC::configureAlignment(SHAL_ADC_Alignment alignment) {
return SHAL_Result::OKAY;
}
SHAL_Result SHAL_ADC::setADCSequenceAmount(uint32_t amount) {
if(!isValid()){return SHAL_Result::ERROR;}
SHAL_ADC_Sequence_Amount_Reg sequence_amount_reg = getADCSequenceAmountRegister(m_ADCKey);
SHAL_set_bits(sequence_amount_reg.reg, 4, amount, sequence_amount_reg.offset);
return SHAL_Result::OKAY;
}
SHAL_Result SHAL_ADC::addADCChannelToSequence(SHAL_ADC_Channel channel, uint32_t index) {
if(!isValid()){return SHAL_Result::ERROR;}
auto sequenceRegisters = getADCSequenceRegisters(m_ADCKey);
auto channelNum = static_cast<uint8_t>(channel);
uint32_t bitSection = (index + 1) % 5; //Need a new variable since SQR1 has its data bits shifted up by one section to make room for the L section
uint32_t sequenceRegNumber = (index + 1) / 5;
volatile uint32_t* sequenceReg = sequenceRegisters.regs[sequenceRegNumber];
uint32_t bitSectionOffset = sequenceRegisters.offsets[bitSection];
SHAL_set_bits(sequenceReg,5,channelNum,bitSectionOffset);
}
SHAL_ADC &ADCManager::get(ADC_Key key) {
return m_ADCs[static_cast<uint8_t>(key)];
}

2
SHAL/Src/STM32L4XX/Peripheral/GPIO/SHAL_GPIO.cpp
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@@ -107,7 +107,7 @@ void SHAL_GPIO::useAsExternalInterrupt(TriggerMode mode, EXTICallback callback)
__enable_irq(); //Enable IRQ just in case
}
uint16_t SHAL_GPIO::analogRead(ADC_SampleTime sampleTime) {
uint16_t SHAL_GPIO::analogRead(SHAL_ADC_SampleTime sampleTime) {
SHAL_ADC_Channel channel = getGPIOPortInfo(m_GPIO_KEY).ADCChannel;