Added alternate function inits for USART

SHAL/Include/Peripheral/UART/Reg/SHAL_UART_REG.h

@@ -2,15 +2,13 @@
 // Created by Luca on 9/7/2025.
 //
 
-#ifndef SHMINGO_HAL_SHAL_UART_REG_H
-#define SHMINGO_HAL_SHAL_UART_REG_H
+#ifndef SHAL_UART_REG_H
+#define SHAL_UART_REG_H
 
 //
 // Created by Luca on 9/6/2025.
 //
 
-#ifndef SHMINGO_HAL_SHAL_GPIO_REG_H
-#define SHMINGO_HAL_SHAL_GPIO_REG_H
 
 #if defined(STM32F030x6)
 #include "stm32f030x6.h"
@@ -49,9 +47,4 @@
 #endif
 
 
-
-
-#endif //SHMINGO_HAL_SHAL_GPIO_REG_H
-
-
 #endif //SHMINGO_HAL_SHAL_UART_REG_H

SHAL/Include/Peripheral/UART/Reg/SHAL_UART_REG_F072xB.h

@@ -2,8 +2,8 @@
 // Created by Luca on 9/7/2025.
 //
 
-#ifndef SHMINGO_HAL_SHAL_UART_REG_F072XB_H
-#define SHMINGO_HAL_SHAL_UART_REG_F072XB_H
+#ifndef SHAL_UART_REG_F072XB_H
+#define SHAL_UART_REG_F072XB_H
 
 #include <stm32f072xb.h>
 #include <cassert>
@@ -101,4 +101,17 @@ constexpr SHAL_UART_ENABLE_REG getUARTEnableReg(const UART_Pair pair){
     __builtin_unreachable();
 }
 
+constexpr uint32_t getAFMask(const AF_Mask mask){
+    switch(mask){
+        case AF_Mask::AF0: return 0x00;
+        case AF_Mask::AF1: return 0x01;
+        case AF_Mask::AF2: return 0x02;
+        case AF_Mask::AF3: return 0x03;
+        case AF_Mask::AF4: return 0x04;
+        case AF_Mask::AF5: return 0x05;
+        case AF_Mask::AF6: return 0x06;
+        case AF_Mask::AF7: return 0x07;
+    }
+}
+
 #endif //SHMINGO_HAL_SHAL_UART_REG_F072XB_H

SHAL/Include/Peripheral/UART/Reg/SHAL_UART_TYPES.h

@@ -2,21 +2,21 @@
 // Created by Luca on 9/7/2025.
 //
 
-#ifndef SHMINGO_HAL_SHAL_UART_TYPES_H
-#define SHMINGO_HAL_SHAL_UART_TYPES_H
+#ifndef SHAL_UART_TYPES_H
+#define SHAL_UART_TYPES_H
 
 #include "SHAL_CORE.h"
-#include "SHAL_GPIO.h"
+#include "SHAL_GPIO_REG.h"
 
 enum class AF_Mask : uint8_t{
-    AF0 = 0x00,
-    AF1 = 0x01,
-    AF2 = 0x02,
-    AF3 = 0x03,
-    AF4 = 0x04,
-    AF5 = 0x05,
-    AF6 = 0x06,
-    AF7 = 0x07
+    AF0,
+    AF1,
+    AF2,
+    AF3,
+    AF4,
+    AF5,
+    AF6,
+    AF7
 };
 
 //Represents a pair of pins usable for USART Tx + Rx in combination, and their alternate function mapping