diff --git a/.gitignore b/.gitignore index 03774d9..874ac32 100644 --- a/.gitignore +++ b/.gitignore @@ -9,7 +9,10 @@ .idea/**/dictionaries .idea/**/shelf +build/ + # AWS User-specific +.idea/ .idea/**/aws.xml # Generated files diff --git a/CMakeLists.txt b/CMakeLists.txt new file mode 100644 index 0000000..8dc0306 --- /dev/null +++ b/CMakeLists.txt @@ -0,0 +1,92 @@ +cmake_minimum_required(VERSION 3.19) + +project(shmingo-HAL) +set(PROJECT_DIR ${CMAKE_CURRENT_SOURCE_DIR}) + +set(MCU_FAMILY "STM32F0xx" CACHE STRING "MCU family") +set(MCU_MODEL "" CACHE STRING "MCU model") + +set(CPU_PARAMETERS + -mcpu=cortex-m0 + -mthumb) + +set(STARTUP_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/MX/startup_stm32f072rbtx.s) +set(MCU_LINKER_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/MX/STM32F072RBTX_FLASH.ld) + +set(EXECUTABLE ${CMAKE_PROJECT_NAME}) +enable_language(C CXX ASM) +set(CMAKE_C_STANDARD 11) +set(CMAKE_C_STANDARD_REQUIRED ON) +set(CMAKE_C_EXTENSIONS ON) +set(CMAKE_CXX_STANDARD 20) +set(CMAKE_CXX_STANDARD_REQUIRED ON) +set(CMAKE_CXX_EXTENSIONS ON) + +set(MX_INCLUDE_DIRECTORIES + ${CMAKE_CURRENT_SOURCE_DIR}/Core/Include + ${CMAKE_CURRENT_SOURCE_DIR}/Core/Include/* + ${CMAKE_CURRENT_SOURCE_DIR}/Drivers/CMSIS/Device/ST/${MCU_FAMILY}/Include + ${CMAKE_CURRENT_SOURCE_DIR}/Drivers/CMSIS/Include +) + +set(PROJECT_INCLUDE_DIRECTORIES + ${CMAKE_CURRENT_SOURCE_DIR} +) + +file(GLOB_RECURSE PROJECT_SOURCES + ${CMAKE_CURRENT_SOURCE_DIR}/Core/*.c + ${CMAKE_CURRENT_SOURCE_DIR}/Core/*.cpp +) + +add_executable(${EXECUTABLE} + ${PROJECT_SOURCES} + ${STARTUP_SCRIPT} +) + +target_compile_definitions(${EXECUTABLE} PRIVATE + ${MCU_MODEL} +) + +target_include_directories(${EXECUTABLE} PRIVATE + ${MX_INCLUDE_DIRECTORIES} + ${PROJECT_INCLUDE_DIRECTORIES} +) + +target_compile_options(${EXECUTABLE} PRIVATE + ${CPU_PARAMETERS} + -Wall + -Wextra + -Wpedantic + -Wno-unused-parameter + $<$: + -Wno-volatile + -Wsuggest-override> + + $<$:-Og -g3 -ggdb> + $<$:-Og -g0> +) + +target_link_options(${EXECUTABLE} PRIVATE + -T${MCU_LINKER_SCRIPT} + ${CPU_PARAMETERS} + -Wl,-Map=${CMAKE_PROJECT_NAME}.map + --specs=nosys.specs + -Wl,--start-group + -lc + -lm + -lstdc++ + -lsupc++ + -Wl,--end-group + -Wl,--print-memory-usage +) + +add_custom_command(TARGET ${EXECUTABLE} POST_BUILD + COMMAND ${CMAKE_SIZE} $ +) + +add_custom_command(TARGET ${EXECUTABLE} POST_BUILD + COMMAND ${CMAKE_OBJCOPY} -O ihex $ + ${EXECUTABLE}.hex + COMMAND ${CMAKE_OBJCOPY} -O binary $ + ${EXECUTABLE}.bin +) \ No newline at end of file diff --git a/CMakePresets.json b/CMakePresets.json new file mode 100644 index 0000000..419987d --- /dev/null +++ b/CMakePresets.json @@ -0,0 +1,28 @@ +{ + "version": 3, + "cmakeMinimumRequired": { + "major": 3, + "minor": 19 + }, + "configurePresets": [ + { + "name": "stm32-debug", + "hidden": false, + "generator": "Ninja", + "toolchainFile": "gcc-arm-none-eabi.cmake", + "cacheVariables": { + "CMAKE_BUILD_TYPE": "Debug", + "CMAKE_EXPORT_COMPILE_COMMANDS": "ON" + } + }, + { + "name": "stm32-release", + "generator": "Ninja", + "toolchainFile": "gcc-arm-none-eabi.cmake", + "cacheVariables": { + "CMAKE_BUILD_TYPE": "Release", + "CMAKE_EXPORT_COMPILE_COMMANDS": "ON" + } + } + ] +} diff --git a/Core/Include/Reg/SHAL_TIM_REG.h b/Core/Include/Reg/SHAL_TIM_REG.h new file mode 100644 index 0000000..a53f550 --- /dev/null +++ b/Core/Include/Reg/SHAL_TIM_REG.h @@ -0,0 +1,12 @@ +#ifndef SHAL_TIM_REG +#define SHAL_TIM_REG + + +#include "stm32f0xx.h" // Or your device header + +enum class S_TIM{ //Sample + S_TIM_1 = 0xFFA0, + S_TIM_2 = 0xFF, +}; + +#endif \ No newline at end of file diff --git a/Core/Include/SHAL.h b/Core/Include/SHAL.h index ba6edaf..543b9ff 100644 --- a/Core/Include/SHAL.h +++ b/Core/Include/SHAL.h @@ -11,5 +11,4 @@ - #endif diff --git a/Core/Include/SHAL_TIM.h b/Core/Include/SHAL_TIM.h new file mode 100644 index 0000000..3965a9b --- /dev/null +++ b/Core/Include/SHAL_TIM.h @@ -0,0 +1,8 @@ +#ifndef SHAL_TIM_H +#define SHAL_TIM_H + +#include "SHAL_TIM_REG.h" + + + +#endif \ No newline at end of file diff --git a/Core/Src/main.cpp b/Core/Src/main.cpp index cba3293..8ff242f 100644 --- a/Core/Src/main.cpp +++ b/Core/Src/main.cpp @@ -1,4 +1,5 @@ -#include "stm32f0xx.h" // Or your device header +#include "SHAL.h" +#include "stm32f0xx.h" volatile int prev_button = false; volatile int curr_button = false; @@ -6,14 +7,14 @@ volatile int curr_button = false; extern "C" void TIM2_IRQHandler(void){ if(TIM2->SR & TIM_SR_UIF){ TIM2->SR &= ~TIM_SR_UIF; - GPIOA->ODR ^= (1 << 5); + GPIOA->ODR ^= (1 << 4); } } extern "C" void EXTI0_1_IRQHandler(void) { if (EXTI->PR & (1 << 0)) { //Check pending flag EXTI->PR |= (1 << 0); //Clear it by writing 1 - GPIOA->ODR ^= (1 << 4); + GPIOA->ODR ^= (1 << 5); } } @@ -53,7 +54,7 @@ int main() { __enable_irq(); - while (1) { + while (true) { __WFI(); } } diff --git a/MX/STM32F072RBTX_FLASH.ld b/MX/STM32F072RBTX_FLASH.ld new file mode 100644 index 0000000..39487b1 --- /dev/null +++ b/MX/STM32F072RBTX_FLASH.ld @@ -0,0 +1,187 @@ +/* +****************************************************************************** +** +** @file : LinkerScript.ld +** +** @author : Auto-generated by STM32CubeIDE +** +** Abstract : Linker script for NUCLEO-F072RB Board embedding STM32F072RBTx Device from stm32f0 series +** 128KBytes FLASH +** 16KBytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is, without any warranty +** of any kind. +** +****************************************************************************** +** @attention +** +** Copyright (c) 2025 STMicroelectronics. +** All rights reserved. +** +** This software is licensed under terms that can be found in the LICENSE file +** in the root directory of this software component. +** If no LICENSE file comes with this software, it is provided AS-IS. +** +****************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 16K + FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 128K +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "FLASH" Rom type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data into "FLASH" Rom type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data into "FLASH" Rom type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >FLASH + + .ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >FLASH + + .preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >FLASH + + .init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >FLASH + + .fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >FLASH + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + *(.RamFunc) /* .RamFunc sections */ + *(.RamFunc*) /* .RamFunc* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM AT> FLASH + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/Core/Startup/startup_stm32f072rbtx.s b/MX/startup_stm32f072rbtx.s similarity index 100% rename from Core/Startup/startup_stm32f072rbtx.s rename to MX/startup_stm32f072rbtx.s diff --git a/Makefile b/Makefile new file mode 100644 index 0000000..4faa71c --- /dev/null +++ b/Makefile @@ -0,0 +1,41 @@ +.PHONY: all build cmake clean format + +# --- Configurable variables --- +BUILD_DIR := build +BUILD_TYPE ?= Debug +TOOLCHAIN := gcc-arm-none-eabi.cmake + +# MCU target (override on command line: make build MCU_MODEL=STM32F051x8) +MCU_MODEL ?= STM32F072xB +MCU_FAMILY ?= STM32F0xx + +# --- Default target --- +all: build + +# --- Configure step (runs CMake if build dir missing or stale) --- +${BUILD_DIR}/build.ninja: + cmake \ + -G Ninja \ + -B ${BUILD_DIR} \ + -DCMAKE_BUILD_TYPE=${BUILD_TYPE} \ + -DCMAKE_TOOLCHAIN_FILE=${TOOLCHAIN} \ + -DCMAKE_EXPORT_COMPILE_COMMANDS=ON \ + -DMCU_MODEL=$(MCU_MODEL) \ + -DMCU_FAMILY=$(MCU_FAMILY) + +cmake: ${BUILD_DIR}/build.ninja + +# --- Build step --- +build: cmake + cmake --build ${BUILD_DIR} + +# --- Format all sources --- +SRCS := $(shell find . -type f \( -name '*.[ch]' -o -name '*.[ch]pp' \)) +format: $(addsuffix .format,${SRCS}) + +%.format: % + clang-format -i $< + +# --- Clean --- +clean: + rm -rf ${BUILD_DIR} compile_commands.json diff --git a/gcc-arm-none-eabi.cmake b/gcc-arm-none-eabi.cmake new file mode 100644 index 0000000..28fb92d --- /dev/null +++ b/gcc-arm-none-eabi.cmake @@ -0,0 +1,22 @@ +set(CMAKE_SYSTEM_NAME Generic) +set(CMAKE_SYSTEM_PROCESSOR arm) + +set(TOOLCHAIN_PREFIX arm-none-eabi-) + +set(CMAKE_C_COMPILER ${TOOLCHAIN_PREFIX}gcc) +set(CMAKE_CXX_COMPILER ${TOOLCHAIN_PREFIX}g++) +set(CMAKE_ASM_COMPILER ${TOOLCHAIN_PREFIX}gcc) + +set(CMAKE_OBJCOPY ${TOOLCHAIN_PREFIX}objcopy) +set(CMAKE_SIZE ${TOOLCHAIN_PREFIX}size) + +set(COMMON_FLAGS "-mcpu=cortex-m0 -mthumb -fdata-sections -ffunction-sections") +set(CMAKE_C_FLAGS_INIT "${COMMON_FLAGS} --specs=nano.specs") +set(CMAKE_CXX_FLAGS_INIT "${COMMON_FLAGS} -fno-rtti -fno-exceptions -fno-threadsafe-statics --specs=nano.specs") + + +set(CMAKE_EXECUTABLE_SUFFIX_ASM ".elf") +set(CMAKE_EXECUTABLE_SUFFIX_C ".elf") +set(CMAKE_EXECUTABLE_SUFFIX_CXX ".elf") + +set(CMAKE_TRY_COMPILE_TARGET_TYPE STATIC_LIBRARY) \ No newline at end of file