From db9aa71839b76aea102e6e9ab0a211bb42bef3ac Mon Sep 17 00:00:00 2001 From: Luca Date: Tue, 26 Aug 2025 16:33:54 -0700 Subject: [PATCH 1/4] Add first timer files --- Core/Include/Reg/SHAL_TIM_REG.h | 10 ++++++++++ Core/Include/SHAL.h | 2 ++ Core/Include/SHAL_TIM.h | 8 ++++++++ Core/Src/main.cpp | 1 + 4 files changed, 21 insertions(+) create mode 100644 Core/Include/Reg/SHAL_TIM_REG.h create mode 100644 Core/Include/SHAL_TIM.h diff --git a/Core/Include/Reg/SHAL_TIM_REG.h b/Core/Include/Reg/SHAL_TIM_REG.h new file mode 100644 index 0000000..1809ef5 --- /dev/null +++ b/Core/Include/Reg/SHAL_TIM_REG.h @@ -0,0 +1,10 @@ +#ifndef SHAL_TIM_REG +#define SHAL_TIM_REG + + +enum class S_TIM{ //Sample + TIM1 = 0xFFA0, + TIM2, +}; + +#endif \ No newline at end of file diff --git a/Core/Include/SHAL.h b/Core/Include/SHAL.h index ba6edaf..9699f8a 100644 --- a/Core/Include/SHAL.h +++ b/Core/Include/SHAL.h @@ -8,6 +8,8 @@ #ifndef SHAL_H #define SHAL_H +#define STM32F072xB + diff --git a/Core/Include/SHAL_TIM.h b/Core/Include/SHAL_TIM.h new file mode 100644 index 0000000..5baca1b --- /dev/null +++ b/Core/Include/SHAL_TIM.h @@ -0,0 +1,8 @@ +#ifndef SHAL_TIM_H +#define SHAL_TIM_H + +#include "Reg/SHAL_TIM_REG.h" + + + +#endif \ No newline at end of file diff --git a/Core/Src/main.cpp b/Core/Src/main.cpp index cba3293..dad7f2c 100644 --- a/Core/Src/main.cpp +++ b/Core/Src/main.cpp @@ -1,3 +1,4 @@ +#include "SHAL.h" #include "stm32f0xx.h" // Or your device header volatile int prev_button = false; From 6e6add14a8a4faf83298ff079d34a33756a422c1 Mon Sep 17 00:00:00 2001 From: Luca Date: Wed, 27 Aug 2025 18:51:19 -0700 Subject: [PATCH 2/4] Switched to CMake --- CMakeLists.txt | 92 ++++++++++++ CMakePresets.json | 28 ++++ MX/STM32F072RBTX_FLASH.ld | 187 +++++++++++++++++++++++ MX/startup_stm32f072rbtx.s | 294 +++++++++++++++++++++++++++++++++++++ compile_commands.json | 32 ++++ gcc-arm-none-eabi.cmake | 22 +++ 6 files changed, 655 insertions(+) create mode 100644 CMakeLists.txt create mode 100644 CMakePresets.json create mode 100644 MX/STM32F072RBTX_FLASH.ld create mode 100644 MX/startup_stm32f072rbtx.s create mode 100644 compile_commands.json create mode 100644 gcc-arm-none-eabi.cmake diff --git a/CMakeLists.txt b/CMakeLists.txt new file mode 100644 index 0000000..8b4a848 --- /dev/null +++ b/CMakeLists.txt @@ -0,0 +1,92 @@ +cmake_minimum_required(VERSION 3.19) + +project(shmingo-HAL) +set(PROJECT_DIR ${CMAKE_CURRENT_SOURCE_DIR}) + +set(MCU_FAMILY STM32F0xx) +set(MCU_MODEL STM32F072xx) +set(CPU_PARAMETERS + -mcpu=cortex-m0 + -mthumb) + +set(STARTUP_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/MX/startup_stm32f072rbtx.s) +set(MCU_LINKER_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/MX/STM32F072RBTX_FLASH.ld) + +set(EXECUTABLE ${CMAKE_PROJECT_NAME}) +enable_language(C CXX ASM) +set(CMAKE_C_STANDARD 11) +set(CMAKE_C_STANDARD_REQUIRED ON) +set(CMAKE_C_EXTENSIONS ON) +set(CMAKE_CXX_STANDARD 20) +set(CMAKE_CXX_STANDARD_REQUIRED ON) +set(CMAKE_CXX_EXTENSIONS ON) + +set(MX_INCLUDE_DIRECTORIES + ${CMAKE_CURRENT_SOURCE_DIR}/Core/Include + ${CMAKE_CURRENT_SOURCE_DIR}/Core/Include/* + ${CMAKE_CURRENT_SOURCE_DIR}/Drivers/CMSIS/Device/ST/${MCU_FAMILY}/Include + ${CMAKE_CURRENT_SOURCE_DIR}/Drivers/CMSIS/Include +) + +set(PROJECT_INCLUDE_DIRECTORIES + ${CMAKE_CURRENT_SOURCE_DIR} +) + +file(GLOB_RECURSE PROJECT_SOURCES + ${CMAKE_CURRENT_SOURCE_DIR}/Core/*.c + ${CMAKE_CURRENT_SOURCE_DIR}/Core/*.cpp +) + +add_executable(${EXECUTABLE} + ${PROJECT_SOURCES} + ${STARTUP_SCRIPT} +) + +target_compile_definitions(${EXECUTABLE} PRIVATE + ${MCU_MODEL} +) + +target_include_directories(${EXECUTABLE} PRIVATE + ${MX_INCLUDE_DIRECTORIES} + ${PROJECT_INCLUDE_DIRECTORIES} +) + +target_compile_options(${EXECUTABLE} PRIVATE + ${CPU_PARAMETERS} + -Wall + -Wextra + -Wpedantic + -Wno-unused-parameter + $<$: + -Wno-volatile + -Wuseless-cast + -Wsuggest-override> + + $<$:-Og -g3 -ggdb> + $<$:-Og -g0> +) + +target_link_options(${EXECUTABLE} PRIVATE + -T${MCU_LINKER_SCRIPT} + ${CPU_PARAMETERS} + -Wl,-Map=${CMAKE_PROJECT_NAME}.map + --specs=nosys.specs + -Wl,--start-group + -lc + -lm + -lstdc++ + -lsupc++ + -Wl,--end-group + -Wl,--print-memory-usage +) + +add_custom_command(TARGET ${EXECUTABLE} POST_BUILD + COMMAND ${CMAKE_SIZE} $ +) + +add_custom_command(TARGET ${EXECUTABLE} POST_BUILD + COMMAND ${CMAKE_OBJCOPY} -O ihex $ + ${EXECUTABLE}.hex + COMMAND ${CMAKE_OBJCOPY} -O binary $ + ${EXECUTABLE}.bin +) \ No newline at end of file diff --git a/CMakePresets.json b/CMakePresets.json new file mode 100644 index 0000000..419987d --- /dev/null +++ b/CMakePresets.json @@ -0,0 +1,28 @@ +{ + "version": 3, + "cmakeMinimumRequired": { + "major": 3, + "minor": 19 + }, + "configurePresets": [ + { + "name": "stm32-debug", + "hidden": false, + "generator": "Ninja", + "toolchainFile": "gcc-arm-none-eabi.cmake", + "cacheVariables": { + "CMAKE_BUILD_TYPE": "Debug", + "CMAKE_EXPORT_COMPILE_COMMANDS": "ON" + } + }, + { + "name": "stm32-release", + "generator": "Ninja", + "toolchainFile": "gcc-arm-none-eabi.cmake", + "cacheVariables": { + "CMAKE_BUILD_TYPE": "Release", + "CMAKE_EXPORT_COMPILE_COMMANDS": "ON" + } + } + ] +} diff --git a/MX/STM32F072RBTX_FLASH.ld b/MX/STM32F072RBTX_FLASH.ld new file mode 100644 index 0000000..39487b1 --- /dev/null +++ b/MX/STM32F072RBTX_FLASH.ld @@ -0,0 +1,187 @@ +/* +****************************************************************************** +** +** @file : LinkerScript.ld +** +** @author : Auto-generated by STM32CubeIDE +** +** Abstract : Linker script for NUCLEO-F072RB Board embedding STM32F072RBTx Device from stm32f0 series +** 128KBytes FLASH +** 16KBytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is, without any warranty +** of any kind. +** +****************************************************************************** +** @attention +** +** Copyright (c) 2025 STMicroelectronics. +** All rights reserved. +** +** This software is licensed under terms that can be found in the LICENSE file +** in the root directory of this software component. +** If no LICENSE file comes with this software, it is provided AS-IS. +** +****************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 16K + FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 128K +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "FLASH" Rom type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data into "FLASH" Rom type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data into "FLASH" Rom type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >FLASH + + .ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >FLASH + + .preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >FLASH + + .init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >FLASH + + .fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >FLASH + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + *(.RamFunc) /* .RamFunc sections */ + *(.RamFunc*) /* .RamFunc* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM AT> FLASH + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/MX/startup_stm32f072rbtx.s b/MX/startup_stm32f072rbtx.s new file mode 100644 index 0000000..ba7b08a --- /dev/null +++ b/MX/startup_stm32f072rbtx.s @@ -0,0 +1,294 @@ +/** + ****************************************************************************** + * @file startup_stm32f072xb.s + * @author MCD Application Team + * @brief STM32F072x8/STM32F072xB devices vector table for GCC toolchain. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M0 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * @attention + * + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m0 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr r0, =_estack + mov sp, r0 /* set stack pointer */ + +/* Call the clock system initialization function.*/ + bl SystemInit + +/* Copy the data segment initializers from flash to SRAM */ + ldr r0, =_sdata + ldr r1, =_edata + ldr r2, =_sidata + movs r3, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r4, [r2, r3] + str r4, [r0, r3] + adds r3, r3, #4 + +LoopCopyDataInit: + adds r4, r0, r3 + cmp r4, r1 + bcc CopyDataInit + +/* Zero fill the bss segment. */ + ldr r2, =_sbss + ldr r4, =_ebss + movs r3, #0 + b LoopFillZerobss + +FillZerobss: + str r3, [r2] + adds r2, r2, #4 + +LoopFillZerobss: + cmp r2, r4 + bcc FillZerobss + +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + +LoopForever: + b LoopForever + + +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * + * @param None + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex M0. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word 0 + .word 0 + .word PendSV_Handler + .word SysTick_Handler + .word WWDG_IRQHandler /* Window WatchDog */ + .word PVD_VDDIO2_IRQHandler /* PVD and VDDIO2 through EXTI Line detect */ + .word RTC_IRQHandler /* RTC through the EXTI line */ + .word FLASH_IRQHandler /* FLASH */ + .word RCC_CRS_IRQHandler /* RCC and CRS */ + .word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */ + .word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */ + .word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */ + .word TSC_IRQHandler /* TSC */ + .word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */ + .word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */ + .word DMA1_Channel4_5_6_7_IRQHandler /* DMA1 Channel 4, Channel 5, Channel 6 and Channel 7*/ + .word ADC1_COMP_IRQHandler /* ADC1, COMP1 and COMP2 */ + .word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */ + .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ + .word TIM2_IRQHandler /* TIM2 */ + .word TIM3_IRQHandler /* TIM3 */ + .word TIM6_DAC_IRQHandler /* TIM6 and DAC */ + .word TIM7_IRQHandler /* TIM7 */ + .word TIM14_IRQHandler /* TIM14 */ + .word TIM15_IRQHandler /* TIM15 */ + .word TIM16_IRQHandler /* TIM16 */ + .word TIM17_IRQHandler /* TIM17 */ + .word I2C1_IRQHandler /* I2C1 */ + .word I2C2_IRQHandler /* I2C2 */ + .word SPI1_IRQHandler /* SPI1 */ + .word SPI2_IRQHandler /* SPI2 */ + .word USART1_IRQHandler /* USART1 */ + .word USART2_IRQHandler /* USART2 */ + .word USART3_4_IRQHandler /* USART3 and USART4 */ + .word CEC_CAN_IRQHandler /* CEC and CAN */ + .word USB_IRQHandler /* USB */ + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_VDDIO2_IRQHandler + .thumb_set PVD_VDDIO2_IRQHandler,Default_Handler + + .weak RTC_IRQHandler + .thumb_set RTC_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_CRS_IRQHandler + .thumb_set RCC_CRS_IRQHandler,Default_Handler + + .weak EXTI0_1_IRQHandler + .thumb_set EXTI0_1_IRQHandler,Default_Handler + + .weak EXTI2_3_IRQHandler + .thumb_set EXTI2_3_IRQHandler,Default_Handler + + .weak EXTI4_15_IRQHandler + .thumb_set EXTI4_15_IRQHandler,Default_Handler + + .weak TSC_IRQHandler + .thumb_set TSC_IRQHandler,Default_Handler + + .weak DMA1_Channel1_IRQHandler + .thumb_set DMA1_Channel1_IRQHandler,Default_Handler + + .weak DMA1_Channel2_3_IRQHandler + .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler + + .weak DMA1_Channel4_5_6_7_IRQHandler + .thumb_set DMA1_Channel4_5_6_7_IRQHandler,Default_Handler + + .weak ADC1_COMP_IRQHandler + .thumb_set ADC1_COMP_IRQHandler,Default_Handler + + .weak TIM1_BRK_UP_TRG_COM_IRQHandler + .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Default_Handler + + .weak TIM14_IRQHandler + .thumb_set TIM14_IRQHandler,Default_Handler + + .weak TIM15_IRQHandler + .thumb_set TIM15_IRQHandler,Default_Handler + + .weak TIM16_IRQHandler + .thumb_set TIM16_IRQHandler,Default_Handler + + .weak TIM17_IRQHandler + .thumb_set TIM17_IRQHandler,Default_Handler + + .weak I2C1_IRQHandler + .thumb_set I2C1_IRQHandler,Default_Handler + + .weak I2C2_IRQHandler + .thumb_set I2C2_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_4_IRQHandler + .thumb_set USART3_4_IRQHandler,Default_Handler + + .weak CEC_CAN_IRQHandler + .thumb_set CEC_CAN_IRQHandler,Default_Handler + + .weak USB_IRQHandler + .thumb_set USB_IRQHandler,Default_Handler + + + diff --git a/compile_commands.json b/compile_commands.json new file mode 100644 index 0000000..a4e5259 --- /dev/null +++ b/compile_commands.json @@ -0,0 +1,32 @@ +[ +{ + "directory": "E:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL", + "command": "C:\\PROGRA~2\\ARMGNU~1\\142BCE~1.3RE\\bin\\AR19DD~1.EXE -DSTM32F072xx -IE:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL/Core/Include -IE:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL/Core/Include/* -IE:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL/Drivers/CMSIS/Device/ST/STM32F0xx/Include -IE:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL/Drivers/CMSIS/Include -IE:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL -mcpu=cortex-m0 -mthumb -fdata-sections -ffunction-sections --specs=nano.specs -g -std=gnu11 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-IE:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL -g -mcpu=cortex-m0 -mthumb -Wall -Wextra -Wpedantic -Wno-unused-parameter -Og -g3 -ggdb -o CMakeFiles\\shmingo-HAL.dir\\MX\\startup_stm32f072rbtx.s.obj -c E:\\Projects\\Embedded\\Shmingo-HAL\\Shmingo-HAL\\MX\\startup_stm32f072rbtx.s", + "file": "E:\\Projects\\Embedded\\Shmingo-HAL\\Shmingo-HAL\\MX\\startup_stm32f072rbtx.s", + "output": "CMakeFiles\\shmingo-HAL.dir\\MX\\startup_stm32f072rbtx.s.obj" +} +] \ No newline at end of file diff --git a/gcc-arm-none-eabi.cmake b/gcc-arm-none-eabi.cmake new file mode 100644 index 0000000..28fb92d --- /dev/null +++ b/gcc-arm-none-eabi.cmake @@ -0,0 +1,22 @@ +set(CMAKE_SYSTEM_NAME Generic) +set(CMAKE_SYSTEM_PROCESSOR arm) + +set(TOOLCHAIN_PREFIX arm-none-eabi-) + +set(CMAKE_C_COMPILER ${TOOLCHAIN_PREFIX}gcc) +set(CMAKE_CXX_COMPILER ${TOOLCHAIN_PREFIX}g++) +set(CMAKE_ASM_COMPILER ${TOOLCHAIN_PREFIX}gcc) + +set(CMAKE_OBJCOPY ${TOOLCHAIN_PREFIX}objcopy) +set(CMAKE_SIZE ${TOOLCHAIN_PREFIX}size) + +set(COMMON_FLAGS "-mcpu=cortex-m0 -mthumb -fdata-sections -ffunction-sections") +set(CMAKE_C_FLAGS_INIT "${COMMON_FLAGS} --specs=nano.specs") +set(CMAKE_CXX_FLAGS_INIT "${COMMON_FLAGS} -fno-rtti -fno-exceptions -fno-threadsafe-statics --specs=nano.specs") + + +set(CMAKE_EXECUTABLE_SUFFIX_ASM ".elf") +set(CMAKE_EXECUTABLE_SUFFIX_C ".elf") +set(CMAKE_EXECUTABLE_SUFFIX_CXX ".elf") + +set(CMAKE_TRY_COMPILE_TARGET_TYPE STATIC_LIBRARY) \ No newline at end of file From 385d6c3728fc91415ea3b4566e10d7426f2fe704 Mon Sep 17 00:00:00 2001 From: Luca Date: Wed, 27 Aug 2025 18:54:08 -0700 Subject: [PATCH 3/4] Removed compile commands --- compile_commands.json | 32 -------------------------------- 1 file changed, 32 deletions(-) delete mode 100644 compile_commands.json diff --git a/compile_commands.json b/compile_commands.json deleted file mode 100644 index a4e5259..0000000 --- a/compile_commands.json +++ /dev/null @@ -1,32 +0,0 @@ -[ -{ - "directory": "E:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL", - "command": "C:\\PROGRA~2\\ARMGNU~1\\142BCE~1.3RE\\bin\\AR19DD~1.EXE -DSTM32F072xx -IE:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL/Core/Include -IE:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL/Core/Include/* -IE:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL/Drivers/CMSIS/Device/ST/STM32F0xx/Include -IE:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL/Drivers/CMSIS/Include -IE:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL -mcpu=cortex-m0 -mthumb -fdata-sections -ffunction-sections --specs=nano.specs -g -std=gnu11 -fdiagnostics-color=always -mcpu=cortex-m0 -mthumb -Wall -Wextra -Wpedantic -Wno-unused-parameter -Og -g3 -ggdb -o CMakeFiles\\shmingo-HAL.dir\\Core\\Src\\System\\syscalls.c.obj -c E:\\Projects\\Embedded\\Shmingo-HAL\\Shmingo-HAL\\Core\\Src\\System\\syscalls.c", - "file": "E:\\Projects\\Embedded\\Shmingo-HAL\\Shmingo-HAL\\Core\\Src\\System\\syscalls.c", - "output": "CMakeFiles\\shmingo-HAL.dir\\Core\\Src\\System\\syscalls.c.obj" -}, -{ - "directory": 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"CMakeFiles\\shmingo-HAL.dir\\Core\\Src\\System\\system_stm32f0xx.c.obj" -}, -{ - "directory": "E:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL", - "command": "C:\\PROGRA~2\\ARMGNU~1\\142BCE~1.3RE\\bin\\AR10B2~1.EXE -DSTM32F072xx -IE:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL/Core/Include -IE:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL/Core/Include/* -IE:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL/Drivers/CMSIS/Device/ST/STM32F0xx/Include -IE:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL/Drivers/CMSIS/Include -IE:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL -mcpu=cortex-m0 -mthumb -fdata-sections -ffunction-sections -fno-rtti -fno-exceptions -fno-threadsafe-statics --specs=nano.specs -g -std=gnu++20 -fdiagnostics-color=always -mcpu=cortex-m0 -mthumb -Wall -Wextra -Wpedantic -Wno-unused-parameter -Wno-volatile -Wuseless-cast -Wsuggest-override -Og -g3 -ggdb -o CMakeFiles\\shmingo-HAL.dir\\Core\\Src\\main.cpp.obj -c E:\\Projects\\Embedded\\Shmingo-HAL\\Shmingo-HAL\\Core\\Src\\main.cpp", - "file": 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"CMakeFiles\\shmingo-HAL.dir\\MX\\startup_stm32f072rbtx.s.obj" -} -] \ No newline at end of file From 1598e13a5aea1defde225cd948b3d7946576ff2f Mon Sep 17 00:00:00 2001 From: Luca Date: Wed, 27 Aug 2025 23:06:57 -0700 Subject: [PATCH 4/4] Cleanup and finish build system --- .gitignore | 3 + CMakeLists.txt | 6 +- Core/Include/Reg/SHAL_TIM_REG.h | 6 +- Core/Include/SHAL.h | 3 - Core/Include/SHAL_TIM.h | 2 +- Core/Src/main.cpp | 8 +- Core/Startup/startup_stm32f072rbtx.s | 294 --------------------------- Makefile | 41 ++++ 8 files changed, 56 insertions(+), 307 deletions(-) delete mode 100644 Core/Startup/startup_stm32f072rbtx.s create mode 100644 Makefile diff --git a/.gitignore b/.gitignore index 03774d9..874ac32 100644 --- a/.gitignore +++ b/.gitignore @@ -9,7 +9,10 @@ .idea/**/dictionaries .idea/**/shelf +build/ + # AWS User-specific +.idea/ .idea/**/aws.xml # Generated files diff --git a/CMakeLists.txt b/CMakeLists.txt index 8b4a848..8dc0306 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -3,8 +3,9 @@ cmake_minimum_required(VERSION 3.19) project(shmingo-HAL) set(PROJECT_DIR ${CMAKE_CURRENT_SOURCE_DIR}) -set(MCU_FAMILY STM32F0xx) -set(MCU_MODEL STM32F072xx) +set(MCU_FAMILY "STM32F0xx" CACHE STRING "MCU family") +set(MCU_MODEL "" CACHE STRING "MCU model") + set(CPU_PARAMETERS -mcpu=cortex-m0 -mthumb) @@ -59,7 +60,6 @@ target_compile_options(${EXECUTABLE} PRIVATE -Wno-unused-parameter $<$: -Wno-volatile - -Wuseless-cast -Wsuggest-override> $<$:-Og -g3 -ggdb> diff --git a/Core/Include/Reg/SHAL_TIM_REG.h b/Core/Include/Reg/SHAL_TIM_REG.h index 1809ef5..a53f550 100644 --- a/Core/Include/Reg/SHAL_TIM_REG.h +++ b/Core/Include/Reg/SHAL_TIM_REG.h @@ -2,9 +2,11 @@ #define SHAL_TIM_REG +#include "stm32f0xx.h" // Or your device header + enum class S_TIM{ //Sample - TIM1 = 0xFFA0, - TIM2, + S_TIM_1 = 0xFFA0, + S_TIM_2 = 0xFF, }; #endif \ No newline at end of file diff --git a/Core/Include/SHAL.h b/Core/Include/SHAL.h index 9699f8a..543b9ff 100644 --- a/Core/Include/SHAL.h +++ b/Core/Include/SHAL.h @@ -8,9 +8,6 @@ #ifndef SHAL_H #define SHAL_H -#define STM32F072xB - - diff --git a/Core/Include/SHAL_TIM.h b/Core/Include/SHAL_TIM.h index 5baca1b..3965a9b 100644 --- a/Core/Include/SHAL_TIM.h +++ b/Core/Include/SHAL_TIM.h @@ -1,7 +1,7 @@ #ifndef SHAL_TIM_H #define SHAL_TIM_H -#include "Reg/SHAL_TIM_REG.h" +#include "SHAL_TIM_REG.h" diff --git a/Core/Src/main.cpp b/Core/Src/main.cpp index dad7f2c..8ff242f 100644 --- a/Core/Src/main.cpp +++ b/Core/Src/main.cpp @@ -1,5 +1,5 @@ #include "SHAL.h" -#include "stm32f0xx.h" // Or your device header +#include "stm32f0xx.h" volatile int prev_button = false; volatile int curr_button = false; @@ -7,14 +7,14 @@ volatile int curr_button = false; extern "C" void TIM2_IRQHandler(void){ if(TIM2->SR & TIM_SR_UIF){ TIM2->SR &= ~TIM_SR_UIF; - GPIOA->ODR ^= (1 << 5); + GPIOA->ODR ^= (1 << 4); } } extern "C" void EXTI0_1_IRQHandler(void) { if (EXTI->PR & (1 << 0)) { //Check pending flag EXTI->PR |= (1 << 0); //Clear it by writing 1 - GPIOA->ODR ^= (1 << 4); + GPIOA->ODR ^= (1 << 5); } } @@ -54,7 +54,7 @@ int main() { __enable_irq(); - while (1) { + while (true) { __WFI(); } } diff --git a/Core/Startup/startup_stm32f072rbtx.s b/Core/Startup/startup_stm32f072rbtx.s deleted file mode 100644 index ba7b08a..0000000 --- a/Core/Startup/startup_stm32f072rbtx.s +++ /dev/null @@ -1,294 +0,0 @@ -/** - ****************************************************************************** - * @file startup_stm32f072xb.s - * @author MCD Application Team - * @brief STM32F072x8/STM32F072xB devices vector table for GCC toolchain. - * This module performs: - * - Set the initial SP - * - Set the initial PC == Reset_Handler, - * - Set the vector table entries with the exceptions ISR address - * - Branches to main in the C library (which eventually - * calls main()). - * After Reset the Cortex-M0 processor is in Thread mode, - * priority is Privileged, and the Stack is set to Main. - ****************************************************************************** - * @attention - * - * Copyright (c) 2016 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - - .syntax unified - .cpu cortex-m0 - .fpu softvfp - .thumb - -.global g_pfnVectors -.global Default_Handler - -/* start address for the initialization values of the .data section. -defined in linker script */ -.word _sidata -/* start address for the .data section. defined in linker script */ -.word _sdata -/* end address for the .data section. defined in linker script */ -.word _edata -/* start address for the .bss section. defined in linker script */ -.word _sbss -/* end address for the .bss section. defined in linker script */ -.word _ebss - - .section .text.Reset_Handler - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - ldr r0, =_estack - mov sp, r0 /* set stack pointer */ - -/* Call the clock system initialization function.*/ - bl SystemInit - -/* Copy the data segment initializers from flash to SRAM */ - ldr r0, =_sdata - ldr r1, =_edata - ldr r2, =_sidata - movs r3, #0 - b LoopCopyDataInit - -CopyDataInit: - ldr r4, [r2, r3] - str r4, [r0, r3] - adds r3, r3, #4 - -LoopCopyDataInit: - adds r4, r0, r3 - cmp r4, r1 - bcc CopyDataInit - -/* Zero fill the bss segment. */ - ldr r2, =_sbss - ldr r4, =_ebss - movs r3, #0 - b LoopFillZerobss - -FillZerobss: - str r3, [r2] - adds r2, r2, #4 - -LoopFillZerobss: - cmp r2, r4 - bcc FillZerobss - -/* Call static constructors */ - bl __libc_init_array -/* Call the application's entry point.*/ - bl main - -LoopForever: - b LoopForever - - -.size Reset_Handler, .-Reset_Handler - -/** - * @brief This is the code that gets called when the processor receives an - * unexpected interrupt. This simply enters an infinite loop, preserving - * the system state for examination by a debugger. - * - * @param None - * @retval : None -*/ - .section .text.Default_Handler,"ax",%progbits -Default_Handler: -Infinite_Loop: - b Infinite_Loop - .size Default_Handler, .-Default_Handler -/****************************************************************************** -* -* The minimal vector table for a Cortex M0. Note that the proper constructs -* must be placed on this to ensure that it ends up at physical address -* 0x0000.0000. -* -******************************************************************************/ - .section .isr_vector,"a",%progbits - .type g_pfnVectors, %object - .size g_pfnVectors, .-g_pfnVectors - - -g_pfnVectors: - .word _estack - .word Reset_Handler - .word NMI_Handler - .word HardFault_Handler - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word SVC_Handler - .word 0 - .word 0 - .word PendSV_Handler - .word SysTick_Handler - .word WWDG_IRQHandler /* Window WatchDog */ - .word PVD_VDDIO2_IRQHandler /* PVD and VDDIO2 through EXTI Line detect */ - .word RTC_IRQHandler /* RTC through the EXTI line */ - .word FLASH_IRQHandler /* FLASH */ - .word RCC_CRS_IRQHandler /* RCC and CRS */ - .word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */ - .word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */ - .word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */ - .word TSC_IRQHandler /* TSC */ - .word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */ - .word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */ - .word DMA1_Channel4_5_6_7_IRQHandler /* DMA1 Channel 4, Channel 5, Channel 6 and Channel 7*/ - .word ADC1_COMP_IRQHandler /* ADC1, COMP1 and COMP2 */ - .word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */ - .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ - .word TIM2_IRQHandler /* TIM2 */ - .word TIM3_IRQHandler /* TIM3 */ - .word TIM6_DAC_IRQHandler /* TIM6 and DAC */ - .word TIM7_IRQHandler /* TIM7 */ - .word TIM14_IRQHandler /* TIM14 */ - .word TIM15_IRQHandler /* TIM15 */ - .word TIM16_IRQHandler /* TIM16 */ - .word TIM17_IRQHandler /* TIM17 */ - .word I2C1_IRQHandler /* I2C1 */ - .word I2C2_IRQHandler /* I2C2 */ - .word SPI1_IRQHandler /* SPI1 */ - .word SPI2_IRQHandler /* SPI2 */ - .word USART1_IRQHandler /* USART1 */ - .word USART2_IRQHandler /* USART2 */ - .word USART3_4_IRQHandler /* USART3 and USART4 */ - .word CEC_CAN_IRQHandler /* CEC and CAN */ - .word USB_IRQHandler /* USB */ - -/******************************************************************************* -* -* Provide weak aliases for each Exception handler to the Default_Handler. -* As they are weak aliases, any function with the same name will override -* this definition. -* -*******************************************************************************/ - - .weak NMI_Handler - .thumb_set NMI_Handler,Default_Handler - - .weak HardFault_Handler - .thumb_set HardFault_Handler,Default_Handler - - .weak SVC_Handler - .thumb_set SVC_Handler,Default_Handler - - .weak PendSV_Handler - .thumb_set PendSV_Handler,Default_Handler - - .weak SysTick_Handler - .thumb_set SysTick_Handler,Default_Handler - - .weak WWDG_IRQHandler - .thumb_set WWDG_IRQHandler,Default_Handler - - .weak PVD_VDDIO2_IRQHandler - .thumb_set PVD_VDDIO2_IRQHandler,Default_Handler - - .weak RTC_IRQHandler - .thumb_set RTC_IRQHandler,Default_Handler - - .weak FLASH_IRQHandler - .thumb_set FLASH_IRQHandler,Default_Handler - - .weak RCC_CRS_IRQHandler - .thumb_set RCC_CRS_IRQHandler,Default_Handler - - .weak EXTI0_1_IRQHandler - .thumb_set EXTI0_1_IRQHandler,Default_Handler - - .weak EXTI2_3_IRQHandler - .thumb_set EXTI2_3_IRQHandler,Default_Handler - - .weak EXTI4_15_IRQHandler - .thumb_set EXTI4_15_IRQHandler,Default_Handler - - .weak TSC_IRQHandler - .thumb_set TSC_IRQHandler,Default_Handler - - .weak DMA1_Channel1_IRQHandler - .thumb_set DMA1_Channel1_IRQHandler,Default_Handler - - .weak DMA1_Channel2_3_IRQHandler - .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler - - .weak DMA1_Channel4_5_6_7_IRQHandler - .thumb_set DMA1_Channel4_5_6_7_IRQHandler,Default_Handler - - .weak ADC1_COMP_IRQHandler - .thumb_set ADC1_COMP_IRQHandler,Default_Handler - - .weak TIM1_BRK_UP_TRG_COM_IRQHandler - .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler - - .weak TIM1_CC_IRQHandler - .thumb_set TIM1_CC_IRQHandler,Default_Handler - - .weak TIM2_IRQHandler - .thumb_set TIM2_IRQHandler,Default_Handler - - .weak TIM3_IRQHandler - .thumb_set TIM3_IRQHandler,Default_Handler - - .weak TIM6_DAC_IRQHandler - .thumb_set TIM6_DAC_IRQHandler,Default_Handler - - .weak TIM7_IRQHandler - .thumb_set TIM7_IRQHandler,Default_Handler - - .weak TIM14_IRQHandler - .thumb_set TIM14_IRQHandler,Default_Handler - - .weak TIM15_IRQHandler - .thumb_set TIM15_IRQHandler,Default_Handler - - .weak TIM16_IRQHandler - .thumb_set TIM16_IRQHandler,Default_Handler - - .weak TIM17_IRQHandler - .thumb_set TIM17_IRQHandler,Default_Handler - - .weak I2C1_IRQHandler - .thumb_set I2C1_IRQHandler,Default_Handler - - .weak I2C2_IRQHandler - .thumb_set I2C2_IRQHandler,Default_Handler - - .weak SPI1_IRQHandler - .thumb_set SPI1_IRQHandler,Default_Handler - - .weak SPI2_IRQHandler - .thumb_set SPI2_IRQHandler,Default_Handler - - .weak USART1_IRQHandler - .thumb_set USART1_IRQHandler,Default_Handler - - .weak USART2_IRQHandler - .thumb_set USART2_IRQHandler,Default_Handler - - .weak USART3_4_IRQHandler - .thumb_set USART3_4_IRQHandler,Default_Handler - - .weak CEC_CAN_IRQHandler - .thumb_set CEC_CAN_IRQHandler,Default_Handler - - .weak USB_IRQHandler - .thumb_set USB_IRQHandler,Default_Handler - - - diff --git a/Makefile b/Makefile new file mode 100644 index 0000000..4faa71c --- /dev/null +++ b/Makefile @@ -0,0 +1,41 @@ +.PHONY: all build cmake clean format + +# --- Configurable variables --- +BUILD_DIR := build +BUILD_TYPE ?= Debug +TOOLCHAIN := gcc-arm-none-eabi.cmake + +# MCU target (override on command line: make build MCU_MODEL=STM32F051x8) +MCU_MODEL ?= STM32F072xB +MCU_FAMILY ?= STM32F0xx + +# --- Default target --- +all: build + +# --- Configure step (runs CMake if build dir missing or stale) --- +${BUILD_DIR}/build.ninja: + cmake \ + -G Ninja \ + -B ${BUILD_DIR} \ + -DCMAKE_BUILD_TYPE=${BUILD_TYPE} \ + -DCMAKE_TOOLCHAIN_FILE=${TOOLCHAIN} \ + -DCMAKE_EXPORT_COMPILE_COMMANDS=ON \ + -DMCU_MODEL=$(MCU_MODEL) \ + -DMCU_FAMILY=$(MCU_FAMILY) + +cmake: ${BUILD_DIR}/build.ninja + +# --- Build step --- +build: cmake + cmake --build ${BUILD_DIR} + +# --- Format all sources --- +SRCS := $(shell find . -type f \( -name '*.[ch]' -o -name '*.[ch]pp' \)) +format: $(addsuffix .format,${SRCS}) + +%.format: % + clang-format -i $< + +# --- Clean --- +clean: + rm -rf ${BUILD_DIR} compile_commands.json