61 lines
1.5 KiB
C++
61 lines
1.5 KiB
C++
#include "SHAL.h"
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#include "stm32f0xx.h"
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volatile int prev_button = false;
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volatile int curr_button = false;
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extern "C" void TIM2_IRQHandler(void){
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if(TIM2->SR & TIM_SR_UIF){
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TIM2->SR &= ~TIM_SR_UIF;
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GPIOA->ODR ^= (1 << 4);
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}
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}
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extern "C" void EXTI0_1_IRQHandler(void) {
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if (EXTI->PR & (1 << 0)) { //Check pending flag
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EXTI->PR |= (1 << 0); //Clear it by writing 1
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GPIOA->ODR ^= (1 << 5);
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}
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}
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int main() {
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RCC->AHBENR |= RCC_AHBENR_GPIOAEN;
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RCC->AHBENR |= RCC_AHBENR_GPIOBEN;
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RCC->APB1ENR |= RCC_APB1ENR_TIM2EN;
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RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN; // Enable SYSCFG clock (needed for EXTI)
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TIM2->EGR |= TIM_EGR_UG; //Force update to load PSC/ARR
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GPIOA->MODER &= ~(0b11 << (4 * 2));
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GPIOA->MODER |= (0b1 << (4 * 2));
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GPIOA->MODER &= ~(0x3 << (5 * 2));
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GPIOA->MODER |= (0x1 << (5 * 2));
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GPIOB->MODER &= ~(0x3 << (0 * 2));
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GPIOB->MODER |= (0x0 << (0 * 2));
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TIM2->PSC = 8000 - 1; //8MHz base, prescaler
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TIM2->ARR = 500 - 1; //500ms, auto reload register
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SYSCFG->EXTICR[0] &= ~SYSCFG_EXTICR1_EXTI0; // Clear EXTI0 mapping
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SYSCFG->EXTICR[0] |= SYSCFG_EXTICR1_EXTI0_PB; // Map PA0 -> EXTI0
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EXTI->IMR |= (1 << 0); // Unmask EXTI0
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EXTI->RTSR |= (1 << 0); // Trigger on rising edge
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TIM2->DIER |= TIM_DIER_UIE; //Interrupt register
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TIM2->CR1 |= TIM_CR1_CEN; //Counter enable
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NVIC_EnableIRQ(TIM2_IRQn);
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NVIC_EnableIRQ(EXTI0_1_IRQn); // EXTI lines 0 and 1 share an IRQ vector
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__enable_irq();
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while (true) {
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__WFI();
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}
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}
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