120 lines
3.0 KiB
C++
120 lines
3.0 KiB
C++
//
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// Created by Luca on 10/8/2025.
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//
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#ifndef SHMINGO_HAL_SHAL_ADC_REG_L432KC_H
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#define SHMINGO_HAL_SHAL_ADC_REG_L432KC_H
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#include "SHAL_CORE.h"
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#include "SHAL_ADC_TYPES.h"
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#define SHAL_ADC1 SHAL_ADC(1)
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enum class ADC_Key : uint8_t{
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S_ADC1 = 0,
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NUM_ADC = 1,
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INVALID = 255
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};
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enum class ADC_Clock_Source : uint8_t {
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SHAL_SYSCLK,
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SHAL_PLLSAI1,
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SHAL_PLL,
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SHAL_MSI
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};
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static volatile ADC_TypeDef* ADC_TABLE[1] = { //Lookup table for ADCs
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ADC1,
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};
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SHAL_ADC_Common_Control_Reg getADCCommonControl() {
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return {&ADC1_COMMON->CCR ,ADC_CCR_VREFEN,ADC_CCR_TSEN,ADC_CCR_VBATEN};
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}
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SHAL_ADC_RCC_Enable_Reg getADCRCCEnableRegister(ADC_Key key){
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SHAL_ADC_RCC_Enable_Reg res = {nullptr, RCC_AHB2ENR_ADCEN};
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res.reg = &(ADC_TABLE[static_cast<uint8_t>(key)]->ISR);
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return res;
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}
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SHAL_ADC_Control_Reg getADCControlReg(ADC_Key key) {
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SHAL_ADC_Control_Reg res = {nullptr, ADC_CR_ADEN, ADC_CR_ADDIS, ADC_CR_ADCAL, ADC_CR_ADSTART};
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res.reg = &(ADC_TABLE[static_cast<uint8_t>(key)]->CR);
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return res;
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}
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SHAL_ADC_Config_Reg getADCConfigReg(ADC_Key key) {
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SHAL_ADC_Config_Reg res = {nullptr, ADC_CFGR_CONT, ADC_CFGR_RES_Pos, ADC_CFGR_ALIGN_Pos};
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res.reg = &(ADC_TABLE[static_cast<uint8_t>(key)]->CFGR);
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return res;
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}
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SHAL_ADC_ISR getADCISR(ADC_Key key){
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SHAL_ADC_ISR res = {nullptr, ADC_ISR_EOC};
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res.reg = &(ADC_TABLE[static_cast<uint8_t>(key)]->ISR);
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return res;
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}
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SHAL_ADC_Data_Reg getADCDataReg(ADC_Key key){
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SHAL_ADC_Data_Reg res = {nullptr, 0xFFFF};
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res.reg = &(ADC_TABLE[static_cast<uint8_t>(key)]->DR);
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return res;
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}
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SHAL_ADC_Clock_Reg getADCClockSelectRegister(ADC_Clock_Source clockSource) {
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SHAL_ADC_Clock_Reg res = {&RCC->CCIPR, RCC_CCIPR_ADCSEL_Msk, 1U << RCC_CCIPR_ADCSEL_Pos}; //Default to PLLSAI1
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switch(clockSource){
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case ADC_Clock_Source::SHAL_PLLSAI1:
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res.mask = 1U << RCC_CCIPR_ADCSEL_Pos;
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case ADC_Clock_Source::SHAL_PLL:
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res.mask = 2U << RCC_CCIPR_ADCSEL_Pos;
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case ADC_Clock_Source::SHAL_SYSCLK:
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res.mask = 3U << RCC_CCIPR_ADCSEL_Pos;
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case ADC_Clock_Source::SHAL_MSI:
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break; //TODO implement this
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}
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return res;
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}
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SHAL_ADC_Channel_Sampling_Time_Reg getADCChannelSamplingTimeRegister(ADC_Key key, SHAL_ADC_Channel channel){
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volatile ADC_TypeDef* ADCReg = ADC_TABLE[static_cast<uint8_t>(key)];
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volatile uint32_t* SMPReg = nullptr;
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uint32_t pos = 0;
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auto channelNum = static_cast<uint8_t>(channel);
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if (channelNum <= 9) {
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SMPReg = &ADCReg->SQR1;
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pos = (channelNum * 3);
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} else {
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SMPReg = &ADCReg->SQR2;
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pos = ((channelNum - 10) * 3);
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}
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return {SMPReg, pos};
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}
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constexpr ADC_TypeDef* getADCRegister(ADC_Key key){
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switch(key){
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case ADC_Key::S_ADC1:
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return ADC1;
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case ADC_Key::NUM_ADC:
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case ADC_Key::INVALID:
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return nullptr;
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}
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__builtin_unreachable();
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}
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#endif //SHMINGO_HAL_SHAL_ADC_REG_L432KC_H
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