Cleanup and finish build system
This commit is contained in:
3
.gitignore
vendored
3
.gitignore
vendored
@@ -9,7 +9,10 @@
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.idea/**/dictionaries
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.idea/**/dictionaries
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.idea/**/shelf
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.idea/**/shelf
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build/
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# AWS User-specific
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# AWS User-specific
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.idea/
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.idea/**/aws.xml
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.idea/**/aws.xml
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# Generated files
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# Generated files
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@@ -3,8 +3,9 @@ cmake_minimum_required(VERSION 3.19)
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project(shmingo-HAL)
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project(shmingo-HAL)
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set(PROJECT_DIR ${CMAKE_CURRENT_SOURCE_DIR})
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set(PROJECT_DIR ${CMAKE_CURRENT_SOURCE_DIR})
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set(MCU_FAMILY STM32F0xx)
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set(MCU_FAMILY "STM32F0xx" CACHE STRING "MCU family")
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set(MCU_MODEL STM32F072xx)
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set(MCU_MODEL "" CACHE STRING "MCU model")
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set(CPU_PARAMETERS
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set(CPU_PARAMETERS
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-mcpu=cortex-m0
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-mcpu=cortex-m0
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-mthumb)
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-mthumb)
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@@ -59,7 +60,6 @@ target_compile_options(${EXECUTABLE} PRIVATE
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-Wno-unused-parameter
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-Wno-unused-parameter
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$<$<COMPILE_LANGUAGE:CXX>:
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$<$<COMPILE_LANGUAGE:CXX>:
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-Wno-volatile
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-Wno-volatile
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-Wuseless-cast
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-Wsuggest-override>
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-Wsuggest-override>
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$<$<CONFIG:Debug>:-Og -g3 -ggdb>
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$<$<CONFIG:Debug>:-Og -g3 -ggdb>
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@@ -2,9 +2,11 @@
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#define SHAL_TIM_REG
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#define SHAL_TIM_REG
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#include "stm32f0xx.h" // Or your device header
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enum class S_TIM{ //Sample
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enum class S_TIM{ //Sample
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TIM1 = 0xFFA0,
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S_TIM_1 = 0xFFA0,
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TIM2,
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S_TIM_2 = 0xFF,
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};
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};
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#endif
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#endif
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@@ -8,9 +8,6 @@
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#ifndef SHAL_H
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#ifndef SHAL_H
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#define SHAL_H
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#define SHAL_H
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#define STM32F072xB
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@@ -1,7 +1,7 @@
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#ifndef SHAL_TIM_H
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#ifndef SHAL_TIM_H
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#define SHAL_TIM_H
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#define SHAL_TIM_H
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#include "Reg/SHAL_TIM_REG.h"
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#include "SHAL_TIM_REG.h"
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@@ -1,5 +1,5 @@
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#include "SHAL.h"
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#include "SHAL.h"
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#include "stm32f0xx.h" // Or your device header
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#include "stm32f0xx.h"
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volatile int prev_button = false;
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volatile int prev_button = false;
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volatile int curr_button = false;
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volatile int curr_button = false;
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@@ -7,14 +7,14 @@ volatile int curr_button = false;
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extern "C" void TIM2_IRQHandler(void){
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extern "C" void TIM2_IRQHandler(void){
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if(TIM2->SR & TIM_SR_UIF){
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if(TIM2->SR & TIM_SR_UIF){
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TIM2->SR &= ~TIM_SR_UIF;
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TIM2->SR &= ~TIM_SR_UIF;
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GPIOA->ODR ^= (1 << 5);
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GPIOA->ODR ^= (1 << 4);
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}
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}
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}
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}
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extern "C" void EXTI0_1_IRQHandler(void) {
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extern "C" void EXTI0_1_IRQHandler(void) {
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if (EXTI->PR & (1 << 0)) { //Check pending flag
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if (EXTI->PR & (1 << 0)) { //Check pending flag
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EXTI->PR |= (1 << 0); //Clear it by writing 1
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EXTI->PR |= (1 << 0); //Clear it by writing 1
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GPIOA->ODR ^= (1 << 4);
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GPIOA->ODR ^= (1 << 5);
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}
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}
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}
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}
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@@ -54,7 +54,7 @@ int main() {
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__enable_irq();
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__enable_irq();
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while (1) {
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while (true) {
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__WFI();
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__WFI();
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}
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}
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}
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}
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@@ -1,294 +0,0 @@
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/**
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******************************************************************************
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* @file startup_stm32f072xb.s
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* @author MCD Application Team
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* @brief STM32F072x8/STM32F072xB devices vector table for GCC toolchain.
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* This module performs:
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* - Set the initial SP
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* - Set the initial PC == Reset_Handler,
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* - Set the vector table entries with the exceptions ISR address
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* - Branches to main in the C library (which eventually
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* calls main()).
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* After Reset the Cortex-M0 processor is in Thread mode,
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* priority is Privileged, and the Stack is set to Main.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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.syntax unified
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.cpu cortex-m0
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.fpu softvfp
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.thumb
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.global g_pfnVectors
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.global Default_Handler
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/* start address for the initialization values of the .data section.
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defined in linker script */
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.word _sidata
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/* start address for the .data section. defined in linker script */
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.word _sdata
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/* end address for the .data section. defined in linker script */
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.word _edata
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/* start address for the .bss section. defined in linker script */
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.word _sbss
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/* end address for the .bss section. defined in linker script */
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.word _ebss
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.section .text.Reset_Handler
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.weak Reset_Handler
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.type Reset_Handler, %function
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Reset_Handler:
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ldr r0, =_estack
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mov sp, r0 /* set stack pointer */
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/* Call the clock system initialization function.*/
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bl SystemInit
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/* Copy the data segment initializers from flash to SRAM */
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ldr r0, =_sdata
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ldr r1, =_edata
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ldr r2, =_sidata
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movs r3, #0
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b LoopCopyDataInit
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CopyDataInit:
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ldr r4, [r2, r3]
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str r4, [r0, r3]
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adds r3, r3, #4
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LoopCopyDataInit:
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adds r4, r0, r3
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cmp r4, r1
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bcc CopyDataInit
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/* Zero fill the bss segment. */
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ldr r2, =_sbss
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ldr r4, =_ebss
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movs r3, #0
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b LoopFillZerobss
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FillZerobss:
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str r3, [r2]
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adds r2, r2, #4
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LoopFillZerobss:
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cmp r2, r4
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bcc FillZerobss
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/* Call static constructors */
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bl __libc_init_array
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/* Call the application's entry point.*/
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bl main
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LoopForever:
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b LoopForever
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.size Reset_Handler, .-Reset_Handler
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/**
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* @brief This is the code that gets called when the processor receives an
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* unexpected interrupt. This simply enters an infinite loop, preserving
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* the system state for examination by a debugger.
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*
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* @param None
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* @retval : None
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*/
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.section .text.Default_Handler,"ax",%progbits
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Default_Handler:
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Infinite_Loop:
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b Infinite_Loop
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.size Default_Handler, .-Default_Handler
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/******************************************************************************
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*
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* The minimal vector table for a Cortex M0. Note that the proper constructs
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* must be placed on this to ensure that it ends up at physical address
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* 0x0000.0000.
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*
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******************************************************************************/
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.section .isr_vector,"a",%progbits
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.type g_pfnVectors, %object
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.size g_pfnVectors, .-g_pfnVectors
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g_pfnVectors:
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.word _estack
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.word Reset_Handler
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.word NMI_Handler
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.word HardFault_Handler
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word 0
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.word SVC_Handler
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.word 0
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.word 0
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.word PendSV_Handler
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.word SysTick_Handler
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.word WWDG_IRQHandler /* Window WatchDog */
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.word PVD_VDDIO2_IRQHandler /* PVD and VDDIO2 through EXTI Line detect */
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.word RTC_IRQHandler /* RTC through the EXTI line */
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.word FLASH_IRQHandler /* FLASH */
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.word RCC_CRS_IRQHandler /* RCC and CRS */
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.word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */
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.word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */
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.word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */
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.word TSC_IRQHandler /* TSC */
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.word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */
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.word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */
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.word DMA1_Channel4_5_6_7_IRQHandler /* DMA1 Channel 4, Channel 5, Channel 6 and Channel 7*/
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.word ADC1_COMP_IRQHandler /* ADC1, COMP1 and COMP2 */
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.word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */
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.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
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.word TIM2_IRQHandler /* TIM2 */
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.word TIM3_IRQHandler /* TIM3 */
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.word TIM6_DAC_IRQHandler /* TIM6 and DAC */
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.word TIM7_IRQHandler /* TIM7 */
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.word TIM14_IRQHandler /* TIM14 */
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.word TIM15_IRQHandler /* TIM15 */
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.word TIM16_IRQHandler /* TIM16 */
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.word TIM17_IRQHandler /* TIM17 */
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.word I2C1_IRQHandler /* I2C1 */
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.word I2C2_IRQHandler /* I2C2 */
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.word SPI1_IRQHandler /* SPI1 */
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.word SPI2_IRQHandler /* SPI2 */
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.word USART1_IRQHandler /* USART1 */
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.word USART2_IRQHandler /* USART2 */
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.word USART3_4_IRQHandler /* USART3 and USART4 */
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.word CEC_CAN_IRQHandler /* CEC and CAN */
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.word USB_IRQHandler /* USB */
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/*******************************************************************************
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*
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* Provide weak aliases for each Exception handler to the Default_Handler.
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* As they are weak aliases, any function with the same name will override
|
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* this definition.
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*
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*******************************************************************************/
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.weak NMI_Handler
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.thumb_set NMI_Handler,Default_Handler
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.weak HardFault_Handler
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.thumb_set HardFault_Handler,Default_Handler
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.weak SVC_Handler
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.thumb_set SVC_Handler,Default_Handler
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.weak PendSV_Handler
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.thumb_set PendSV_Handler,Default_Handler
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.weak SysTick_Handler
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.thumb_set SysTick_Handler,Default_Handler
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||||||
.weak WWDG_IRQHandler
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|
||||||
.thumb_set WWDG_IRQHandler,Default_Handler
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|
||||||
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|
||||||
.weak PVD_VDDIO2_IRQHandler
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|
||||||
.thumb_set PVD_VDDIO2_IRQHandler,Default_Handler
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|
||||||
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|
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.weak RTC_IRQHandler
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|
||||||
.thumb_set RTC_IRQHandler,Default_Handler
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|
||||||
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|
||||||
.weak FLASH_IRQHandler
|
|
||||||
.thumb_set FLASH_IRQHandler,Default_Handler
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|
||||||
|
|
||||||
.weak RCC_CRS_IRQHandler
|
|
||||||
.thumb_set RCC_CRS_IRQHandler,Default_Handler
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|
||||||
|
|
||||||
.weak EXTI0_1_IRQHandler
|
|
||||||
.thumb_set EXTI0_1_IRQHandler,Default_Handler
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|
||||||
|
|
||||||
.weak EXTI2_3_IRQHandler
|
|
||||||
.thumb_set EXTI2_3_IRQHandler,Default_Handler
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|
||||||
|
|
||||||
.weak EXTI4_15_IRQHandler
|
|
||||||
.thumb_set EXTI4_15_IRQHandler,Default_Handler
|
|
||||||
|
|
||||||
.weak TSC_IRQHandler
|
|
||||||
.thumb_set TSC_IRQHandler,Default_Handler
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|
||||||
|
|
||||||
.weak DMA1_Channel1_IRQHandler
|
|
||||||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
|
||||||
|
|
||||||
.weak DMA1_Channel2_3_IRQHandler
|
|
||||||
.thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
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|
||||||
|
|
||||||
.weak DMA1_Channel4_5_6_7_IRQHandler
|
|
||||||
.thumb_set DMA1_Channel4_5_6_7_IRQHandler,Default_Handler
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|
||||||
|
|
||||||
.weak ADC1_COMP_IRQHandler
|
|
||||||
.thumb_set ADC1_COMP_IRQHandler,Default_Handler
|
|
||||||
|
|
||||||
.weak TIM1_BRK_UP_TRG_COM_IRQHandler
|
|
||||||
.thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler
|
|
||||||
|
|
||||||
.weak TIM1_CC_IRQHandler
|
|
||||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
|
||||||
|
|
||||||
.weak TIM2_IRQHandler
|
|
||||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
|
||||||
|
|
||||||
.weak TIM3_IRQHandler
|
|
||||||
.thumb_set TIM3_IRQHandler,Default_Handler
|
|
||||||
|
|
||||||
.weak TIM6_DAC_IRQHandler
|
|
||||||
.thumb_set TIM6_DAC_IRQHandler,Default_Handler
|
|
||||||
|
|
||||||
.weak TIM7_IRQHandler
|
|
||||||
.thumb_set TIM7_IRQHandler,Default_Handler
|
|
||||||
|
|
||||||
.weak TIM14_IRQHandler
|
|
||||||
.thumb_set TIM14_IRQHandler,Default_Handler
|
|
||||||
|
|
||||||
.weak TIM15_IRQHandler
|
|
||||||
.thumb_set TIM15_IRQHandler,Default_Handler
|
|
||||||
|
|
||||||
.weak TIM16_IRQHandler
|
|
||||||
.thumb_set TIM16_IRQHandler,Default_Handler
|
|
||||||
|
|
||||||
.weak TIM17_IRQHandler
|
|
||||||
.thumb_set TIM17_IRQHandler,Default_Handler
|
|
||||||
|
|
||||||
.weak I2C1_IRQHandler
|
|
||||||
.thumb_set I2C1_IRQHandler,Default_Handler
|
|
||||||
|
|
||||||
.weak I2C2_IRQHandler
|
|
||||||
.thumb_set I2C2_IRQHandler,Default_Handler
|
|
||||||
|
|
||||||
.weak SPI1_IRQHandler
|
|
||||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
|
||||||
|
|
||||||
.weak SPI2_IRQHandler
|
|
||||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
|
||||||
|
|
||||||
.weak USART1_IRQHandler
|
|
||||||
.thumb_set USART1_IRQHandler,Default_Handler
|
|
||||||
|
|
||||||
.weak USART2_IRQHandler
|
|
||||||
.thumb_set USART2_IRQHandler,Default_Handler
|
|
||||||
|
|
||||||
.weak USART3_4_IRQHandler
|
|
||||||
.thumb_set USART3_4_IRQHandler,Default_Handler
|
|
||||||
|
|
||||||
.weak CEC_CAN_IRQHandler
|
|
||||||
.thumb_set CEC_CAN_IRQHandler,Default_Handler
|
|
||||||
|
|
||||||
.weak USB_IRQHandler
|
|
||||||
.thumb_set USB_IRQHandler,Default_Handler
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
41
Makefile
Normal file
41
Makefile
Normal file
@@ -0,0 +1,41 @@
|
|||||||
|
.PHONY: all build cmake clean format
|
||||||
|
|
||||||
|
# --- Configurable variables ---
|
||||||
|
BUILD_DIR := build
|
||||||
|
BUILD_TYPE ?= Debug
|
||||||
|
TOOLCHAIN := gcc-arm-none-eabi.cmake
|
||||||
|
|
||||||
|
# MCU target (override on command line: make build MCU_MODEL=STM32F051x8)
|
||||||
|
MCU_MODEL ?= STM32F072xB
|
||||||
|
MCU_FAMILY ?= STM32F0xx
|
||||||
|
|
||||||
|
# --- Default target ---
|
||||||
|
all: build
|
||||||
|
|
||||||
|
# --- Configure step (runs CMake if build dir missing or stale) ---
|
||||||
|
${BUILD_DIR}/build.ninja:
|
||||||
|
cmake \
|
||||||
|
-G Ninja \
|
||||||
|
-B ${BUILD_DIR} \
|
||||||
|
-DCMAKE_BUILD_TYPE=${BUILD_TYPE} \
|
||||||
|
-DCMAKE_TOOLCHAIN_FILE=${TOOLCHAIN} \
|
||||||
|
-DCMAKE_EXPORT_COMPILE_COMMANDS=ON \
|
||||||
|
-DMCU_MODEL=$(MCU_MODEL) \
|
||||||
|
-DMCU_FAMILY=$(MCU_FAMILY)
|
||||||
|
|
||||||
|
cmake: ${BUILD_DIR}/build.ninja
|
||||||
|
|
||||||
|
# --- Build step ---
|
||||||
|
build: cmake
|
||||||
|
cmake --build ${BUILD_DIR}
|
||||||
|
|
||||||
|
# --- Format all sources ---
|
||||||
|
SRCS := $(shell find . -type f \( -name '*.[ch]' -o -name '*.[ch]pp' \))
|
||||||
|
format: $(addsuffix .format,${SRCS})
|
||||||
|
|
||||||
|
%.format: %
|
||||||
|
clang-format -i $<
|
||||||
|
|
||||||
|
# --- Clean ---
|
||||||
|
clean:
|
||||||
|
rm -rf ${BUILD_DIR} compile_commands.json
|
||||||
Reference in New Issue
Block a user