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Combined USART enums

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This commit is contained in:
Luca Lizaranzu
2025-09-06 20:59:27 -07:00
parent a0ef9c8b32
commit 40ee0e6834
2 changed files with 10 additions and 34 deletions
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43
SHAL/Include/Peripheral/GPIO/Reg/SHAL_GPIO_REG_F072xB.h
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@@ -49,46 +49,21 @@ enum class UART_Pair : uint8_t{
Tx4C10_Rx4C11
};
enum class USART {
USART_1,
USART_2,
USART_3,
USART_4
};
constexpr SHAL_UART_Pair getUARTPair(const UART_Pair pair){
switch(pair){
case UART_Pair::Tx1A9_Rx1A10: return {9,10,&GPIOA->AFR[1],&GPIOA->AFR[1],AF_Mask::AF1,AF_Mask::AF1};
case UART_Pair::Tx1B6_Rx1B7: return {6,7,&GPIOB->AFR[0],&GPIOB->AFR[0],AF_Mask::AF0,AF_Mask::AF0};
case UART_Pair::Tx2A2_Rx2A3: return {2,3,&GPIOA->AFR[0],&GPIOA->AFR[0],AF_Mask::AF1,AF_Mask::AF1};
case UART_Pair::Tx2A14_Rx2A15: return {14,15,&GPIOA->AFR[1],&GPIOA->AFR[1],AF_Mask::AF1,AF_Mask::AF1};
case UART_Pair::Tx3B10_Rx3B11: return {10,11,&GPIOB->AFR[1],&GPIOB->AFR[1],AF_Mask::AF4,AF_Mask::AF4};
case UART_Pair::Tx3C4_Rx3C5: return {4,5,&GPIOC->AFR[0],&GPIOC->AFR[0],AF_Mask::AF1,AF_Mask::AF1};
case UART_Pair::Tx3C10_Rx3C11: return {10,11,&GPIOC->AFR[1],&GPIOC->AFR[1],AF_Mask::AF1,AF_Mask::AF1};
case UART_Pair::Tx4A0_Rx4A1: return {0,1,&GPIOA->AFR[0],&GPIOA->AFR[0],AF_Mask::AF4,AF_Mask::AF4};
case UART_Pair::Tx4C10_Rx4C11: return {10,11,&GPIOC->AFR[1],&GPIOC->AFR[1],AF_Mask::AF0,AF_Mask::AF0};
case UART_Pair::Tx1A9_Rx1A10: return {USART1,9,10,&GPIOA->AFR[1],&GPIOA->AFR[1],AF_Mask::AF1,AF_Mask::AF1};
case UART_Pair::Tx1B6_Rx1B7: return {USART1,6,7,&GPIOB->AFR[0],&GPIOB->AFR[0],AF_Mask::AF0,AF_Mask::AF0};
case UART_Pair::Tx2A2_Rx2A3: return {USART2,2,3,&GPIOA->AFR[0],&GPIOA->AFR[0],AF_Mask::AF1,AF_Mask::AF1};
case UART_Pair::Tx2A14_Rx2A15: return {USART2,14,15,&GPIOA->AFR[1],&GPIOA->AFR[1],AF_Mask::AF1,AF_Mask::AF1};
case UART_Pair::Tx3B10_Rx3B11: return {USART3,10,11,&GPIOB->AFR[1],&GPIOB->AFR[1],AF_Mask::AF4,AF_Mask::AF4};
case UART_Pair::Tx3C4_Rx3C5: return {USART3,4,5,&GPIOC->AFR[0],&GPIOC->AFR[0],AF_Mask::AF1,AF_Mask::AF1};
case UART_Pair::Tx3C10_Rx3C11: return {USART3,10,11,&GPIOC->AFR[1],&GPIOC->AFR[1],AF_Mask::AF1,AF_Mask::AF1};
case UART_Pair::Tx4A0_Rx4A1: return {USART4,0,1,&GPIOA->AFR[0],&GPIOA->AFR[0],AF_Mask::AF4,AF_Mask::AF4};
case UART_Pair::Tx4C10_Rx4C11: return {USART4,10,11,&GPIOC->AFR[1],&GPIOC->AFR[1],AF_Mask::AF0,AF_Mask::AF0};
}
}
constexpr USART getUSARTReg(const UART_Pair pair){
switch(pair){
case UART_Pair::Tx1A9_Rx1A10:
case UART_Pair::Tx1B6_Rx1B7:
return USART::USART_1;
case UART_Pair::Tx2A2_Rx2A3:
case UART_Pair::Tx2A14_Rx2A15:
return USART::USART_2;
case UART_Pair::Tx3B10_Rx3B11:
case UART_Pair::Tx3C4_Rx3C5:
case UART_Pair::Tx3C10_Rx3C11:
return USART::USART_3;
case UART_Pair::Tx4A0_Rx4A1:
case UART_Pair::Tx4C10_Rx4C11:
return USART::USART_4;
}
}
constexpr SHAL_Peripheral getGPIORegister(const GPIO_Key g){
switch(g) {
case GPIO_Key::A0: return {GPIOA,0};

1
SHAL/Include/Peripheral/GPIO/Reg/SHAL_GPIO_TYPES.h
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@@ -28,6 +28,7 @@ enum class AF_Mask : uint8_t{
//Represents a pair of pins usable for USART Tx + Rx in combination, and their alternate function mapping
struct SHAL_UART_Pair{
USART_TypeDef* USARTReg;
uint8_t TxPinNumber;
uint8_t RxPinNumber;
volatile uint32_t* TxReg;