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Created structs and enums for alternate function UART pins

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This commit is contained in:
Luca Lizaranzu
2025-09-06 19:49:36 -07:00
parent f6e21fbd88
commit d763965cb8
6 changed files with 81 additions and 10 deletions
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38
SHAL/Include/Peripheral/GPIO/Reg/SHAL_GPIO_REG_F072xB.h
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@@ -8,7 +8,7 @@
#include <stm32f072xb.h>
#include <cassert>
#include "SHAL_CORE.h"
#include "SHAL_GPIO_REG.h"
#define AVAILABLE_PORTS 3
#define PINS_PER_PORT 16
@@ -29,6 +29,40 @@ enum class GPIO_Key : uint8_t {
INVALID
};
//Valid usart Tx and Rx pairings for STM32F072
enum class UART_Pair : uint8_t{
//UART1
Tx1A9_Rx1A10,
Tx1B6_Rx1B7,
//UART2
Tx2A2_Rx2A3,
Tx2A14_Rx2A15,
//UART3
Tx3B10_Rx3B11,
Tx3C4_Rx3C5,
Tx3C10_Rx3C11,
//UART4
Tx4A0_Rx4A1,
Tx4C10_Rx4C11
};
constexpr SHAL_UART_Pair getUARTPair(const UART_Pair pair){
switch(pair){
case UART_Pair::Tx1A9_Rx1A10: return {9,10,&GPIOA->AFR[1],&GPIOA->AFR[1],AF_Mask::AF1,AF_Mask::AF1};
case UART_Pair::Tx1B6_Rx1B7: return {6,7,&GPIOB->AFR[0],&GPIOB->AFR[0],AF_Mask::AF0,AF_Mask::AF0};
case UART_Pair::Tx2A2_Rx2A3: return {2,3,&GPIOA->AFR[0],&GPIOA->AFR[0],AF_Mask::AF1,AF_Mask::AF1};
case UART_Pair::Tx2A14_Rx2A15: return {14,15,&GPIOA->AFR[1],&GPIOA->AFR[1],AF_Mask::AF1,AF_Mask::AF1};
case UART_Pair::Tx3B10_Rx3B11: return {10,11,&GPIOB->AFR[1],&GPIOB->AFR[1],AF_Mask::AF4,AF_Mask::AF4};
case UART_Pair::Tx3C4_Rx3C5: return {4,5,&GPIOC->AFR[0],&GPIOC->AFR[0],AF_Mask::AF1,AF_Mask::AF1};
case UART_Pair::Tx3C10_Rx3C11: return {10,11,&GPIOC->AFR[1],&GPIOC->AFR[1],AF_Mask::AF1,AF_Mask::AF1};
case UART_Pair::Tx4A0_Rx4A1: return {0,1,&GPIOA->AFR[0],&GPIOA->AFR[0],AF_Mask::AF4,AF_Mask::AF4};
case UART_Pair::Tx4C10_Rx4C11: return {10,11,&GPIOC->AFR[1],&GPIOC->AFR[1],AF_Mask::AF0,AF_Mask::AF0};
}
}
constexpr SHAL_Peripheral getGPIORegister(const GPIO_Key g){
switch(g) {
@@ -269,4 +303,6 @@ constexpr unsigned int getGPIOPortNumber(const GPIO_Key g){
__builtin_unreachable();
}
#endif //SHMINGO_HAL_SHAL_GPIO_REG_F072XB_H