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28
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set(CMAKE_ASM_COMPILER_ARG1 "")
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||||||
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set(CMAKE_LINKER_LLD "lld-link")
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set(CMAKE_ASM_IGNORE_EXTENSIONS h;H;o;O;obj;OBJ;def;DEF;rc;RC)
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set(CMAKE_C_COMPILER_ENV_VAR "CC")
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set(CMAKE_C_SOURCE_FILE_EXTENSIONS c;m)
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set(CMAKE_C_IMPLICIT_INCLUDE_DIRECTORIES "")
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101
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set(CMAKE_CXX_COMPILER_ID "MSVC")
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set(CMAKE_CXX_SOURCE_FILE_EXTENSIONS C;M;c++;cc;cpp;cxx;m;mm;mpp;CPP;ixx;cppm;ccm;cxxm;c++m)
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set(CMAKE_CXX_IGNORE_EXTENSIONS inl;h;hpp;HPP;H;o;O;obj;OBJ;def;DEF;rc;RC)
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|
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|
||||||
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
||||||
|
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||||||
|
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|
||||||
|
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|
||||||
|
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|
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
# define SIMULATE_ID "MSVC"
|
||||||
|
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|
||||||
|
#if defined(__GNUC__)
|
||||||
|
# define SIMULATE_ID "GNU"
|
||||||
|
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|
||||||
|
/* __INTEL_LLVM_COMPILER = VVVVRP prior to 2021.2.0, VVVVRRPP for 2021.2.0 and
|
||||||
|
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|
||||||
|
* VVVV is no smaller than the current year when a version is released.
|
||||||
|
*/
|
||||||
|
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|
||||||
|
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|
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|
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|
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|
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|
||||||
|
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|
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|
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|
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|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
/* _MSC_VER = VVRR */
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
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|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
|
||||||
|
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|
||||||
|
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|
||||||
|
/* __BORLANDC__ = 0xVRR */
|
||||||
|
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|
||||||
|
# define COMPILER_VERSION_MINOR HEX(__BORLANDC__ & 0xFF)
|
||||||
|
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
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|
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|
||||||
|
|
||||||
|
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|
||||||
|
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|
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|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
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|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
# define COMPILER_VERSION_MINOR HEX(__SUNPRO_C>>4 & 0xF)
|
||||||
|
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|
||||||
|
# endif
|
||||||
|
|
||||||
|
#elif defined(__HP_cc)
|
||||||
|
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|
||||||
|
/* __HP_cc = VVRRPP */
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__HP_cc/10000)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__HP_cc/100 % 100)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__HP_cc % 100)
|
||||||
|
|
||||||
|
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|
||||||
|
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|
||||||
|
/* __DECC_VER = VVRRTPPPP */
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__DECC_VER/10000000)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__DECC_VER/100000 % 100)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__DECC_VER % 10000)
|
||||||
|
|
||||||
|
#elif defined(__IBMC__) && defined(__COMPILER_VER__)
|
||||||
|
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|
||||||
|
/* __IBMC__ = VRP */
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100)
|
||||||
|
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|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10)
|
||||||
|
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||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
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|
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|
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|
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|
||||||
|
|
||||||
|
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
|
||||||
|
|
||||||
|
#elif defined(__IBMC__) && !defined(__COMPILER_VER__) && __IBMC__ >= 800
|
||||||
|
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|
||||||
|
/* __IBMC__ = VRP */
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100)
|
||||||
|
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|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10)
|
||||||
|
|
||||||
|
#elif defined(__IBMC__) && !defined(__COMPILER_VER__) && __IBMC__ < 800
|
||||||
|
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|
||||||
|
/* __IBMC__ = VRP */
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100)
|
||||||
|
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|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10)
|
||||||
|
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__NVCOMPILER_MINOR__)
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__PGIC_MINOR__)
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
|
||||||
|
#elif defined(__clang__) && defined(__cray__)
|
||||||
|
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|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__cray_major__)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__cray_minor__)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__cray_patchlevel__)
|
||||||
|
# define COMPILER_VERSION_INTERNAL_STR __clang_version__
|
||||||
|
|
||||||
|
|
||||||
|
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|
||||||
|
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|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(_RELEASE_MAJOR)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(_RELEASE_MINOR)
|
||||||
|
|
||||||
|
#elif defined(__TI_COMPILER_VERSION__)
|
||||||
|
# define COMPILER_ID "TI"
|
||||||
|
/* __TI_COMPILER_VERSION__ = VVVRRRPPP */
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__TI_COMPILER_VERSION__/1000000)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__TI_COMPILER_VERSION__/1000 % 1000)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__TI_COMPILER_VERSION__ % 1000)
|
||||||
|
|
||||||
|
#elif defined(__CLANG_FUJITSU)
|
||||||
|
# define COMPILER_ID "FujitsuClang"
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__FCC_major__)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__FCC_minor__)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__FCC_patchlevel__)
|
||||||
|
# define COMPILER_VERSION_INTERNAL_STR __clang_version__
|
||||||
|
|
||||||
|
|
||||||
|
#elif defined(__FUJITSU)
|
||||||
|
# define COMPILER_ID "Fujitsu"
|
||||||
|
# if defined(__FCC_version__)
|
||||||
|
# define COMPILER_VERSION __FCC_version__
|
||||||
|
# elif defined(__FCC_major__)
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__FCC_major__)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__FCC_minor__)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__FCC_patchlevel__)
|
||||||
|
# endif
|
||||||
|
# if defined(__fcc_version)
|
||||||
|
# define COMPILER_VERSION_INTERNAL DEC(__fcc_version)
|
||||||
|
# elif defined(__FCC_VERSION)
|
||||||
|
# define COMPILER_VERSION_INTERNAL DEC(__FCC_VERSION)
|
||||||
|
# endif
|
||||||
|
|
||||||
|
|
||||||
|
#elif defined(__ghs__)
|
||||||
|
# define COMPILER_ID "GHS"
|
||||||
|
/* __GHS_VERSION_NUMBER = VVVVRP */
|
||||||
|
# ifdef __GHS_VERSION_NUMBER
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__GHS_VERSION_NUMBER / 100)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__GHS_VERSION_NUMBER / 10 % 10)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__GHS_VERSION_NUMBER % 10)
|
||||||
|
# endif
|
||||||
|
|
||||||
|
#elif defined(__TASKING__)
|
||||||
|
# define COMPILER_ID "Tasking"
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__VERSION__/1000)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__VERSION__ % 100)
|
||||||
|
# define COMPILER_VERSION_INTERNAL DEC(__VERSION__)
|
||||||
|
|
||||||
|
#elif defined(__ORANGEC__)
|
||||||
|
# define COMPILER_ID "OrangeC"
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__ORANGEC_MAJOR__)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__ORANGEC_MINOR__)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__ORANGEC_PATCHLEVEL__)
|
||||||
|
|
||||||
|
#elif defined(__TINYC__)
|
||||||
|
# define COMPILER_ID "TinyCC"
|
||||||
|
|
||||||
|
#elif defined(__BCC__)
|
||||||
|
# define COMPILER_ID "Bruce"
|
||||||
|
|
||||||
|
#elif defined(__SCO_VERSION__)
|
||||||
|
# define COMPILER_ID "SCO"
|
||||||
|
|
||||||
|
#elif defined(__ARMCC_VERSION) && !defined(__clang__)
|
||||||
|
# define COMPILER_ID "ARMCC"
|
||||||
|
#if __ARMCC_VERSION >= 1000000
|
||||||
|
/* __ARMCC_VERSION = VRRPPPP */
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/1000000)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 100)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000)
|
||||||
|
#else
|
||||||
|
/* __ARMCC_VERSION = VRPPPP */
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/100000)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 10)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
#elif defined(__clang__) && defined(__apple_build_version__)
|
||||||
|
# define COMPILER_ID "AppleClang"
|
||||||
|
# if defined(_MSC_VER)
|
||||||
|
# define SIMULATE_ID "MSVC"
|
||||||
|
# endif
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__clang_major__)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__clang_minor__)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__)
|
||||||
|
# if defined(_MSC_VER)
|
||||||
|
/* _MSC_VER = VVRR */
|
||||||
|
# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100)
|
||||||
|
# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100)
|
||||||
|
# endif
|
||||||
|
# define COMPILER_VERSION_TWEAK DEC(__apple_build_version__)
|
||||||
|
|
||||||
|
#elif defined(__clang__) && defined(__ARMCOMPILER_VERSION)
|
||||||
|
# define COMPILER_ID "ARMClang"
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__ARMCOMPILER_VERSION/1000000)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__ARMCOMPILER_VERSION/10000 % 100)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__ARMCOMPILER_VERSION/100 % 100)
|
||||||
|
# define COMPILER_VERSION_INTERNAL DEC(__ARMCOMPILER_VERSION)
|
||||||
|
|
||||||
|
#elif defined(__clang__) && defined(__ti__)
|
||||||
|
# define COMPILER_ID "TIClang"
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__ti_major__)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__ti_minor__)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__ti_patchlevel__)
|
||||||
|
# define COMPILER_VERSION_INTERNAL DEC(__ti_version__)
|
||||||
|
|
||||||
|
#elif defined(__clang__)
|
||||||
|
# define COMPILER_ID "Clang"
|
||||||
|
# if defined(_MSC_VER)
|
||||||
|
# define SIMULATE_ID "MSVC"
|
||||||
|
# endif
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__clang_major__)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__clang_minor__)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__)
|
||||||
|
# if defined(_MSC_VER)
|
||||||
|
/* _MSC_VER = VVRR */
|
||||||
|
# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100)
|
||||||
|
# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100)
|
||||||
|
# endif
|
||||||
|
|
||||||
|
#elif defined(__LCC__) && (defined(__GNUC__) || defined(__GNUG__) || defined(__MCST__))
|
||||||
|
# define COMPILER_ID "LCC"
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__LCC__ / 100)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__LCC__ % 100)
|
||||||
|
# if defined(__LCC_MINOR__)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__LCC_MINOR__)
|
||||||
|
# endif
|
||||||
|
# if defined(__GNUC__) && defined(__GNUC_MINOR__)
|
||||||
|
# define SIMULATE_ID "GNU"
|
||||||
|
# define SIMULATE_VERSION_MAJOR DEC(__GNUC__)
|
||||||
|
# define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__)
|
||||||
|
# if defined(__GNUC_PATCHLEVEL__)
|
||||||
|
# define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__)
|
||||||
|
# endif
|
||||||
|
# endif
|
||||||
|
|
||||||
|
#elif defined(__GNUC__)
|
||||||
|
# define COMPILER_ID "GNU"
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__GNUC__)
|
||||||
|
# if defined(__GNUC_MINOR__)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__GNUC_MINOR__)
|
||||||
|
# endif
|
||||||
|
# if defined(__GNUC_PATCHLEVEL__)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__)
|
||||||
|
# endif
|
||||||
|
|
||||||
|
#elif defined(_MSC_VER)
|
||||||
|
# define COMPILER_ID "MSVC"
|
||||||
|
/* _MSC_VER = VVRR */
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(_MSC_VER / 100)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(_MSC_VER % 100)
|
||||||
|
# if defined(_MSC_FULL_VER)
|
||||||
|
# if _MSC_VER >= 1400
|
||||||
|
/* _MSC_FULL_VER = VVRRPPPPP */
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 100000)
|
||||||
|
# else
|
||||||
|
/* _MSC_FULL_VER = VVRRPPPP */
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 10000)
|
||||||
|
# endif
|
||||||
|
# endif
|
||||||
|
# if defined(_MSC_BUILD)
|
||||||
|
# define COMPILER_VERSION_TWEAK DEC(_MSC_BUILD)
|
||||||
|
# endif
|
||||||
|
|
||||||
|
#elif defined(_ADI_COMPILER)
|
||||||
|
# define COMPILER_ID "ADSP"
|
||||||
|
#if defined(__VERSIONNUM__)
|
||||||
|
/* __VERSIONNUM__ = 0xVVRRPPTT */
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__VERSIONNUM__ >> 24 & 0xFF)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__VERSIONNUM__ >> 16 & 0xFF)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__VERSIONNUM__ >> 8 & 0xFF)
|
||||||
|
# define COMPILER_VERSION_TWEAK DEC(__VERSIONNUM__ & 0xFF)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)
|
||||||
|
# define COMPILER_ID "IAR"
|
||||||
|
# if defined(__VER__) && defined(__ICCARM__)
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC((__VER__) / 1000000)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(((__VER__) / 1000) % 1000)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC((__VER__) % 1000)
|
||||||
|
# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__)
|
||||||
|
# elif defined(__VER__) && (defined(__ICCAVR__) || defined(__ICCRX__) || defined(__ICCRH850__) || defined(__ICCRL78__) || defined(__ICC430__) || defined(__ICCRISCV__) || defined(__ICCV850__) || defined(__ICC8051__) || defined(__ICCSTM8__))
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC((__VER__) / 100)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC((__VER__) - (((__VER__) / 100)*100))
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__SUBVERSION__)
|
||||||
|
# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__)
|
||||||
|
# endif
|
||||||
|
|
||||||
|
#elif defined(__SDCC_VERSION_MAJOR) || defined(SDCC)
|
||||||
|
# define COMPILER_ID "SDCC"
|
||||||
|
# if defined(__SDCC_VERSION_MAJOR)
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__SDCC_VERSION_MAJOR)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__SDCC_VERSION_MINOR)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__SDCC_VERSION_PATCH)
|
||||||
|
# else
|
||||||
|
/* SDCC = VRP */
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(SDCC/100)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(SDCC/10 % 10)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(SDCC % 10)
|
||||||
|
# endif
|
||||||
|
|
||||||
|
|
||||||
|
/* These compilers are either not known or too old to define an
|
||||||
|
identification macro. Try to identify the platform and guess that
|
||||||
|
it is the native compiler. */
|
||||||
|
#elif defined(__hpux) || defined(__hpua)
|
||||||
|
# define COMPILER_ID "HP"
|
||||||
|
|
||||||
|
#else /* unknown compiler */
|
||||||
|
# define COMPILER_ID ""
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Construct the string literal in pieces to prevent the source from
|
||||||
|
getting matched. Store it in a pointer rather than an array
|
||||||
|
because some compilers will just produce instructions to fill the
|
||||||
|
array rather than assigning a pointer to a static array. */
|
||||||
|
char const* info_compiler = "INFO" ":" "compiler[" COMPILER_ID "]";
|
||||||
|
#ifdef SIMULATE_ID
|
||||||
|
char const* info_simulate = "INFO" ":" "simulate[" SIMULATE_ID "]";
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef __QNXNTO__
|
||||||
|
char const* qnxnto = "INFO" ":" "qnxnto[]";
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if defined(__CRAYXT_COMPUTE_LINUX_TARGET)
|
||||||
|
char const *info_cray = "INFO" ":" "compiler_wrapper[CrayPrgEnv]";
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define STRINGIFY_HELPER(X) #X
|
||||||
|
#define STRINGIFY(X) STRINGIFY_HELPER(X)
|
||||||
|
|
||||||
|
/* Identify known platforms by name. */
|
||||||
|
#if defined(__linux) || defined(__linux__) || defined(linux)
|
||||||
|
# define PLATFORM_ID "Linux"
|
||||||
|
|
||||||
|
#elif defined(__MSYS__)
|
||||||
|
# define PLATFORM_ID "MSYS"
|
||||||
|
|
||||||
|
#elif defined(__CYGWIN__)
|
||||||
|
# define PLATFORM_ID "Cygwin"
|
||||||
|
|
||||||
|
#elif defined(__MINGW32__)
|
||||||
|
# define PLATFORM_ID "MinGW"
|
||||||
|
|
||||||
|
#elif defined(__APPLE__)
|
||||||
|
# define PLATFORM_ID "Darwin"
|
||||||
|
|
||||||
|
#elif defined(_WIN32) || defined(__WIN32__) || defined(WIN32)
|
||||||
|
# define PLATFORM_ID "Windows"
|
||||||
|
|
||||||
|
#elif defined(__FreeBSD__) || defined(__FreeBSD)
|
||||||
|
# define PLATFORM_ID "FreeBSD"
|
||||||
|
|
||||||
|
#elif defined(__NetBSD__) || defined(__NetBSD)
|
||||||
|
# define PLATFORM_ID "NetBSD"
|
||||||
|
|
||||||
|
#elif defined(__OpenBSD__) || defined(__OPENBSD)
|
||||||
|
# define PLATFORM_ID "OpenBSD"
|
||||||
|
|
||||||
|
#elif defined(__sun) || defined(sun)
|
||||||
|
# define PLATFORM_ID "SunOS"
|
||||||
|
|
||||||
|
#elif defined(_AIX) || defined(__AIX) || defined(__AIX__) || defined(__aix) || defined(__aix__)
|
||||||
|
# define PLATFORM_ID "AIX"
|
||||||
|
|
||||||
|
#elif defined(__hpux) || defined(__hpux__)
|
||||||
|
# define PLATFORM_ID "HP-UX"
|
||||||
|
|
||||||
|
#elif defined(__HAIKU__)
|
||||||
|
# define PLATFORM_ID "Haiku"
|
||||||
|
|
||||||
|
#elif defined(__BeOS) || defined(__BEOS__) || defined(_BEOS)
|
||||||
|
# define PLATFORM_ID "BeOS"
|
||||||
|
|
||||||
|
#elif defined(__QNX__) || defined(__QNXNTO__)
|
||||||
|
# define PLATFORM_ID "QNX"
|
||||||
|
|
||||||
|
#elif defined(__tru64) || defined(_tru64) || defined(__TRU64__)
|
||||||
|
# define PLATFORM_ID "Tru64"
|
||||||
|
|
||||||
|
#elif defined(__riscos) || defined(__riscos__)
|
||||||
|
# define PLATFORM_ID "RISCos"
|
||||||
|
|
||||||
|
#elif defined(__sinix) || defined(__sinix__) || defined(__SINIX__)
|
||||||
|
# define PLATFORM_ID "SINIX"
|
||||||
|
|
||||||
|
#elif defined(__UNIX_SV__)
|
||||||
|
# define PLATFORM_ID "UNIX_SV"
|
||||||
|
|
||||||
|
#elif defined(__bsdos__)
|
||||||
|
# define PLATFORM_ID "BSDOS"
|
||||||
|
|
||||||
|
#elif defined(_MPRAS) || defined(MPRAS)
|
||||||
|
# define PLATFORM_ID "MP-RAS"
|
||||||
|
|
||||||
|
#elif defined(__osf) || defined(__osf__)
|
||||||
|
# define PLATFORM_ID "OSF1"
|
||||||
|
|
||||||
|
#elif defined(_SCO_SV) || defined(SCO_SV) || defined(sco_sv)
|
||||||
|
# define PLATFORM_ID "SCO_SV"
|
||||||
|
|
||||||
|
#elif defined(__ultrix) || defined(__ultrix__) || defined(_ULTRIX)
|
||||||
|
# define PLATFORM_ID "ULTRIX"
|
||||||
|
|
||||||
|
#elif defined(__XENIX__) || defined(_XENIX) || defined(XENIX)
|
||||||
|
# define PLATFORM_ID "Xenix"
|
||||||
|
|
||||||
|
#elif defined(__WATCOMC__)
|
||||||
|
# if defined(__LINUX__)
|
||||||
|
# define PLATFORM_ID "Linux"
|
||||||
|
|
||||||
|
# elif defined(__DOS__)
|
||||||
|
# define PLATFORM_ID "DOS"
|
||||||
|
|
||||||
|
# elif defined(__OS2__)
|
||||||
|
# define PLATFORM_ID "OS2"
|
||||||
|
|
||||||
|
# elif defined(__WINDOWS__)
|
||||||
|
# define PLATFORM_ID "Windows3x"
|
||||||
|
|
||||||
|
# elif defined(__VXWORKS__)
|
||||||
|
# define PLATFORM_ID "VxWorks"
|
||||||
|
|
||||||
|
# else /* unknown platform */
|
||||||
|
# define PLATFORM_ID
|
||||||
|
# endif
|
||||||
|
|
||||||
|
#elif defined(__INTEGRITY)
|
||||||
|
# if defined(INT_178B)
|
||||||
|
# define PLATFORM_ID "Integrity178"
|
||||||
|
|
||||||
|
# else /* regular Integrity */
|
||||||
|
# define PLATFORM_ID "Integrity"
|
||||||
|
# endif
|
||||||
|
|
||||||
|
# elif defined(_ADI_COMPILER)
|
||||||
|
# define PLATFORM_ID "ADSP"
|
||||||
|
|
||||||
|
#else /* unknown platform */
|
||||||
|
# define PLATFORM_ID
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* For windows compilers MSVC and Intel we can determine
|
||||||
|
the architecture of the compiler being used. This is because
|
||||||
|
the compilers do not have flags that can change the architecture,
|
||||||
|
but rather depend on which compiler is being used
|
||||||
|
*/
|
||||||
|
#if defined(_WIN32) && defined(_MSC_VER)
|
||||||
|
# if defined(_M_IA64)
|
||||||
|
# define ARCHITECTURE_ID "IA64"
|
||||||
|
|
||||||
|
# elif defined(_M_ARM64EC)
|
||||||
|
# define ARCHITECTURE_ID "ARM64EC"
|
||||||
|
|
||||||
|
# elif defined(_M_X64) || defined(_M_AMD64)
|
||||||
|
# define ARCHITECTURE_ID "x64"
|
||||||
|
|
||||||
|
# elif defined(_M_IX86)
|
||||||
|
# define ARCHITECTURE_ID "X86"
|
||||||
|
|
||||||
|
# elif defined(_M_ARM64)
|
||||||
|
# define ARCHITECTURE_ID "ARM64"
|
||||||
|
|
||||||
|
# elif defined(_M_ARM)
|
||||||
|
# if _M_ARM == 4
|
||||||
|
# define ARCHITECTURE_ID "ARMV4I"
|
||||||
|
# elif _M_ARM == 5
|
||||||
|
# define ARCHITECTURE_ID "ARMV5I"
|
||||||
|
# else
|
||||||
|
# define ARCHITECTURE_ID "ARMV" STRINGIFY(_M_ARM)
|
||||||
|
# endif
|
||||||
|
|
||||||
|
# elif defined(_M_MIPS)
|
||||||
|
# define ARCHITECTURE_ID "MIPS"
|
||||||
|
|
||||||
|
# elif defined(_M_SH)
|
||||||
|
# define ARCHITECTURE_ID "SHx"
|
||||||
|
|
||||||
|
# else /* unknown architecture */
|
||||||
|
# define ARCHITECTURE_ID ""
|
||||||
|
# endif
|
||||||
|
|
||||||
|
#elif defined(__WATCOMC__)
|
||||||
|
# if defined(_M_I86)
|
||||||
|
# define ARCHITECTURE_ID "I86"
|
||||||
|
|
||||||
|
# elif defined(_M_IX86)
|
||||||
|
# define ARCHITECTURE_ID "X86"
|
||||||
|
|
||||||
|
# else /* unknown architecture */
|
||||||
|
# define ARCHITECTURE_ID ""
|
||||||
|
# endif
|
||||||
|
|
||||||
|
#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)
|
||||||
|
# if defined(__ICCARM__)
|
||||||
|
# define ARCHITECTURE_ID "ARM"
|
||||||
|
|
||||||
|
# elif defined(__ICCRX__)
|
||||||
|
# define ARCHITECTURE_ID "RX"
|
||||||
|
|
||||||
|
# elif defined(__ICCRH850__)
|
||||||
|
# define ARCHITECTURE_ID "RH850"
|
||||||
|
|
||||||
|
# elif defined(__ICCRL78__)
|
||||||
|
# define ARCHITECTURE_ID "RL78"
|
||||||
|
|
||||||
|
# elif defined(__ICCRISCV__)
|
||||||
|
# define ARCHITECTURE_ID "RISCV"
|
||||||
|
|
||||||
|
# elif defined(__ICCAVR__)
|
||||||
|
# define ARCHITECTURE_ID "AVR"
|
||||||
|
|
||||||
|
# elif defined(__ICC430__)
|
||||||
|
# define ARCHITECTURE_ID "MSP430"
|
||||||
|
|
||||||
|
# elif defined(__ICCV850__)
|
||||||
|
# define ARCHITECTURE_ID "V850"
|
||||||
|
|
||||||
|
# elif defined(__ICC8051__)
|
||||||
|
# define ARCHITECTURE_ID "8051"
|
||||||
|
|
||||||
|
# elif defined(__ICCSTM8__)
|
||||||
|
# define ARCHITECTURE_ID "STM8"
|
||||||
|
|
||||||
|
# else /* unknown architecture */
|
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||||||
|
# define COMPILER_VERSION_PATCH DEC(__INTEL_COMPILER_UPDATE)
|
||||||
|
# else
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__INTEL_COMPILER % 10)
|
||||||
|
# endif
|
||||||
|
# else
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__INTEL_COMPILER)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__INTEL_COMPILER_UPDATE)
|
||||||
|
/* The third version component from --version is an update index,
|
||||||
|
but no macro is provided for it. */
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(0)
|
||||||
|
# endif
|
||||||
|
# if defined(__INTEL_COMPILER_BUILD_DATE)
|
||||||
|
/* __INTEL_COMPILER_BUILD_DATE = YYYYMMDD */
|
||||||
|
# define COMPILER_VERSION_TWEAK DEC(__INTEL_COMPILER_BUILD_DATE)
|
||||||
|
# endif
|
||||||
|
# if defined(_MSC_VER)
|
||||||
|
/* _MSC_VER = VVRR */
|
||||||
|
# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100)
|
||||||
|
# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100)
|
||||||
|
# endif
|
||||||
|
# if defined(__GNUC__)
|
||||||
|
# define SIMULATE_VERSION_MAJOR DEC(__GNUC__)
|
||||||
|
# elif defined(__GNUG__)
|
||||||
|
# define SIMULATE_VERSION_MAJOR DEC(__GNUG__)
|
||||||
|
# endif
|
||||||
|
# if defined(__GNUC_MINOR__)
|
||||||
|
# define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__)
|
||||||
|
# endif
|
||||||
|
# if defined(__GNUC_PATCHLEVEL__)
|
||||||
|
# define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__)
|
||||||
|
# endif
|
||||||
|
|
||||||
|
#elif (defined(__clang__) && defined(__INTEL_CLANG_COMPILER)) || defined(__INTEL_LLVM_COMPILER)
|
||||||
|
# define COMPILER_ID "IntelLLVM"
|
||||||
|
#if defined(_MSC_VER)
|
||||||
|
# define SIMULATE_ID "MSVC"
|
||||||
|
#endif
|
||||||
|
#if defined(__GNUC__)
|
||||||
|
# define SIMULATE_ID "GNU"
|
||||||
|
#endif
|
||||||
|
/* __INTEL_LLVM_COMPILER = VVVVRP prior to 2021.2.0, VVVVRRPP for 2021.2.0 and
|
||||||
|
* later. Look for 6 digit vs. 8 digit version number to decide encoding.
|
||||||
|
* VVVV is no smaller than the current year when a version is released.
|
||||||
|
*/
|
||||||
|
#if __INTEL_LLVM_COMPILER < 1000000L
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__INTEL_LLVM_COMPILER/100)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__INTEL_LLVM_COMPILER/10 % 10)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__INTEL_LLVM_COMPILER % 10)
|
||||||
|
#else
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__INTEL_LLVM_COMPILER/10000)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__INTEL_LLVM_COMPILER/100 % 100)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__INTEL_LLVM_COMPILER % 100)
|
||||||
|
#endif
|
||||||
|
#if defined(_MSC_VER)
|
||||||
|
/* _MSC_VER = VVRR */
|
||||||
|
# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100)
|
||||||
|
# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100)
|
||||||
|
#endif
|
||||||
|
#if defined(__GNUC__)
|
||||||
|
# define SIMULATE_VERSION_MAJOR DEC(__GNUC__)
|
||||||
|
#elif defined(__GNUG__)
|
||||||
|
# define SIMULATE_VERSION_MAJOR DEC(__GNUG__)
|
||||||
|
#endif
|
||||||
|
#if defined(__GNUC_MINOR__)
|
||||||
|
# define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__)
|
||||||
|
#endif
|
||||||
|
#if defined(__GNUC_PATCHLEVEL__)
|
||||||
|
# define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#elif defined(__PATHCC__)
|
||||||
|
# define COMPILER_ID "PathScale"
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__PATHCC__)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__PATHCC_MINOR__)
|
||||||
|
# if defined(__PATHCC_PATCHLEVEL__)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__PATHCC_PATCHLEVEL__)
|
||||||
|
# endif
|
||||||
|
|
||||||
|
#elif defined(__BORLANDC__) && defined(__CODEGEARC_VERSION__)
|
||||||
|
# define COMPILER_ID "Embarcadero"
|
||||||
|
# define COMPILER_VERSION_MAJOR HEX(__CODEGEARC_VERSION__>>24 & 0x00FF)
|
||||||
|
# define COMPILER_VERSION_MINOR HEX(__CODEGEARC_VERSION__>>16 & 0x00FF)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__CODEGEARC_VERSION__ & 0xFFFF)
|
||||||
|
|
||||||
|
#elif defined(__BORLANDC__)
|
||||||
|
# define COMPILER_ID "Borland"
|
||||||
|
/* __BORLANDC__ = 0xVRR */
|
||||||
|
# define COMPILER_VERSION_MAJOR HEX(__BORLANDC__>>8)
|
||||||
|
# define COMPILER_VERSION_MINOR HEX(__BORLANDC__ & 0xFF)
|
||||||
|
|
||||||
|
#elif defined(__WATCOMC__) && __WATCOMC__ < 1200
|
||||||
|
# define COMPILER_ID "Watcom"
|
||||||
|
/* __WATCOMC__ = VVRR */
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__WATCOMC__ / 100)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10)
|
||||||
|
# if (__WATCOMC__ % 10) > 0
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10)
|
||||||
|
# endif
|
||||||
|
|
||||||
|
#elif defined(__WATCOMC__)
|
||||||
|
# define COMPILER_ID "OpenWatcom"
|
||||||
|
/* __WATCOMC__ = VVRP + 1100 */
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC((__WATCOMC__ - 1100) / 100)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10)
|
||||||
|
# if (__WATCOMC__ % 10) > 0
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10)
|
||||||
|
# endif
|
||||||
|
|
||||||
|
#elif defined(__SUNPRO_CC)
|
||||||
|
# define COMPILER_ID "SunPro"
|
||||||
|
# if __SUNPRO_CC >= 0x5100
|
||||||
|
/* __SUNPRO_CC = 0xVRRP */
|
||||||
|
# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_CC>>12)
|
||||||
|
# define COMPILER_VERSION_MINOR HEX(__SUNPRO_CC>>4 & 0xFF)
|
||||||
|
# define COMPILER_VERSION_PATCH HEX(__SUNPRO_CC & 0xF)
|
||||||
|
# else
|
||||||
|
/* __SUNPRO_CC = 0xVRP */
|
||||||
|
# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_CC>>8)
|
||||||
|
# define COMPILER_VERSION_MINOR HEX(__SUNPRO_CC>>4 & 0xF)
|
||||||
|
# define COMPILER_VERSION_PATCH HEX(__SUNPRO_CC & 0xF)
|
||||||
|
# endif
|
||||||
|
|
||||||
|
#elif defined(__HP_aCC)
|
||||||
|
# define COMPILER_ID "HP"
|
||||||
|
/* __HP_aCC = VVRRPP */
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__HP_aCC/10000)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__HP_aCC/100 % 100)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__HP_aCC % 100)
|
||||||
|
|
||||||
|
#elif defined(__DECCXX)
|
||||||
|
# define COMPILER_ID "Compaq"
|
||||||
|
/* __DECCXX_VER = VVRRTPPPP */
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__DECCXX_VER/10000000)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__DECCXX_VER/100000 % 100)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__DECCXX_VER % 10000)
|
||||||
|
|
||||||
|
#elif defined(__IBMCPP__) && defined(__COMPILER_VER__)
|
||||||
|
# define COMPILER_ID "zOS"
|
||||||
|
/* __IBMCPP__ = VRP */
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10)
|
||||||
|
|
||||||
|
#elif defined(__open_xl__) && defined(__clang__)
|
||||||
|
# define COMPILER_ID "IBMClang"
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__open_xl_version__)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__open_xl_release__)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__open_xl_modification__)
|
||||||
|
# define COMPILER_VERSION_TWEAK DEC(__open_xl_ptf_fix_level__)
|
||||||
|
|
||||||
|
|
||||||
|
#elif defined(__ibmxl__) && defined(__clang__)
|
||||||
|
# define COMPILER_ID "XLClang"
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__ibmxl_version__)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__ibmxl_release__)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__ibmxl_modification__)
|
||||||
|
# define COMPILER_VERSION_TWEAK DEC(__ibmxl_ptf_fix_level__)
|
||||||
|
|
||||||
|
|
||||||
|
#elif defined(__IBMCPP__) && !defined(__COMPILER_VER__) && __IBMCPP__ >= 800
|
||||||
|
# define COMPILER_ID "XL"
|
||||||
|
/* __IBMCPP__ = VRP */
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10)
|
||||||
|
|
||||||
|
#elif defined(__IBMCPP__) && !defined(__COMPILER_VER__) && __IBMCPP__ < 800
|
||||||
|
# define COMPILER_ID "VisualAge"
|
||||||
|
/* __IBMCPP__ = VRP */
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10)
|
||||||
|
|
||||||
|
#elif defined(__NVCOMPILER)
|
||||||
|
# define COMPILER_ID "NVHPC"
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__NVCOMPILER_MAJOR__)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__NVCOMPILER_MINOR__)
|
||||||
|
# if defined(__NVCOMPILER_PATCHLEVEL__)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__NVCOMPILER_PATCHLEVEL__)
|
||||||
|
# endif
|
||||||
|
|
||||||
|
#elif defined(__PGI)
|
||||||
|
# define COMPILER_ID "PGI"
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__PGIC__)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__PGIC_MINOR__)
|
||||||
|
# if defined(__PGIC_PATCHLEVEL__)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__PGIC_PATCHLEVEL__)
|
||||||
|
# endif
|
||||||
|
|
||||||
|
#elif defined(__clang__) && defined(__cray__)
|
||||||
|
# define COMPILER_ID "CrayClang"
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__cray_major__)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__cray_minor__)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__cray_patchlevel__)
|
||||||
|
# define COMPILER_VERSION_INTERNAL_STR __clang_version__
|
||||||
|
|
||||||
|
|
||||||
|
#elif defined(_CRAYC)
|
||||||
|
# define COMPILER_ID "Cray"
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(_RELEASE_MAJOR)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(_RELEASE_MINOR)
|
||||||
|
|
||||||
|
#elif defined(__TI_COMPILER_VERSION__)
|
||||||
|
# define COMPILER_ID "TI"
|
||||||
|
/* __TI_COMPILER_VERSION__ = VVVRRRPPP */
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__TI_COMPILER_VERSION__/1000000)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__TI_COMPILER_VERSION__/1000 % 1000)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__TI_COMPILER_VERSION__ % 1000)
|
||||||
|
|
||||||
|
#elif defined(__CLANG_FUJITSU)
|
||||||
|
# define COMPILER_ID "FujitsuClang"
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__FCC_major__)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__FCC_minor__)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__FCC_patchlevel__)
|
||||||
|
# define COMPILER_VERSION_INTERNAL_STR __clang_version__
|
||||||
|
|
||||||
|
|
||||||
|
#elif defined(__FUJITSU)
|
||||||
|
# define COMPILER_ID "Fujitsu"
|
||||||
|
# if defined(__FCC_version__)
|
||||||
|
# define COMPILER_VERSION __FCC_version__
|
||||||
|
# elif defined(__FCC_major__)
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__FCC_major__)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__FCC_minor__)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__FCC_patchlevel__)
|
||||||
|
# endif
|
||||||
|
# if defined(__fcc_version)
|
||||||
|
# define COMPILER_VERSION_INTERNAL DEC(__fcc_version)
|
||||||
|
# elif defined(__FCC_VERSION)
|
||||||
|
# define COMPILER_VERSION_INTERNAL DEC(__FCC_VERSION)
|
||||||
|
# endif
|
||||||
|
|
||||||
|
|
||||||
|
#elif defined(__ghs__)
|
||||||
|
# define COMPILER_ID "GHS"
|
||||||
|
/* __GHS_VERSION_NUMBER = VVVVRP */
|
||||||
|
# ifdef __GHS_VERSION_NUMBER
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__GHS_VERSION_NUMBER / 100)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__GHS_VERSION_NUMBER / 10 % 10)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__GHS_VERSION_NUMBER % 10)
|
||||||
|
# endif
|
||||||
|
|
||||||
|
#elif defined(__TASKING__)
|
||||||
|
# define COMPILER_ID "Tasking"
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__VERSION__/1000)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__VERSION__ % 100)
|
||||||
|
# define COMPILER_VERSION_INTERNAL DEC(__VERSION__)
|
||||||
|
|
||||||
|
#elif defined(__ORANGEC__)
|
||||||
|
# define COMPILER_ID "OrangeC"
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__ORANGEC_MAJOR__)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__ORANGEC_MINOR__)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__ORANGEC_PATCHLEVEL__)
|
||||||
|
|
||||||
|
#elif defined(__SCO_VERSION__)
|
||||||
|
# define COMPILER_ID "SCO"
|
||||||
|
|
||||||
|
#elif defined(__ARMCC_VERSION) && !defined(__clang__)
|
||||||
|
# define COMPILER_ID "ARMCC"
|
||||||
|
#if __ARMCC_VERSION >= 1000000
|
||||||
|
/* __ARMCC_VERSION = VRRPPPP */
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/1000000)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 100)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000)
|
||||||
|
#else
|
||||||
|
/* __ARMCC_VERSION = VRPPPP */
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/100000)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 10)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
#elif defined(__clang__) && defined(__apple_build_version__)
|
||||||
|
# define COMPILER_ID "AppleClang"
|
||||||
|
# if defined(_MSC_VER)
|
||||||
|
# define SIMULATE_ID "MSVC"
|
||||||
|
# endif
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__clang_major__)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__clang_minor__)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__)
|
||||||
|
# if defined(_MSC_VER)
|
||||||
|
/* _MSC_VER = VVRR */
|
||||||
|
# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100)
|
||||||
|
# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100)
|
||||||
|
# endif
|
||||||
|
# define COMPILER_VERSION_TWEAK DEC(__apple_build_version__)
|
||||||
|
|
||||||
|
#elif defined(__clang__) && defined(__ARMCOMPILER_VERSION)
|
||||||
|
# define COMPILER_ID "ARMClang"
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__ARMCOMPILER_VERSION/1000000)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__ARMCOMPILER_VERSION/10000 % 100)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__ARMCOMPILER_VERSION/100 % 100)
|
||||||
|
# define COMPILER_VERSION_INTERNAL DEC(__ARMCOMPILER_VERSION)
|
||||||
|
|
||||||
|
#elif defined(__clang__) && defined(__ti__)
|
||||||
|
# define COMPILER_ID "TIClang"
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__ti_major__)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__ti_minor__)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__ti_patchlevel__)
|
||||||
|
# define COMPILER_VERSION_INTERNAL DEC(__ti_version__)
|
||||||
|
|
||||||
|
#elif defined(__clang__)
|
||||||
|
# define COMPILER_ID "Clang"
|
||||||
|
# if defined(_MSC_VER)
|
||||||
|
# define SIMULATE_ID "MSVC"
|
||||||
|
# endif
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__clang_major__)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__clang_minor__)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__)
|
||||||
|
# if defined(_MSC_VER)
|
||||||
|
/* _MSC_VER = VVRR */
|
||||||
|
# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100)
|
||||||
|
# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100)
|
||||||
|
# endif
|
||||||
|
|
||||||
|
#elif defined(__LCC__) && (defined(__GNUC__) || defined(__GNUG__) || defined(__MCST__))
|
||||||
|
# define COMPILER_ID "LCC"
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__LCC__ / 100)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__LCC__ % 100)
|
||||||
|
# if defined(__LCC_MINOR__)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__LCC_MINOR__)
|
||||||
|
# endif
|
||||||
|
# if defined(__GNUC__) && defined(__GNUC_MINOR__)
|
||||||
|
# define SIMULATE_ID "GNU"
|
||||||
|
# define SIMULATE_VERSION_MAJOR DEC(__GNUC__)
|
||||||
|
# define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__)
|
||||||
|
# if defined(__GNUC_PATCHLEVEL__)
|
||||||
|
# define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__)
|
||||||
|
# endif
|
||||||
|
# endif
|
||||||
|
|
||||||
|
#elif defined(__GNUC__) || defined(__GNUG__)
|
||||||
|
# define COMPILER_ID "GNU"
|
||||||
|
# if defined(__GNUC__)
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__GNUC__)
|
||||||
|
# else
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__GNUG__)
|
||||||
|
# endif
|
||||||
|
# if defined(__GNUC_MINOR__)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__GNUC_MINOR__)
|
||||||
|
# endif
|
||||||
|
# if defined(__GNUC_PATCHLEVEL__)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__)
|
||||||
|
# endif
|
||||||
|
|
||||||
|
#elif defined(_MSC_VER)
|
||||||
|
# define COMPILER_ID "MSVC"
|
||||||
|
/* _MSC_VER = VVRR */
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(_MSC_VER / 100)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(_MSC_VER % 100)
|
||||||
|
# if defined(_MSC_FULL_VER)
|
||||||
|
# if _MSC_VER >= 1400
|
||||||
|
/* _MSC_FULL_VER = VVRRPPPPP */
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 100000)
|
||||||
|
# else
|
||||||
|
/* _MSC_FULL_VER = VVRRPPPP */
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 10000)
|
||||||
|
# endif
|
||||||
|
# endif
|
||||||
|
# if defined(_MSC_BUILD)
|
||||||
|
# define COMPILER_VERSION_TWEAK DEC(_MSC_BUILD)
|
||||||
|
# endif
|
||||||
|
|
||||||
|
#elif defined(_ADI_COMPILER)
|
||||||
|
# define COMPILER_ID "ADSP"
|
||||||
|
#if defined(__VERSIONNUM__)
|
||||||
|
/* __VERSIONNUM__ = 0xVVRRPPTT */
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC(__VERSIONNUM__ >> 24 & 0xFF)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(__VERSIONNUM__ >> 16 & 0xFF)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__VERSIONNUM__ >> 8 & 0xFF)
|
||||||
|
# define COMPILER_VERSION_TWEAK DEC(__VERSIONNUM__ & 0xFF)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)
|
||||||
|
# define COMPILER_ID "IAR"
|
||||||
|
# if defined(__VER__) && defined(__ICCARM__)
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC((__VER__) / 1000000)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC(((__VER__) / 1000) % 1000)
|
||||||
|
# define COMPILER_VERSION_PATCH DEC((__VER__) % 1000)
|
||||||
|
# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__)
|
||||||
|
# elif defined(__VER__) && (defined(__ICCAVR__) || defined(__ICCRX__) || defined(__ICCRH850__) || defined(__ICCRL78__) || defined(__ICC430__) || defined(__ICCRISCV__) || defined(__ICCV850__) || defined(__ICC8051__) || defined(__ICCSTM8__))
|
||||||
|
# define COMPILER_VERSION_MAJOR DEC((__VER__) / 100)
|
||||||
|
# define COMPILER_VERSION_MINOR DEC((__VER__) - (((__VER__) / 100)*100))
|
||||||
|
# define COMPILER_VERSION_PATCH DEC(__SUBVERSION__)
|
||||||
|
# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__)
|
||||||
|
# endif
|
||||||
|
|
||||||
|
|
||||||
|
/* These compilers are either not known or too old to define an
|
||||||
|
identification macro. Try to identify the platform and guess that
|
||||||
|
it is the native compiler. */
|
||||||
|
#elif defined(__hpux) || defined(__hpua)
|
||||||
|
# define COMPILER_ID "HP"
|
||||||
|
|
||||||
|
#else /* unknown compiler */
|
||||||
|
# define COMPILER_ID ""
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Construct the string literal in pieces to prevent the source from
|
||||||
|
getting matched. Store it in a pointer rather than an array
|
||||||
|
because some compilers will just produce instructions to fill the
|
||||||
|
array rather than assigning a pointer to a static array. */
|
||||||
|
char const* info_compiler = "INFO" ":" "compiler[" COMPILER_ID "]";
|
||||||
|
#ifdef SIMULATE_ID
|
||||||
|
char const* info_simulate = "INFO" ":" "simulate[" SIMULATE_ID "]";
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef __QNXNTO__
|
||||||
|
char const* qnxnto = "INFO" ":" "qnxnto[]";
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if defined(__CRAYXT_COMPUTE_LINUX_TARGET)
|
||||||
|
char const *info_cray = "INFO" ":" "compiler_wrapper[CrayPrgEnv]";
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define STRINGIFY_HELPER(X) #X
|
||||||
|
#define STRINGIFY(X) STRINGIFY_HELPER(X)
|
||||||
|
|
||||||
|
/* Identify known platforms by name. */
|
||||||
|
#if defined(__linux) || defined(__linux__) || defined(linux)
|
||||||
|
# define PLATFORM_ID "Linux"
|
||||||
|
|
||||||
|
#elif defined(__MSYS__)
|
||||||
|
# define PLATFORM_ID "MSYS"
|
||||||
|
|
||||||
|
#elif defined(__CYGWIN__)
|
||||||
|
# define PLATFORM_ID "Cygwin"
|
||||||
|
|
||||||
|
#elif defined(__MINGW32__)
|
||||||
|
# define PLATFORM_ID "MinGW"
|
||||||
|
|
||||||
|
#elif defined(__APPLE__)
|
||||||
|
# define PLATFORM_ID "Darwin"
|
||||||
|
|
||||||
|
#elif defined(_WIN32) || defined(__WIN32__) || defined(WIN32)
|
||||||
|
# define PLATFORM_ID "Windows"
|
||||||
|
|
||||||
|
#elif defined(__FreeBSD__) || defined(__FreeBSD)
|
||||||
|
# define PLATFORM_ID "FreeBSD"
|
||||||
|
|
||||||
|
#elif defined(__NetBSD__) || defined(__NetBSD)
|
||||||
|
# define PLATFORM_ID "NetBSD"
|
||||||
|
|
||||||
|
#elif defined(__OpenBSD__) || defined(__OPENBSD)
|
||||||
|
# define PLATFORM_ID "OpenBSD"
|
||||||
|
|
||||||
|
#elif defined(__sun) || defined(sun)
|
||||||
|
# define PLATFORM_ID "SunOS"
|
||||||
|
|
||||||
|
#elif defined(_AIX) || defined(__AIX) || defined(__AIX__) || defined(__aix) || defined(__aix__)
|
||||||
|
# define PLATFORM_ID "AIX"
|
||||||
|
|
||||||
|
#elif defined(__hpux) || defined(__hpux__)
|
||||||
|
# define PLATFORM_ID "HP-UX"
|
||||||
|
|
||||||
|
#elif defined(__HAIKU__)
|
||||||
|
# define PLATFORM_ID "Haiku"
|
||||||
|
|
||||||
|
#elif defined(__BeOS) || defined(__BEOS__) || defined(_BEOS)
|
||||||
|
# define PLATFORM_ID "BeOS"
|
||||||
|
|
||||||
|
#elif defined(__QNX__) || defined(__QNXNTO__)
|
||||||
|
# define PLATFORM_ID "QNX"
|
||||||
|
|
||||||
|
#elif defined(__tru64) || defined(_tru64) || defined(__TRU64__)
|
||||||
|
# define PLATFORM_ID "Tru64"
|
||||||
|
|
||||||
|
#elif defined(__riscos) || defined(__riscos__)
|
||||||
|
# define PLATFORM_ID "RISCos"
|
||||||
|
|
||||||
|
#elif defined(__sinix) || defined(__sinix__) || defined(__SINIX__)
|
||||||
|
# define PLATFORM_ID "SINIX"
|
||||||
|
|
||||||
|
#elif defined(__UNIX_SV__)
|
||||||
|
# define PLATFORM_ID "UNIX_SV"
|
||||||
|
|
||||||
|
#elif defined(__bsdos__)
|
||||||
|
# define PLATFORM_ID "BSDOS"
|
||||||
|
|
||||||
|
#elif defined(_MPRAS) || defined(MPRAS)
|
||||||
|
# define PLATFORM_ID "MP-RAS"
|
||||||
|
|
||||||
|
#elif defined(__osf) || defined(__osf__)
|
||||||
|
# define PLATFORM_ID "OSF1"
|
||||||
|
|
||||||
|
#elif defined(_SCO_SV) || defined(SCO_SV) || defined(sco_sv)
|
||||||
|
# define PLATFORM_ID "SCO_SV"
|
||||||
|
|
||||||
|
#elif defined(__ultrix) || defined(__ultrix__) || defined(_ULTRIX)
|
||||||
|
# define PLATFORM_ID "ULTRIX"
|
||||||
|
|
||||||
|
#elif defined(__XENIX__) || defined(_XENIX) || defined(XENIX)
|
||||||
|
# define PLATFORM_ID "Xenix"
|
||||||
|
|
||||||
|
#elif defined(__WATCOMC__)
|
||||||
|
# if defined(__LINUX__)
|
||||||
|
# define PLATFORM_ID "Linux"
|
||||||
|
|
||||||
|
# elif defined(__DOS__)
|
||||||
|
# define PLATFORM_ID "DOS"
|
||||||
|
|
||||||
|
# elif defined(__OS2__)
|
||||||
|
# define PLATFORM_ID "OS2"
|
||||||
|
|
||||||
|
# elif defined(__WINDOWS__)
|
||||||
|
# define PLATFORM_ID "Windows3x"
|
||||||
|
|
||||||
|
# elif defined(__VXWORKS__)
|
||||||
|
# define PLATFORM_ID "VxWorks"
|
||||||
|
|
||||||
|
# else /* unknown platform */
|
||||||
|
# define PLATFORM_ID
|
||||||
|
# endif
|
||||||
|
|
||||||
|
#elif defined(__INTEGRITY)
|
||||||
|
# if defined(INT_178B)
|
||||||
|
# define PLATFORM_ID "Integrity178"
|
||||||
|
|
||||||
|
# else /* regular Integrity */
|
||||||
|
# define PLATFORM_ID "Integrity"
|
||||||
|
# endif
|
||||||
|
|
||||||
|
# elif defined(_ADI_COMPILER)
|
||||||
|
# define PLATFORM_ID "ADSP"
|
||||||
|
|
||||||
|
#else /* unknown platform */
|
||||||
|
# define PLATFORM_ID
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* For windows compilers MSVC and Intel we can determine
|
||||||
|
the architecture of the compiler being used. This is because
|
||||||
|
the compilers do not have flags that can change the architecture,
|
||||||
|
but rather depend on which compiler is being used
|
||||||
|
*/
|
||||||
|
#if defined(_WIN32) && defined(_MSC_VER)
|
||||||
|
# if defined(_M_IA64)
|
||||||
|
# define ARCHITECTURE_ID "IA64"
|
||||||
|
|
||||||
|
# elif defined(_M_ARM64EC)
|
||||||
|
# define ARCHITECTURE_ID "ARM64EC"
|
||||||
|
|
||||||
|
# elif defined(_M_X64) || defined(_M_AMD64)
|
||||||
|
# define ARCHITECTURE_ID "x64"
|
||||||
|
|
||||||
|
# elif defined(_M_IX86)
|
||||||
|
# define ARCHITECTURE_ID "X86"
|
||||||
|
|
||||||
|
# elif defined(_M_ARM64)
|
||||||
|
# define ARCHITECTURE_ID "ARM64"
|
||||||
|
|
||||||
|
# elif defined(_M_ARM)
|
||||||
|
# if _M_ARM == 4
|
||||||
|
# define ARCHITECTURE_ID "ARMV4I"
|
||||||
|
# elif _M_ARM == 5
|
||||||
|
# define ARCHITECTURE_ID "ARMV5I"
|
||||||
|
# else
|
||||||
|
# define ARCHITECTURE_ID "ARMV" STRINGIFY(_M_ARM)
|
||||||
|
# endif
|
||||||
|
|
||||||
|
# elif defined(_M_MIPS)
|
||||||
|
# define ARCHITECTURE_ID "MIPS"
|
||||||
|
|
||||||
|
# elif defined(_M_SH)
|
||||||
|
# define ARCHITECTURE_ID "SHx"
|
||||||
|
|
||||||
|
# else /* unknown architecture */
|
||||||
|
# define ARCHITECTURE_ID ""
|
||||||
|
# endif
|
||||||
|
|
||||||
|
#elif defined(__WATCOMC__)
|
||||||
|
# if defined(_M_I86)
|
||||||
|
# define ARCHITECTURE_ID "I86"
|
||||||
|
|
||||||
|
# elif defined(_M_IX86)
|
||||||
|
# define ARCHITECTURE_ID "X86"
|
||||||
|
|
||||||
|
# else /* unknown architecture */
|
||||||
|
# define ARCHITECTURE_ID ""
|
||||||
|
# endif
|
||||||
|
|
||||||
|
#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)
|
||||||
|
# if defined(__ICCARM__)
|
||||||
|
# define ARCHITECTURE_ID "ARM"
|
||||||
|
|
||||||
|
# elif defined(__ICCRX__)
|
||||||
|
# define ARCHITECTURE_ID "RX"
|
||||||
|
|
||||||
|
# elif defined(__ICCRH850__)
|
||||||
|
# define ARCHITECTURE_ID "RH850"
|
||||||
|
|
||||||
|
# elif defined(__ICCRL78__)
|
||||||
|
# define ARCHITECTURE_ID "RL78"
|
||||||
|
|
||||||
|
# elif defined(__ICCRISCV__)
|
||||||
|
# define ARCHITECTURE_ID "RISCV"
|
||||||
|
|
||||||
|
# elif defined(__ICCAVR__)
|
||||||
|
# define ARCHITECTURE_ID "AVR"
|
||||||
|
|
||||||
|
# elif defined(__ICC430__)
|
||||||
|
# define ARCHITECTURE_ID "MSP430"
|
||||||
|
|
||||||
|
# elif defined(__ICCV850__)
|
||||||
|
# define ARCHITECTURE_ID "V850"
|
||||||
|
|
||||||
|
# elif defined(__ICC8051__)
|
||||||
|
# define ARCHITECTURE_ID "8051"
|
||||||
|
|
||||||
|
# elif defined(__ICCSTM8__)
|
||||||
|
# define ARCHITECTURE_ID "STM8"
|
||||||
|
|
||||||
|
# else /* unknown architecture */
|
||||||
|
# define ARCHITECTURE_ID ""
|
||||||
|
# endif
|
||||||
|
|
||||||
|
#elif defined(__ghs__)
|
||||||
|
# if defined(__PPC64__)
|
||||||
|
# define ARCHITECTURE_ID "PPC64"
|
||||||
|
|
||||||
|
# elif defined(__ppc__)
|
||||||
|
# define ARCHITECTURE_ID "PPC"
|
||||||
|
|
||||||
|
# elif defined(__ARM__)
|
||||||
|
# define ARCHITECTURE_ID "ARM"
|
||||||
|
|
||||||
|
# elif defined(__x86_64__)
|
||||||
|
# define ARCHITECTURE_ID "x64"
|
||||||
|
|
||||||
|
# elif defined(__i386__)
|
||||||
|
# define ARCHITECTURE_ID "X86"
|
||||||
|
|
||||||
|
# else /* unknown architecture */
|
||||||
|
# define ARCHITECTURE_ID ""
|
||||||
|
# endif
|
||||||
|
|
||||||
|
#elif defined(__clang__) && defined(__ti__)
|
||||||
|
# if defined(__ARM_ARCH)
|
||||||
|
# define ARCHITECTURE_ID "Arm"
|
||||||
|
|
||||||
|
# else /* unknown architecture */
|
||||||
|
# define ARCHITECTURE_ID ""
|
||||||
|
# endif
|
||||||
|
|
||||||
|
#elif defined(__TI_COMPILER_VERSION__)
|
||||||
|
# if defined(__TI_ARM__)
|
||||||
|
# define ARCHITECTURE_ID "ARM"
|
||||||
|
|
||||||
|
# elif defined(__MSP430__)
|
||||||
|
# define ARCHITECTURE_ID "MSP430"
|
||||||
|
|
||||||
|
# elif defined(__TMS320C28XX__)
|
||||||
|
# define ARCHITECTURE_ID "TMS320C28x"
|
||||||
|
|
||||||
|
# elif defined(__TMS320C6X__) || defined(_TMS320C6X)
|
||||||
|
# define ARCHITECTURE_ID "TMS320C6x"
|
||||||
|
|
||||||
|
# else /* unknown architecture */
|
||||||
|
# define ARCHITECTURE_ID ""
|
||||||
|
# endif
|
||||||
|
|
||||||
|
# elif defined(__ADSPSHARC__)
|
||||||
|
# define ARCHITECTURE_ID "SHARC"
|
||||||
|
|
||||||
|
# elif defined(__ADSPBLACKFIN__)
|
||||||
|
# define ARCHITECTURE_ID "Blackfin"
|
||||||
|
|
||||||
|
#elif defined(__TASKING__)
|
||||||
|
|
||||||
|
# if defined(__CTC__) || defined(__CPTC__)
|
||||||
|
# define ARCHITECTURE_ID "TriCore"
|
||||||
|
|
||||||
|
# elif defined(__CMCS__)
|
||||||
|
# define ARCHITECTURE_ID "MCS"
|
||||||
|
|
||||||
|
# elif defined(__CARM__)
|
||||||
|
# define ARCHITECTURE_ID "ARM"
|
||||||
|
|
||||||
|
# elif defined(__CARC__)
|
||||||
|
# define ARCHITECTURE_ID "ARC"
|
||||||
|
|
||||||
|
# elif defined(__C51__)
|
||||||
|
# define ARCHITECTURE_ID "8051"
|
||||||
|
|
||||||
|
# elif defined(__CPCP__)
|
||||||
|
# define ARCHITECTURE_ID "PCP"
|
||||||
|
|
||||||
|
# else
|
||||||
|
# define ARCHITECTURE_ID ""
|
||||||
|
# endif
|
||||||
|
|
||||||
|
#else
|
||||||
|
# define ARCHITECTURE_ID
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Convert integer to decimal digit literals. */
|
||||||
|
#define DEC(n) \
|
||||||
|
('0' + (((n) / 10000000)%10)), \
|
||||||
|
('0' + (((n) / 1000000)%10)), \
|
||||||
|
('0' + (((n) / 100000)%10)), \
|
||||||
|
('0' + (((n) / 10000)%10)), \
|
||||||
|
('0' + (((n) / 1000)%10)), \
|
||||||
|
('0' + (((n) / 100)%10)), \
|
||||||
|
('0' + (((n) / 10)%10)), \
|
||||||
|
('0' + ((n) % 10))
|
||||||
|
|
||||||
|
/* Convert integer to hex digit literals. */
|
||||||
|
#define HEX(n) \
|
||||||
|
('0' + ((n)>>28 & 0xF)), \
|
||||||
|
('0' + ((n)>>24 & 0xF)), \
|
||||||
|
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|
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|
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ClCompile:
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CMakeCCompilerId.c
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|
|
||||||
|
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|
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|
|
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|
message: |
|
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|
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||||||
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Build flags:
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|
|
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|
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MSBuild version 17.14.8+a7a4d5af0 for .NET Framework
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ClCompile:
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CMakeCXXCompilerId.cpp
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Time Elapsed 00:00:00.65
|
||||||
|
|
||||||
|
|
||||||
|
Compilation of the CXX compiler identification source "CMakeCXXCompilerId.cpp" produced "CompilerIdCXX.exe"
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||||||
|
|
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|
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MSBuild version 17.14.8+a7a4d5af0 for .NET Framework
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|
||||||
|
ClCompile:
|
||||||
|
C:\\Program Files\\Microsoft Visual Studio\\2022\\Community\\VC\\Tools\\MSVC\\14.38.33130\\bin\\HostX64\\x64\\CL.exe /c /Zi /W1 /WX- /diagnostics:column /Od /Ob0 /D _MBCS /D WIN32 /D _WINDOWS /D "CMAKE_INTDIR=\\"Debug\\"" /RTC1 /MDd /GS /fp:precise /Zc:wchar_t /Zc:forScope /Zc:inline /Fo"cmTC_74449.dir\\Debug\\\\" /Fd"cmTC_74449.dir\\Debug\\vc143.pdb" /external:W1 /Gd /TC /errorReport:queue "C:\\Program Files\\CMake\\share\\cmake-3.30\\Modules\\CMakeCCompilerABI.c"
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Microsoft (R) C/C++ Optimizing Compiler Version 19.38.33145 for x64
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|
Copyright (C) Microsoft Corporation. All rights reserved.
|
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cl /c /Zi /W1 /WX- /diagnostics:column /Od /Ob0 /D _MBCS /D WIN32 /D _WINDOWS /D "CMAKE_INTDIR=\\"Debug\\"" /RTC1 /MDd /GS /fp:precise /Zc:wchar_t /Zc:forScope /Zc:inline /Fo"cmTC_74449.dir\\Debug\\\\" /Fd"cmTC_74449.dir\\Debug\\vc143.pdb" /external:W1 /Gd /TC /errorReport:queue "C:\\Program Files\\CMake\\share\\cmake-3.30\\Modules\\CMakeCCompilerABI.c"
|
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|
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|
0 Warning(s)
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|
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|
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|
MSBuild version 17.14.8+a7a4d5af0 for .NET Framework
|
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|
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Creating "cmTC_c0d87.dir\\Debug\\cmTC_c0d87.tlog\\unsuccessfulbuild" because "AlwaysCreate" was specified.
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|
Touching "cmTC_c0d87.dir\\Debug\\cmTC_c0d87.tlog\\unsuccessfulbuild".
|
||||||
|
ClCompile:
|
||||||
|
C:\\Program Files\\Microsoft Visual Studio\\2022\\Community\\VC\\Tools\\MSVC\\14.38.33130\\bin\\HostX64\\x64\\CL.exe /c /Zi /W1 /WX- /diagnostics:column /Od /Ob0 /D _MBCS /D WIN32 /D _WINDOWS /D "CMAKE_INTDIR=\\"Debug\\"" /EHsc /RTC1 /MDd /GS /fp:precise /Zc:wchar_t /Zc:forScope /Zc:inline /GR /Fo"cmTC_c0d87.dir\\Debug\\\\" /Fd"cmTC_c0d87.dir\\Debug\\vc143.pdb" /external:W1 /Gd /TP /errorReport:queue "C:\\Program Files\\CMake\\share\\cmake-3.30\\Modules\\CMakeCXXCompilerABI.cpp"
|
||||||
|
Microsoft (R) C/C++ Optimizing Compiler Version 19.38.33145 for x64
|
||||||
|
Copyright (C) Microsoft Corporation. All rights reserved.
|
||||||
|
cl /c /Zi /W1 /WX- /diagnostics:column /Od /Ob0 /D _MBCS /D WIN32 /D _WINDOWS /D "CMAKE_INTDIR=\\"Debug\\"" /EHsc /RTC1 /MDd /GS /fp:precise /Zc:wchar_t /Zc:forScope /Zc:inline /GR /Fo"cmTC_c0d87.dir\\Debug\\\\" /Fd"cmTC_c0d87.dir\\Debug\\vc143.pdb" /external:W1 /Gd /TP /errorReport:queue "C:\\Program Files\\CMake\\share\\cmake-3.30\\Modules\\CMakeCXXCompilerABI.cpp"
|
||||||
|
CMakeCXXCompilerABI.cpp
|
||||||
|
Link:
|
||||||
|
C:\\Program Files\\Microsoft Visual Studio\\2022\\Community\\VC\\Tools\\MSVC\\14.38.33130\\bin\\HostX64\\x64\\link.exe /ERRORREPORT:QUEUE /OUT:"E:\\Projects\\Embedded\\Shmingo-HAL\\Shmingo-HAL\\CMakeFiles\\CMakeScratch\\TryCompile-ixz7ih\\Debug\\cmTC_c0d87.exe" /INCREMENTAL /ILK:"cmTC_c0d87.dir\\Debug\\cmTC_c0d87.ilk" /NOLOGO kernel32.lib user32.lib gdi32.lib winspool.lib shell32.lib ole32.lib oleaut32.lib uuid.lib comdlg32.lib advapi32.lib /MANIFEST /MANIFESTUAC:"level='asInvoker' uiAccess='false'" /manifest:embed /DEBUG /PDB:"E:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL/CMakeFiles/CMakeScratch/TryCompile-ixz7ih/Debug/cmTC_c0d87.pdb" /SUBSYSTEM:CONSOLE /TLBID:1 /DYNAMICBASE /NXCOMPAT /IMPLIB:"E:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL/CMakeFiles/CMakeScratch/TryCompile-ixz7ih/Debug/cmTC_c0d87.lib" /MACHINE:X64 /machine:x64 cmTC_c0d87.dir\\Debug\\CMakeCXXCompilerABI.obj
|
||||||
|
cmTC_c0d87.vcxproj -> E:\\Projects\\Embedded\\Shmingo-HAL\\Shmingo-HAL\\CMakeFiles\\CMakeScratch\\TryCompile-ixz7ih\\Debug\\cmTC_c0d87.exe
|
||||||
|
FinalizeBuildStatus:
|
||||||
|
Deleting file "cmTC_c0d87.dir\\Debug\\cmTC_c0d87.tlog\\unsuccessfulbuild".
|
||||||
|
Touching "cmTC_c0d87.dir\\Debug\\cmTC_c0d87.tlog\\cmTC_c0d87.lastbuildstate".
|
||||||
|
Done Building Project "E:\\Projects\\Embedded\\Shmingo-HAL\\Shmingo-HAL\\CMakeFiles\\CMakeScratch\\TryCompile-ixz7ih\\cmTC_c0d87.vcxproj" (default targets).
|
||||||
|
|
||||||
|
Build succeeded.
|
||||||
|
0 Warning(s)
|
||||||
|
0 Error(s)
|
||||||
|
|
||||||
|
Time Elapsed 00:00:00.52
|
||||||
|
|
||||||
|
exitCode: 0
|
||||||
|
-
|
||||||
|
kind: "message-v1"
|
||||||
|
backtrace:
|
||||||
|
- "C:/Program Files/CMake/share/cmake-3.30/Modules/CMakeDetermineCompilerABI.cmake:218 (message)"
|
||||||
|
- "C:/Program Files/CMake/share/cmake-3.30/Modules/CMakeTestCXXCompiler.cmake:26 (CMAKE_DETERMINE_COMPILER_ABI)"
|
||||||
|
- "CMakeLists.txt:3 (project)"
|
||||||
|
message: |
|
||||||
|
Parsed CXX implicit link information:
|
||||||
|
link line regex: [^( *|.*[/\\])(ld[0-9]*(\\.[a-z]+)?|link\\.exe|lld-link(\\.exe)?|CMAKE_LINK_STARTFILE-NOTFOUND|([^/\\]+-)?ld|collect2)[^/\\]*( |$)]
|
||||||
|
linker tool regex: [^[ ]*(->|")?[ ]*(([^"]*[/\\])?(ld[0-9]*(\\.[a-z]+)?|link\\.exe|lld-link(\\.exe)?))("|,| |$)]
|
||||||
|
linker tool for 'CXX': C:/Program Files/Microsoft Visual Studio/2022/Community/VC/Tools/MSVC/14.38.33130/bin/HostX64/x64/link.exe
|
||||||
|
implicit libs: []
|
||||||
|
implicit objs: []
|
||||||
|
implicit dirs: []
|
||||||
|
implicit fwks: []
|
||||||
|
|
||||||
|
|
||||||
|
-
|
||||||
|
kind: "message-v1"
|
||||||
|
backtrace:
|
||||||
|
- "C:/Program Files/CMake/share/cmake-3.30/Modules/Internal/CMakeDetermineLinkerId.cmake:40 (message)"
|
||||||
|
- "C:/Program Files/CMake/share/cmake-3.30/Modules/CMakeDetermineCompilerABI.cmake:255 (cmake_determine_linker_id)"
|
||||||
|
- "C:/Program Files/CMake/share/cmake-3.30/Modules/CMakeTestCXXCompiler.cmake:26 (CMAKE_DETERMINE_COMPILER_ABI)"
|
||||||
|
- "CMakeLists.txt:3 (project)"
|
||||||
|
message: |
|
||||||
|
Running the CXX compiler's linker: "C:/Program Files/Microsoft Visual Studio/2022/Community/VC/Tools/MSVC/14.38.33130/bin/HostX64/x64/link.exe" "-v"
|
||||||
|
Microsoft (R) Incremental Linker Version 14.38.33145.0
|
||||||
|
Copyright (C) Microsoft Corporation. All rights reserved.
|
||||||
|
-
|
||||||
|
kind: "message-v1"
|
||||||
|
backtrace:
|
||||||
|
- "C:/Program Files/CMake/share/cmake-3.30/Modules/CMakeDetermineCompilerId.cmake:1205 (message)"
|
||||||
|
- "C:/Program Files/CMake/share/cmake-3.30/Modules/CMakeDetermineASMCompiler.cmake:135 (CMAKE_DETERMINE_COMPILER_ID_VENDOR)"
|
||||||
|
- "CMakeLists.txt:17 (enable_language)"
|
||||||
|
message: |
|
||||||
|
Checking whether the ASM compiler is GNU using "--version" did not match "(GNU assembler)|(GCC)|(Free Software Foundation)":
|
||||||
|
Microsoft (R) C/C++ Optimizing Compiler Version 19.38.33145 for x64
|
||||||
|
Copyright (C) Microsoft Corporation. All rights reserved.
|
||||||
|
|
||||||
|
cl : Command line warning D9002 : ignoring unknown option '--version'
|
||||||
|
cl : Command line error D8003 : missing source filename
|
||||||
|
-
|
||||||
|
kind: "message-v1"
|
||||||
|
backtrace:
|
||||||
|
- "C:/Program Files/CMake/share/cmake-3.30/Modules/CMakeDetermineCompilerId.cmake:1205 (message)"
|
||||||
|
- "C:/Program Files/CMake/share/cmake-3.30/Modules/CMakeDetermineASMCompiler.cmake:135 (CMAKE_DETERMINE_COMPILER_ID_VENDOR)"
|
||||||
|
- "CMakeLists.txt:17 (enable_language)"
|
||||||
|
message: |
|
||||||
|
Checking whether the ASM compiler is AppleClang using "--version" did not match "(Apple (clang|LLVM) version)":
|
||||||
|
Microsoft (R) C/C++ Optimizing Compiler Version 19.38.33145 for x64
|
||||||
|
Copyright (C) Microsoft Corporation. All rights reserved.
|
||||||
|
|
||||||
|
cl : Command line warning D9002 : ignoring unknown option '--version'
|
||||||
|
cl : Command line error D8003 : missing source filename
|
||||||
|
-
|
||||||
|
kind: "message-v1"
|
||||||
|
backtrace:
|
||||||
|
- "C:/Program Files/CMake/share/cmake-3.30/Modules/CMakeDetermineCompilerId.cmake:1205 (message)"
|
||||||
|
- "C:/Program Files/CMake/share/cmake-3.30/Modules/CMakeDetermineASMCompiler.cmake:135 (CMAKE_DETERMINE_COMPILER_ID_VENDOR)"
|
||||||
|
- "CMakeLists.txt:17 (enable_language)"
|
||||||
|
message: |
|
||||||
|
Checking whether the ASM compiler is Clang using "--version" did not match "(clang version)":
|
||||||
|
Microsoft (R) C/C++ Optimizing Compiler Version 19.38.33145 for x64
|
||||||
|
Copyright (C) Microsoft Corporation. All rights reserved.
|
||||||
|
|
||||||
|
cl : Command line warning D9002 : ignoring unknown option '--version'
|
||||||
|
cl : Command line error D8003 : missing source filename
|
||||||
|
-
|
||||||
|
kind: "message-v1"
|
||||||
|
backtrace:
|
||||||
|
- "C:/Program Files/CMake/share/cmake-3.30/Modules/CMakeDetermineCompilerId.cmake:1205 (message)"
|
||||||
|
- "C:/Program Files/CMake/share/cmake-3.30/Modules/CMakeDetermineASMCompiler.cmake:135 (CMAKE_DETERMINE_COMPILER_ID_VENDOR)"
|
||||||
|
- "CMakeLists.txt:17 (enable_language)"
|
||||||
|
message: |
|
||||||
|
Checking whether the ASM compiler is ARMClang using "--version" did not match "armclang":
|
||||||
|
Microsoft (R) C/C++ Optimizing Compiler Version 19.38.33145 for x64
|
||||||
|
Copyright (C) Microsoft Corporation. All rights reserved.
|
||||||
|
|
||||||
|
cl : Command line warning D9002 : ignoring unknown option '--version'
|
||||||
|
cl : Command line error D8003 : missing source filename
|
||||||
|
-
|
||||||
|
kind: "message-v1"
|
||||||
|
backtrace:
|
||||||
|
- "C:/Program Files/CMake/share/cmake-3.30/Modules/CMakeDetermineCompilerId.cmake:1205 (message)"
|
||||||
|
- "C:/Program Files/CMake/share/cmake-3.30/Modules/CMakeDetermineASMCompiler.cmake:135 (CMAKE_DETERMINE_COMPILER_ID_VENDOR)"
|
||||||
|
- "CMakeLists.txt:17 (enable_language)"
|
||||||
|
message: |
|
||||||
|
Checking whether the ASM compiler is OrangeC using "--version" did not match "occ \\(OrangeC\\) Version":
|
||||||
|
Microsoft (R) C/C++ Optimizing Compiler Version 19.38.33145 for x64
|
||||||
|
Copyright (C) Microsoft Corporation. All rights reserved.
|
||||||
|
|
||||||
|
cl : Command line warning D9002 : ignoring unknown option '--version'
|
||||||
|
cl : Command line error D8003 : missing source filename
|
||||||
|
-
|
||||||
|
kind: "message-v1"
|
||||||
|
backtrace:
|
||||||
|
- "C:/Program Files/CMake/share/cmake-3.30/Modules/CMakeDetermineCompilerId.cmake:1205 (message)"
|
||||||
|
- "C:/Program Files/CMake/share/cmake-3.30/Modules/CMakeDetermineASMCompiler.cmake:135 (CMAKE_DETERMINE_COMPILER_ID_VENDOR)"
|
||||||
|
- "CMakeLists.txt:17 (enable_language)"
|
||||||
|
message: |
|
||||||
|
Checking whether the ASM compiler is HP using "-V" did not match "HP C":
|
||||||
|
Microsoft (R) C/C++ Optimizing Compiler Version 19.38.33145 for x64
|
||||||
|
Copyright (C) Microsoft Corporation. All rights reserved.
|
||||||
|
|
||||||
|
cl : Command line error D8004 : '/V' requires an argument
|
||||||
|
-
|
||||||
|
kind: "message-v1"
|
||||||
|
backtrace:
|
||||||
|
- "C:/Program Files/CMake/share/cmake-3.30/Modules/CMakeDetermineCompilerId.cmake:1205 (message)"
|
||||||
|
- "C:/Program Files/CMake/share/cmake-3.30/Modules/CMakeDetermineASMCompiler.cmake:135 (CMAKE_DETERMINE_COMPILER_ID_VENDOR)"
|
||||||
|
- "CMakeLists.txt:17 (enable_language)"
|
||||||
|
message: |
|
||||||
|
Checking whether the ASM compiler is Intel using "--version" did not match "(ICC)":
|
||||||
|
Microsoft (R) C/C++ Optimizing Compiler Version 19.38.33145 for x64
|
||||||
|
Copyright (C) Microsoft Corporation. All rights reserved.
|
||||||
|
|
||||||
|
cl : Command line warning D9002 : ignoring unknown option '--version'
|
||||||
|
cl : Command line error D8003 : missing source filename
|
||||||
|
-
|
||||||
|
kind: "message-v1"
|
||||||
|
backtrace:
|
||||||
|
- "C:/Program Files/CMake/share/cmake-3.30/Modules/CMakeDetermineCompilerId.cmake:1205 (message)"
|
||||||
|
- "C:/Program Files/CMake/share/cmake-3.30/Modules/CMakeDetermineASMCompiler.cmake:135 (CMAKE_DETERMINE_COMPILER_ID_VENDOR)"
|
||||||
|
- "CMakeLists.txt:17 (enable_language)"
|
||||||
|
message: |
|
||||||
|
Checking whether the ASM compiler is IntelLLVM using "--version" did not match "(Intel[^
|
||||||
|
]+oneAPI)":
|
||||||
|
Microsoft (R) C/C++ Optimizing Compiler Version 19.38.33145 for x64
|
||||||
|
Copyright (C) Microsoft Corporation. All rights reserved.
|
||||||
|
|
||||||
|
cl : Command line warning D9002 : ignoring unknown option '--version'
|
||||||
|
cl : Command line error D8003 : missing source filename
|
||||||
|
-
|
||||||
|
kind: "message-v1"
|
||||||
|
backtrace:
|
||||||
|
- "C:/Program Files/CMake/share/cmake-3.30/Modules/CMakeDetermineCompilerId.cmake:1205 (message)"
|
||||||
|
- "C:/Program Files/CMake/share/cmake-3.30/Modules/CMakeDetermineASMCompiler.cmake:135 (CMAKE_DETERMINE_COMPILER_ID_VENDOR)"
|
||||||
|
- "CMakeLists.txt:17 (enable_language)"
|
||||||
|
message: |
|
||||||
|
Checking whether the ASM compiler is SunPro using "-V" did not match "Sun C":
|
||||||
|
Microsoft (R) C/C++ Optimizing Compiler Version 19.38.33145 for x64
|
||||||
|
Copyright (C) Microsoft Corporation. All rights reserved.
|
||||||
|
|
||||||
|
cl : Command line error D8004 : '/V' requires an argument
|
||||||
|
-
|
||||||
|
kind: "message-v1"
|
||||||
|
backtrace:
|
||||||
|
- "C:/Program Files/CMake/share/cmake-3.30/Modules/CMakeDetermineCompilerId.cmake:1205 (message)"
|
||||||
|
- "C:/Program Files/CMake/share/cmake-3.30/Modules/CMakeDetermineASMCompiler.cmake:135 (CMAKE_DETERMINE_COMPILER_ID_VENDOR)"
|
||||||
|
- "CMakeLists.txt:17 (enable_language)"
|
||||||
|
message: |
|
||||||
|
Checking whether the ASM compiler is XL using "-qversion" did not match "XL C":
|
||||||
|
Microsoft (R) C/C++ Optimizing Compiler Version 19.38.33145 for x64
|
||||||
|
Copyright (C) Microsoft Corporation. All rights reserved.
|
||||||
|
|
||||||
|
cl : Command line warning D9002 : ignoring unknown option '-qversion'
|
||||||
|
cl : Command line error D8003 : missing source filename
|
||||||
|
-
|
||||||
|
kind: "message-v1"
|
||||||
|
backtrace:
|
||||||
|
- "C:/Program Files/CMake/share/cmake-3.30/Modules/CMakeDetermineCompilerId.cmake:1192 (message)"
|
||||||
|
- "C:/Program Files/CMake/share/cmake-3.30/Modules/CMakeDetermineASMCompiler.cmake:135 (CMAKE_DETERMINE_COMPILER_ID_VENDOR)"
|
||||||
|
- "CMakeLists.txt:17 (enable_language)"
|
||||||
|
message: |
|
||||||
|
Checking whether the ASM compiler is MSVC using "-?" matched "Microsoft":
|
||||||
|
Microsoft (R) C/C++ Optimizing Compiler Version 19.38.33145 for x64
|
||||||
|
Copyright (C) Microsoft Corporation. All rights reserved.
|
||||||
|
|
||||||
|
C/C++ COMPILER OPTIONS
|
||||||
|
|
||||||
|
|
||||||
|
-OPTIMIZATION-
|
||||||
|
|
||||||
|
/O1 maximum optimizations (favor space) /O2 maximum optimizations (favor speed)
|
||||||
|
/Ob<n> inline expansion (default n=0) /Od disable optimizations (default)
|
||||||
|
/Og enable global optimization /Oi[-] enable intrinsic functions
|
||||||
|
/Os favor code space /Ot favor code speed
|
||||||
|
/Ox optimizations (favor speed)
|
||||||
|
/favor:<blend|AMD64|INTEL64|ATOM> select processor to optimize for, one of:
|
||||||
|
blend - a combination of optimizations for several different x64 processors
|
||||||
|
AMD64 - 64-bit AMD processors
|
||||||
|
INTEL64 - Intel(R)64 architecture processors
|
||||||
|
ATOM - Intel(R) Atom(TM) processors
|
||||||
|
|
||||||
|
-CODE GENERATION-
|
||||||
|
|
||||||
|
/Gu[-] ensure distinct functions have distinct addresses
|
||||||
|
/Gw[-] separate global variables for linker
|
||||||
|
/GF enable read-only string pooling /Gm[-] enable minimal rebuild
|
||||||
|
/Gy[-] separate functions for linker /GS[-] enable security checks
|
||||||
|
/GR[-] enable C++ RTTI /GX[-] enable C++ EH (same as /EHsc)
|
||||||
|
/guard:cf[-] enable CFG (control flow guard)
|
||||||
|
/guard:ehcont[-] enable EH continuation metadata (CET)
|
||||||
|
/EHs enable C++ EH (no SEH exceptions) /EHa enable C++ EH (w/ SEH exceptions)
|
||||||
|
/EHc extern "C" defaults to nothrow
|
||||||
|
/EHr always generate noexcept runtime termination checks
|
||||||
|
/fp:<contract|except[-]|fast|precise|strict> choose floating-point model:
|
||||||
|
contract - consider floating-point contractions when generating code
|
||||||
|
except[-] - consider floating-point exceptions when generating code
|
||||||
|
fast - "fast" floating-point model; results are less predictable
|
||||||
|
precise - "precise" floating-point model; results are predictable
|
||||||
|
strict - "strict" floating-point model (implies /fp:except)
|
||||||
|
/Qfast_transcendentals generate inline FP intrinsics even with /fp:except
|
||||||
|
/Qspectre[-] enable mitigations for CVE 2017-5753
|
||||||
|
/Qpar[-] enable parallel code generation
|
||||||
|
/Qpar-report:1 auto-parallelizer diagnostic; indicate parallelized loops
|
||||||
|
/Qpar-report:2 auto-parallelizer diagnostic; indicate loops not parallelized
|
||||||
|
/Qvec-report:1 auto-vectorizer diagnostic; indicate vectorized loops
|
||||||
|
/Qvec-report:2 auto-vectorizer diagnostic; indicate loops not vectorized
|
||||||
|
/GL[-] enable link-time code generation
|
||||||
|
/volatile:<iso|ms> choose volatile model:
|
||||||
|
iso - Acquire/release semantics not guaranteed on volatile accesses
|
||||||
|
ms - Acquire/release semantics guaranteed on volatile accesses
|
||||||
|
/GA optimize for Windows Application /Ge force stack checking for all funcs
|
||||||
|
/Gs[num] control stack checking calls /Gh enable _penter function call
|
||||||
|
/GH enable _pexit function call /GT generate fiber-safe TLS accesses
|
||||||
|
/RTC1 Enable fast checks (/RTCsu) /RTCc Convert to smaller type checks
|
||||||
|
/RTCs Stack Frame runtime checking /RTCu Uninitialized local usage checks
|
||||||
|
/clr[:option] compile for common language runtime, where option is:
|
||||||
|
pure : produce IL-only output file (no native executable code)
|
||||||
|
safe : produce IL-only verifiable output file
|
||||||
|
netcore : produce assemblies targeting .NET Core runtime
|
||||||
|
noAssembly : do not produce an assembly
|
||||||
|
nostdlib : ignore the system .NET framework directory when searching for assemblies
|
||||||
|
nostdimport : do not import any required assemblies implicitly
|
||||||
|
initialAppDomain : enable initial AppDomain behavior of Visual C++ 2002
|
||||||
|
implicitKeepAlive- : turn off implicit emission of System::GC::KeepAlive(this)
|
||||||
|
/fsanitize=address Enable address sanitizer codegen
|
||||||
|
/homeparams Force parameters passed in registers to be written to the stack
|
||||||
|
/GZ Enable stack checks (/RTCs) /Gv __vectorcall calling convention
|
||||||
|
/arch:<AVX|AVX2|AVX512> minimum CPU architecture requirements, one of:
|
||||||
|
AVX - enable use of instructions available with AVX-enabled CPUs
|
||||||
|
AVX2 - enable use of instructions available with AVX2-enabled CPUs
|
||||||
|
AVX512 - enable use of instructions available with AVX-512-enabled CPUs
|
||||||
|
/QIntel-jcc-erratum enable mitigations for Intel JCC erratum
|
||||||
|
/Qspectre-load Enable spectre mitigations for all instructions which load memory
|
||||||
|
/Qspectre-load-cf Enable spectre mitigations for all control-flow instructions which load memory
|
||||||
|
/Qspectre-jmp[-] Enable spectre mitigations for unconditional jump instructions
|
||||||
|
/fpcvt:<IA|BC> FP to unsigned integer conversion compatibility
|
||||||
|
IA - results compatible with VCVTTSD2USI instruction
|
||||||
|
BC - results compatible with VS2017 and earlier compiler
|
||||||
|
/jumptablerdata Place jump tables for switch case statements in .rdata section
|
||||||
|
|
||||||
|
-OUTPUT FILES-
|
||||||
|
|
||||||
|
/Fa[file] name assembly listing file /FA[scu] configure assembly listing
|
||||||
|
/Fd[file] name .PDB file /Fe<file> name executable file
|
||||||
|
/Fm[file] name map file /Fo<file> name object file
|
||||||
|
/Fp<file> name precompiled header file /Fr[file] name source browser file
|
||||||
|
/FR[file] name extended .SBR file /Fi[file] name preprocessed file
|
||||||
|
/Fd: <file> name .PDB file /Fe: <file> name executable file
|
||||||
|
/Fm: <file> name map file /Fo: <file> name object file
|
||||||
|
/Fp: <file> name .PCH file /FR: <file> name extended .SBR file
|
||||||
|
/Fi: <file> name preprocessed file
|
||||||
|
/Ft<dir> location of the header files generated for #import
|
||||||
|
/doc[file] process XML documentation comments and optionally name the .xdc file
|
||||||
|
|
||||||
|
-PREPROCESSOR-
|
||||||
|
|
||||||
|
/AI<dir> add to assembly search path /FU<file> import .NET assembly/module
|
||||||
|
/FU:asFriend<file> import .NET assembly/module as friend
|
||||||
|
/C don't strip comments /D<name>{=|#}<text> define macro
|
||||||
|
/E preprocess to stdout /EP preprocess to stdout, no #line
|
||||||
|
/P preprocess to file /Fx merge injected code to file
|
||||||
|
/FI<file> name forced include file /U<name> remove predefined macro
|
||||||
|
/u remove all predefined macros /I<dir> add to include search path
|
||||||
|
/X ignore "standard places"
|
||||||
|
/PH generate #pragma file_hash when preprocessing
|
||||||
|
/PD print all macro definitions
|
||||||
|
|
||||||
|
-LANGUAGE-
|
||||||
|
|
||||||
|
/std:<c++14|c++17|c++20|c++latest> C++ standard version
|
||||||
|
c++14 - ISO/IEC 14882:2014 (default)
|
||||||
|
c++17 - ISO/IEC 14882:2017
|
||||||
|
c++20 - ISO/IEC 14882:2020
|
||||||
|
c++latest - latest draft standard (feature set subject to change)
|
||||||
|
/permissive[-] enable some nonconforming code to compile (feature set subject to change) (on by default)
|
||||||
|
/Ze enable extensions (default) /Za disable extensions
|
||||||
|
/ZW enable WinRT language extensions /Zs syntax check only
|
||||||
|
/Zc:arg1[,arg2] C++ language conformance, where arguments can be:
|
||||||
|
forScope[-] enforce Standard C++ for scoping rules
|
||||||
|
wchar_t[-] wchar_t is the native type, not a typedef
|
||||||
|
auto[-] enforce the new Standard C++ meaning for auto
|
||||||
|
trigraphs[-] enable trigraphs (off by default)
|
||||||
|
rvalueCast[-] enforce Standard C++ explicit type conversion rules
|
||||||
|
strictStrings[-] disable string-literal to [char|wchar_t]*
|
||||||
|
conversion (off by default)
|
||||||
|
implicitNoexcept[-] enable implicit noexcept on required functions
|
||||||
|
threadSafeInit[-] enable thread-safe local static initialization
|
||||||
|
inline[-] remove unreferenced function or data if it is
|
||||||
|
COMDAT or has internal linkage only (off by default)
|
||||||
|
sizedDealloc[-] enable C++14 global sized deallocation
|
||||||
|
functions (on by default)
|
||||||
|
throwingNew[-] assume operator new throws on failure (off by default)
|
||||||
|
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|
||||||
|
lvalue reference (off by default)
|
||||||
|
twoPhase- disable two-phase name lookup
|
||||||
|
ternary[-] enforce C++11 rules for conditional operator (off by default)
|
||||||
|
noexceptTypes[-] enforce C++17 noexcept rules (on by default in C++17 or later)
|
||||||
|
alignedNew[-] enable C++17 alignment of dynamically allocated objects (on by default)
|
||||||
|
hiddenFriend[-] enforce Standard C++ hidden friend rules (implied by /permissive-)
|
||||||
|
externC[-] enforce Standard C++ rules for 'extern "C"' functions (implied by /permissive-)
|
||||||
|
lambda[-] better lambda support by using the newer lambda processor (off by default)
|
||||||
|
tlsGuards[-] generate runtime checks for TLS variable initialization (on by default)
|
||||||
|
zeroSizeArrayNew[-] call member new/delete for 0-size arrays of objects (on by default)
|
||||||
|
static_assert[-] strict handling of 'static_assert' (implied by /permissive-)
|
||||||
|
gotoScope[-] cannot jump past the initialization of a variable (implied by /permissive-)
|
||||||
|
templateScope[-] enforce Standard C++ template parameter shadowing rules
|
||||||
|
enumTypes[-] enable Standard C++ underlying enum types (off by default)
|
||||||
|
checkGwOdr[-] enforce Standard C++ one definition rule violations
|
||||||
|
when /Gw has been enabled (off by default)
|
||||||
|
__STDC__ define __STDC__ to 1 in C
|
||||||
|
/await enable resumable functions extension
|
||||||
|
/await:strict enable standard C++20 coroutine support with earlier language versions
|
||||||
|
/constexpr:depth<N> recursion depth limit for constexpr evaluation (default: 512)
|
||||||
|
/constexpr:backtrace<N> show N constexpr evaluations in diagnostics (default: 10)
|
||||||
|
/constexpr:steps<N> terminate constexpr evaluation after N steps (default: 100000)
|
||||||
|
/Zi enable debugging information /Z7 enable old-style debug info
|
||||||
|
/Zo[-] generate richer debugging information for optimized code (on by default)
|
||||||
|
/ZH:[MD5|SHA1|SHA_256] hash algorithm for calculation of file checksum in debug info (default: SHA_256)
|
||||||
|
/Zp[n] pack structs on n-byte boundary /Zl omit default library name in .OBJ
|
||||||
|
/vd{0|1|2} disable/enable vtordisp /vm<x> type of pointers to members
|
||||||
|
/std:<c11|c17> C standard version
|
||||||
|
c11 - ISO/IEC 9899:2011
|
||||||
|
c17 - ISO/IEC 9899:2018
|
||||||
|
/ZI enable Edit and Continue debug info
|
||||||
|
/openmp enable OpenMP 2.0 language extensions
|
||||||
|
/openmp:experimental enable OpenMP 2.0 language extensions plus select OpenMP 3.0+ language extensions
|
||||||
|
/openmp:llvm OpenMP language extensions using LLVM runtime
|
||||||
|
|
||||||
|
-MISCELLANEOUS-
|
||||||
|
|
||||||
|
@<file> options response file /?, /help print this help message
|
||||||
|
/bigobj generate extended object format /c compile only, no link
|
||||||
|
/errorReport:option deprecated. Report internal compiler errors to Microsoft
|
||||||
|
none - do not send report
|
||||||
|
prompt - prompt to immediately send report
|
||||||
|
queue - at next admin logon, prompt to send report (default)
|
||||||
|
send - send report automatically
|
||||||
|
/FC use full pathnames in diagnostics /H<num> max external name length
|
||||||
|
/J default char type is unsigned
|
||||||
|
/MP[n] use up to 'n' processes for compilation
|
||||||
|
/nologo suppress copyright message /showIncludes show include file names
|
||||||
|
/Tc<source file> compile file as .c /Tp<source file> compile file as .cpp
|
||||||
|
/TC compile all files as .c /TP compile all files as .cpp
|
||||||
|
/V<string> set version string /Yc[file] create .PCH file
|
||||||
|
/Yd put debug info in every .OBJ /Yl[sym] inject .PCH ref for debug lib
|
||||||
|
/Yu[file] use .PCH file /Y- disable all PCH options
|
||||||
|
/Zm<n> max memory alloc (% of default) /FS force to use MSPDBSRV.EXE
|
||||||
|
/source-charset:<iana-name>|.nnnn set source character set
|
||||||
|
/execution-charset:<iana-name>|.nnnn set execution character set
|
||||||
|
/utf-8 set source and execution character set to UTF-8
|
||||||
|
/validate-charset[-] validate UTF-8 files for only legal characters
|
||||||
|
/fastfail[-] enable fast-fail mode /JMC[-] enable native just my code
|
||||||
|
/presetPadding[-] zero initialize padding for stack based class types
|
||||||
|
/volatileMetadata[-] generate metadata on volatile memory accesses
|
||||||
|
/sourcelink [file] file containing source link information
|
||||||
|
|
||||||
|
-LINKING-
|
||||||
|
|
||||||
|
/LD Create .DLL /LDd Create .DLL debug library
|
||||||
|
/LN Create a .netmodule /F<num> set stack size
|
||||||
|
/link [linker options and libraries] /MD link with MSVCRT.LIB
|
||||||
|
/MT link with LIBCMT.LIB /MDd link with MSVCRTD.LIB debug lib
|
||||||
|
/MTd link with LIBCMTD.LIB debug lib
|
||||||
|
|
||||||
|
-CODE ANALYSIS-
|
||||||
|
|
||||||
|
/analyze[-] Enable native analysis /analyze:quiet[-] No warning to console
|
||||||
|
/analyze:log<name> Warnings to file /analyze:autolog Log to *.pftlog
|
||||||
|
/analyze:autolog:ext<ext> Log to *.<ext>/analyze:autolog- No log file
|
||||||
|
/analyze:WX- Warnings not fatal /analyze:stacksize<num> Max stack frame
|
||||||
|
/analyze:max_paths<num> Max paths /analyze:only Analyze, no code gen
|
||||||
|
|
||||||
|
-DIAGNOSTICS-
|
||||||
|
|
||||||
|
/diagnostics:<args,...> controls the format of diagnostic messages:
|
||||||
|
classic - retains prior format
|
||||||
|
column[-] - prints column information
|
||||||
|
caret[-] - prints column and the indicated line of source
|
||||||
|
/Wall enable all warnings /w disable all warnings
|
||||||
|
/W<n> set warning level (default n=1)
|
||||||
|
/Wv:xx[.yy[.zzzzz]] disable warnings introduced after version xx.yy.zzzzz
|
||||||
|
/WX treat warnings as errors /WL enable one line diagnostics
|
||||||
|
/wd<n> disable warning n /we<n> treat warning n as an error
|
||||||
|
/wo<n> issue warning n once /w<l><n> set warning level 1-4 for n
|
||||||
|
/external:I <path> - location of external headers
|
||||||
|
/external:env:<var> - environment variable with locations of external headers
|
||||||
|
/external:anglebrackets - treat all headers included via <> as external
|
||||||
|
/external:W<n> - warning level for external headers
|
||||||
|
/external:templates[-] - evaluate warning level across template instantiation chain
|
||||||
|
/sdl enable additional security features and warnings
|
||||||
|
/options:strict unrecognized compiler options are an error
|
||||||
|
|
||||||
|
...
|
||||||
3
CMakeFiles/TargetDirectories.txt
Normal file
3
CMakeFiles/TargetDirectories.txt
Normal file
@@ -0,0 +1,3 @@
|
|||||||
|
E:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL/CMakeFiles/shmingo-HAL.dir
|
||||||
|
E:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL/CMakeFiles/ALL_BUILD.dir
|
||||||
|
E:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL/CMakeFiles/ZERO_CHECK.dir
|
||||||
1
CMakeFiles/cmake.check_cache
Normal file
1
CMakeFiles/cmake.check_cache
Normal file
@@ -0,0 +1 @@
|
|||||||
|
# This file is generated by cmake for dependency checking of the CMakeCache.txt file
|
||||||
1
CMakeFiles/generate.stamp
Normal file
1
CMakeFiles/generate.stamp
Normal file
@@ -0,0 +1 @@
|
|||||||
|
# CMake generation timestamp file for this directory.
|
||||||
111
CMakeFiles/generate.stamp.depend
Normal file
111
CMakeFiles/generate.stamp.depend
Normal file
@@ -0,0 +1,111 @@
|
|||||||
|
# CMake generation dependency list for this directory.
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
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|
||||||
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|
||||||
|
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|
||||||
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
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|
||||||
|
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|
||||||
|
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|
||||||
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|
||||||
|
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|
||||||
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|
||||||
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|
||||||
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
C:/Program Files/CMake/share/cmake-3.30/Modules/Compiler/zOS-C-DetermineCompiler.cmake
|
||||||
|
C:/Program Files/CMake/share/cmake-3.30/Modules/Compiler/zOS-CXX-DetermineCompiler.cmake
|
||||||
|
C:/Program Files/CMake/share/cmake-3.30/Modules/CompilerId/VS-10.vcxproj.in
|
||||||
|
C:/Program Files/CMake/share/cmake-3.30/Modules/Internal/CMakeDetermineLinkerId.cmake
|
||||||
|
C:/Program Files/CMake/share/cmake-3.30/Modules/Internal/FeatureTesting.cmake
|
||||||
|
C:/Program Files/CMake/share/cmake-3.30/Modules/Platform/Windows-Determine-CXX.cmake
|
||||||
|
C:/Program Files/CMake/share/cmake-3.30/Modules/Platform/Windows-Initialize.cmake
|
||||||
|
C:/Program Files/CMake/share/cmake-3.30/Modules/Platform/Windows-MSVC-C.cmake
|
||||||
|
C:/Program Files/CMake/share/cmake-3.30/Modules/Platform/Windows-MSVC-CXX.cmake
|
||||||
|
C:/Program Files/CMake/share/cmake-3.30/Modules/Platform/Windows-MSVC.cmake
|
||||||
|
C:/Program Files/CMake/share/cmake-3.30/Modules/Platform/Windows.cmake
|
||||||
|
C:/Program Files/CMake/share/cmake-3.30/Modules/Platform/WindowsPaths.cmake
|
||||||
|
E:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL/CMakeFiles/3.30.4/CMakeASMCompiler.cmake
|
||||||
|
E:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL/CMakeFiles/3.30.4/CMakeCCompiler.cmake
|
||||||
|
E:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL/CMakeFiles/3.30.4/CMakeCXXCompiler.cmake
|
||||||
|
E:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL/CMakeFiles/3.30.4/CMakeRCCompiler.cmake
|
||||||
|
E:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL/CMakeFiles/3.30.4/CMakeSystem.cmake
|
||||||
|
E:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL/CMakeLists.txt
|
||||||
1
CMakeFiles/generate.stamp.list
Normal file
1
CMakeFiles/generate.stamp.list
Normal file
@@ -0,0 +1 @@
|
|||||||
|
E:/Projects/Embedded/Shmingo-HAL/Shmingo-HAL/CMakeFiles/generate.stamp
|
||||||
@@ -3,15 +3,15 @@ cmake_minimum_required(VERSION 3.19)
|
|||||||
project(shmingo-HAL)
|
project(shmingo-HAL)
|
||||||
set(PROJECT_DIR ${CMAKE_CURRENT_SOURCE_DIR})
|
set(PROJECT_DIR ${CMAKE_CURRENT_SOURCE_DIR})
|
||||||
|
|
||||||
set(MCU_FAMILY "STM32F0xx" CACHE STRING "MCU family")
|
set(MCU_FAMILY "STM32L4xx" CACHE STRING "MCU family")
|
||||||
set(MCU_MODEL "" CACHE STRING "MCU model")
|
set(MCU_MODEL "STM32L432xx" CACHE STRING "MCU model")
|
||||||
|
|
||||||
set(CPU_PARAMETERS
|
set(CPU_PARAMETERS
|
||||||
-mcpu=cortex-m0
|
-mcpu=cortex-m4
|
||||||
-mthumb)
|
-mthumb)
|
||||||
|
|
||||||
set(STARTUP_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/MX/startup_stm32f072rbtx.s)
|
set(STARTUP_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/MX/L432KC/startup_stm32l432kcux.s)
|
||||||
set(MCU_LINKER_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/MX/STM32F072RBTX_FLASH.ld)
|
set(MCU_LINKER_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/MX/L432KC/STM32L432KCUX_FLASH.ld)
|
||||||
|
|
||||||
set(EXECUTABLE ${CMAKE_PROJECT_NAME})
|
set(EXECUTABLE ${CMAKE_PROJECT_NAME})
|
||||||
enable_language(C CXX ASM)
|
enable_language(C CXX ASM)
|
||||||
@@ -34,12 +34,23 @@ set(PROJECT_INCLUDE_DIRECTORIES
|
|||||||
SHAL/Include/Peripheral/Timer/Reg
|
SHAL/Include/Peripheral/Timer/Reg
|
||||||
SHAL/Include/Peripheral/GPIO
|
SHAL/Include/Peripheral/GPIO
|
||||||
SHAL/Include/Peripheral/GPIO/Reg
|
SHAL/Include/Peripheral/GPIO/Reg
|
||||||
|
SHAL/Include/Peripheral/UART
|
||||||
|
SHAL/Include/Peripheral/UART/Reg
|
||||||
|
SHAL/Include/Peripheral/I2C
|
||||||
|
SHAL/Include/Peripheral/I2C/Reg
|
||||||
|
SHAL/Include/Peripheral/ADC
|
||||||
|
SHAL/Include/Peripheral/ADC/Reg
|
||||||
|
SHAL/Include/Peripheral/EXT/
|
||||||
|
SHAL/Include/Peripheral/EXT/Reg
|
||||||
${CMAKE_CURRENT_SOURCE_DIR}/SHAL/Include
|
${CMAKE_CURRENT_SOURCE_DIR}/SHAL/Include
|
||||||
)
|
)
|
||||||
|
|
||||||
file(GLOB_RECURSE PROJECT_SOURCES
|
file(GLOB_RECURSE PROJECT_SOURCES
|
||||||
${CMAKE_CURRENT_SOURCE_DIR}/SHAL/*.c
|
${CMAKE_CURRENT_SOURCE_DIR}/SHAL/Src/${MCU_FAMILY}/*.c
|
||||||
${CMAKE_CURRENT_SOURCE_DIR}/SHAL/*.cpp
|
${CMAKE_CURRENT_SOURCE_DIR}/SHAL/Src/${MCU_FAMILY}/*.cpp
|
||||||
|
${CMAKE_CURRENT_SOURCE_DIR}/SHAL/Src/Universal/*.c
|
||||||
|
${CMAKE_CURRENT_SOURCE_DIR}/SHAL/Src/Universal/*.cpp
|
||||||
|
${CMAKE_CURRENT_SOURCE_DIR}/SHAL/Src/main.cpp
|
||||||
)
|
)
|
||||||
|
|
||||||
add_executable(${EXECUTABLE}
|
add_executable(${EXECUTABLE}
|
||||||
@@ -62,6 +73,8 @@ target_compile_options(${EXECUTABLE} PRIVATE
|
|||||||
-Wextra
|
-Wextra
|
||||||
-Wpedantic
|
-Wpedantic
|
||||||
-Wno-unused-parameter
|
-Wno-unused-parameter
|
||||||
|
-Wno-switch
|
||||||
|
-Wno-implicit-fallthrough
|
||||||
$<$<COMPILE_LANGUAGE:CXX>:
|
$<$<COMPILE_LANGUAGE:CXX>:
|
||||||
-Wno-volatile
|
-Wno-volatile
|
||||||
-Wsuggest-override>
|
-Wsuggest-override>
|
||||||
|
|||||||
@@ -369,16 +369,16 @@ typedef struct
|
|||||||
|
|
||||||
typedef struct
|
typedef struct
|
||||||
{
|
{
|
||||||
__IO uint32_t MODER; /*!< GPIO port mode register, Address offset: 0x00 */
|
__IO uint32_t MODER; /*!< SHAL_GPIO port mode register, Address offset: 0x00 */
|
||||||
__IO uint32_t OTYPER; /*!< GPIO port output type register, Address offset: 0x04 */
|
__IO uint32_t OTYPER; /*!< SHAL_GPIO port output type register, Address offset: 0x04 */
|
||||||
__IO uint32_t OSPEEDR; /*!< GPIO port output speed register, Address offset: 0x08 */
|
__IO uint32_t OSPEEDR; /*!< SHAL_GPIO port output speed register, Address offset: 0x08 */
|
||||||
__IO uint32_t PUPDR; /*!< GPIO port pull-up/pull-down register, Address offset: 0x0C */
|
__IO uint32_t PUPDR; /*!< SHAL_GPIO port pull-up/pull-down register, Address offset: 0x0C */
|
||||||
__IO uint32_t IDR; /*!< GPIO port input data register, Address offset: 0x10 */
|
__IO uint32_t IDR; /*!< SHAL_GPIO port input data register, Address offset: 0x10 */
|
||||||
__IO uint32_t ODR; /*!< GPIO port output data register, Address offset: 0x14 */
|
__IO uint32_t ODR; /*!< SHAL_GPIO port output data register, Address offset: 0x14 */
|
||||||
__IO uint32_t BSRR; /*!< GPIO port bit set/reset register, Address offset: 0x1A */
|
__IO uint32_t BSRR; /*!< SHAL_GPIO port bit set/reset register, Address offset: 0x1A */
|
||||||
__IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */
|
__IO uint32_t LCKR; /*!< SHAL_GPIO port configuration lock register, Address offset: 0x1C */
|
||||||
__IO uint32_t AFR[2]; /*!< GPIO alternate function low register, Address offset: 0x20-0x24 */
|
__IO uint32_t AFR[2]; /*!< SHAL_GPIO alternate function low register, Address offset: 0x20-0x24 */
|
||||||
__IO uint32_t BRR; /*!< GPIO bit reset register, Address offset: 0x28 */
|
__IO uint32_t BRR; /*!< SHAL_GPIO bit reset register, Address offset: 0x28 */
|
||||||
} GPIO_TypeDef;
|
} GPIO_TypeDef;
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@@ -6490,7 +6490,7 @@ typedef struct
|
|||||||
|
|
||||||
/******************************************************************************/
|
/******************************************************************************/
|
||||||
/* */
|
/* */
|
||||||
/* General Purpose IOs (GPIO) */
|
/* General Purpose IOs (SHAL_GPIO) */
|
||||||
/* */
|
/* */
|
||||||
/******************************************************************************/
|
/******************************************************************************/
|
||||||
/******************* Bit definition for GPIO_MODER register *****************/
|
/******************* Bit definition for GPIO_MODER register *****************/
|
||||||
@@ -10933,7 +10933,7 @@ typedef struct
|
|||||||
((INSTANCE) == DMA1_Channel6) || \
|
((INSTANCE) == DMA1_Channel6) || \
|
||||||
((INSTANCE) == DMA1_Channel7))
|
((INSTANCE) == DMA1_Channel7))
|
||||||
|
|
||||||
/****************************** GPIO Instances ********************************/
|
/****************************** SHAL_GPIO Instances ********************************/
|
||||||
#define IS_GPIO_ALL_INSTANCE(INSTANCE) (((INSTANCE) == GPIOA) || \
|
#define IS_GPIO_ALL_INSTANCE(INSTANCE) (((INSTANCE) == GPIOA) || \
|
||||||
((INSTANCE) == GPIOB) || \
|
((INSTANCE) == GPIOB) || \
|
||||||
((INSTANCE) == GPIOC) || \
|
((INSTANCE) == GPIOC) || \
|
||||||
@@ -10941,14 +10941,14 @@ typedef struct
|
|||||||
((INSTANCE) == GPIOE) || \
|
((INSTANCE) == GPIOE) || \
|
||||||
((INSTANCE) == GPIOF))
|
((INSTANCE) == GPIOF))
|
||||||
|
|
||||||
/**************************** GPIO Alternate Function Instances ***************/
|
/**************************** SHAL_GPIO Alternate Function Instances ***************/
|
||||||
#define IS_GPIO_AF_INSTANCE(INSTANCE) (((INSTANCE) == GPIOA) || \
|
#define IS_GPIO_AF_INSTANCE(INSTANCE) (((INSTANCE) == GPIOA) || \
|
||||||
((INSTANCE) == GPIOB) || \
|
((INSTANCE) == GPIOB) || \
|
||||||
((INSTANCE) == GPIOC) || \
|
((INSTANCE) == GPIOC) || \
|
||||||
((INSTANCE) == GPIOD) || \
|
((INSTANCE) == GPIOD) || \
|
||||||
((INSTANCE) == GPIOE))
|
((INSTANCE) == GPIOE))
|
||||||
|
|
||||||
/****************************** GPIO Lock Instances ***************************/
|
/****************************** SHAL_GPIO Lock Instances ***************************/
|
||||||
#define IS_GPIO_LOCK_INSTANCE(INSTANCE) (((INSTANCE) == GPIOA) || \
|
#define IS_GPIO_LOCK_INSTANCE(INSTANCE) (((INSTANCE) == GPIOA) || \
|
||||||
((INSTANCE) == GPIOB))
|
((INSTANCE) == GPIOB))
|
||||||
|
|
||||||
@@ -11192,11 +11192,11 @@ typedef struct
|
|||||||
/****************************** TSC Instances *********************************/
|
/****************************** TSC Instances *********************************/
|
||||||
#define IS_TSC_ALL_INSTANCE(INSTANCE) ((INSTANCE) == TSC)
|
#define IS_TSC_ALL_INSTANCE(INSTANCE) ((INSTANCE) == TSC)
|
||||||
|
|
||||||
/*********************** UART Instances : IRDA mode ***************************/
|
/*********************** SHAL_UART Instances : IRDA mode ***************************/
|
||||||
#define IS_IRDA_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
|
#define IS_IRDA_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
|
||||||
((INSTANCE) == USART2))
|
((INSTANCE) == USART2))
|
||||||
|
|
||||||
/********************* UART Instances : Smard card mode ***********************/
|
/********************* SHAL_UART Instances : Smard card mode ***********************/
|
||||||
#define IS_SMARTCARD_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
|
#define IS_SMARTCARD_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
|
||||||
((INSTANCE) == USART2))
|
((INSTANCE) == USART2))
|
||||||
|
|
||||||
@@ -11210,35 +11210,35 @@ typedef struct
|
|||||||
#define IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
|
#define IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
|
||||||
((INSTANCE) == USART2))
|
((INSTANCE) == USART2))
|
||||||
|
|
||||||
/******************** UART Instances : Asynchronous mode **********************/
|
/******************** SHAL_UART Instances : Asynchronous mode **********************/
|
||||||
#define IS_UART_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
|
#define IS_UART_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
|
||||||
((INSTANCE) == USART2) || \
|
((INSTANCE) == USART2) || \
|
||||||
((INSTANCE) == USART3) || \
|
((INSTANCE) == USART3) || \
|
||||||
((INSTANCE) == USART4))
|
((INSTANCE) == USART4))
|
||||||
|
|
||||||
/******************** UART Instances : Half-Duplex mode **********************/
|
/******************** SHAL_UART Instances : Half-Duplex mode **********************/
|
||||||
#define IS_UART_HALFDUPLEX_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
|
#define IS_UART_HALFDUPLEX_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
|
||||||
((INSTANCE) == USART2) || \
|
((INSTANCE) == USART2) || \
|
||||||
((INSTANCE) == USART3) || \
|
((INSTANCE) == USART3) || \
|
||||||
((INSTANCE) == USART4))
|
((INSTANCE) == USART4))
|
||||||
|
|
||||||
/****************** UART Instances : Hardware Flow control ********************/
|
/****************** SHAL_UART Instances : Hardware Flow control ********************/
|
||||||
#define IS_UART_HWFLOW_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
|
#define IS_UART_HWFLOW_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
|
||||||
((INSTANCE) == USART2) || \
|
((INSTANCE) == USART2) || \
|
||||||
((INSTANCE) == USART3) || \
|
((INSTANCE) == USART3) || \
|
||||||
((INSTANCE) == USART4))
|
((INSTANCE) == USART4))
|
||||||
|
|
||||||
/****************** UART Instances : LIN mode ********************/
|
/****************** SHAL_UART Instances : LIN mode ********************/
|
||||||
#define IS_UART_LIN_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
|
#define IS_UART_LIN_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
|
||||||
((INSTANCE) == USART2))
|
((INSTANCE) == USART2))
|
||||||
|
|
||||||
/****************** UART Instances : wakeup from stop mode ********************/
|
/****************** SHAL_UART Instances : wakeup from stop mode ********************/
|
||||||
#define IS_UART_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
|
#define IS_UART_WAKEUP_FROMSTOP_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
|
||||||
((INSTANCE) == USART2))
|
((INSTANCE) == USART2))
|
||||||
/* Old macro definition maintained for legacy purpose */
|
/* Old macro definition maintained for legacy purpose */
|
||||||
#define IS_UART_WAKEUP_INSTANCE IS_UART_WAKEUP_FROMSTOP_INSTANCE
|
#define IS_UART_WAKEUP_INSTANCE IS_UART_WAKEUP_FROMSTOP_INSTANCE
|
||||||
|
|
||||||
/****************** UART Instances : Driver enable detection ********************/
|
/****************** SHAL_UART Instances : Driver enable detection ********************/
|
||||||
#define IS_UART_DRIVER_ENABLE_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
|
#define IS_UART_DRIVER_ENABLE_INSTANCE(INSTANCE) (((INSTANCE) == USART1) || \
|
||||||
((INSTANCE) == USART2) || \
|
((INSTANCE) == USART2) || \
|
||||||
((INSTANCE) == USART3) || \
|
((INSTANCE) == USART3) || \
|
||||||
|
|||||||
@@ -47,11 +47,6 @@
|
|||||||
*/
|
*/
|
||||||
/* This variable is updated in three ways:
|
/* This variable is updated in three ways:
|
||||||
1) by calling CMSIS function SystemCoreClockUpdate()
|
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||||
3) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
|
||||||
3) by calling HAL API function HAL_RCC_ClockConfig()
|
|
||||||
Note: If you use this function to configure the system clock; then there
|
|
||||||
is no need to call the 2 first functions listed above, since SystemCoreClock
|
|
||||||
variable is updated automatically.
|
|
||||||
*/
|
*/
|
||||||
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
|
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
|
||||||
extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */
|
extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */
|
||||||
|
|||||||
14869
Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l432xx.h
Normal file
14869
Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l432xx.h
Normal file
File diff suppressed because it is too large
Load Diff
303
Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h
Normal file
303
Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h
Normal file
@@ -0,0 +1,303 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32l4xx.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief CMSIS STM32L4xx Device Peripheral Access Layer Header File.
|
||||||
|
*
|
||||||
|
* The file is the unique include file that the application programmer
|
||||||
|
* is using in the C source code, usually in main.c. This file contains:
|
||||||
|
* - Configuration section that allows to select:
|
||||||
|
* - The STM32L4xx device used in the target application
|
||||||
|
* - To use or not the peripheral's drivers in application code(i.e.
|
||||||
|
* code will be based on direct access to peripheral's registers
|
||||||
|
* rather than drivers API), this option is controlled by
|
||||||
|
* "#define USE_HAL_DRIVER"
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2017 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup CMSIS
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup stm32l4xx
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __STM32L4xx_H
|
||||||
|
#define __STM32L4xx_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif /* __cplusplus */
|
||||||
|
|
||||||
|
/** @addtogroup Library_configuration_section
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STM32 Family
|
||||||
|
*/
|
||||||
|
#if !defined (STM32L4)
|
||||||
|
#define STM32L4
|
||||||
|
#endif /* STM32L4 */
|
||||||
|
|
||||||
|
/* Uncomment the line below according to the target STM32L4 device used in your
|
||||||
|
application
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if !defined (STM32L412xx) && !defined (STM32L422xx) && \
|
||||||
|
!defined (STM32L431xx) && !defined (STM32L432xx) && !defined (STM32L433xx) && !defined (STM32L442xx) && !defined (STM32L443xx) && \
|
||||||
|
!defined (STM32L451xx) && !defined (STM32L452xx) && !defined (STM32L462xx) && \
|
||||||
|
!defined (STM32L471xx) && !defined (STM32L475xx) && !defined (STM32L476xx) && !defined (STM32L485xx) && !defined (STM32L486xx) && \
|
||||||
|
!defined (STM32L496xx) && !defined (STM32L4A6xx) && \
|
||||||
|
!defined (STM32L4P5xx) && !defined (STM32L4Q5xx) && \
|
||||||
|
!defined (STM32L4R5xx) && !defined (STM32L4R7xx) && !defined (STM32L4R9xx) && !defined (STM32L4S5xx) && !defined (STM32L4S7xx) && !defined (STM32L4S9xx)
|
||||||
|
/* #define STM32L412xx */ /*!< STM32L412xx Devices */
|
||||||
|
/* #define STM32L422xx */ /*!< STM32L422xx Devices */
|
||||||
|
/* #define STM32L431xx */ /*!< STM32L431xx Devices */
|
||||||
|
/* #define STM32L432xx */ /*!< STM32L432xx Devices */
|
||||||
|
/* #define STM32L433xx */ /*!< STM32L433xx Devices */
|
||||||
|
/* #define STM32L442xx */ /*!< STM32L442xx Devices */
|
||||||
|
/* #define STM32L443xx */ /*!< STM32L443xx Devices */
|
||||||
|
/* #define STM32L451xx */ /*!< STM32L451xx Devices */
|
||||||
|
/* #define STM32L452xx */ /*!< STM32L452xx Devices */
|
||||||
|
/* #define STM32L462xx */ /*!< STM32L462xx Devices */
|
||||||
|
/* #define STM32L471xx */ /*!< STM32L471xx Devices */
|
||||||
|
/* #define STM32L475xx */ /*!< STM32L475xx Devices */
|
||||||
|
/* #define STM32L476xx */ /*!< STM32L476xx Devices */
|
||||||
|
/* #define STM32L485xx */ /*!< STM32L485xx Devices */
|
||||||
|
/* #define STM32L486xx */ /*!< STM32L486xx Devices */
|
||||||
|
/* #define STM32L496xx */ /*!< STM32L496xx Devices */
|
||||||
|
/* #define STM32L4A6xx */ /*!< STM32L4A6xx Devices */
|
||||||
|
/* #define STM32L4P5xx */ /*!< STM32L4Q5xx Devices */
|
||||||
|
/* #define STM32L4R5xx */ /*!< STM32L4R5xx Devices */
|
||||||
|
/* #define STM32L4R7xx */ /*!< STM32L4R7xx Devices */
|
||||||
|
/* #define STM32L4R9xx */ /*!< STM32L4R9xx Devices */
|
||||||
|
/* #define STM32L4S5xx */ /*!< STM32L4S5xx Devices */
|
||||||
|
/* #define STM32L4S7xx */ /*!< STM32L4S7xx Devices */
|
||||||
|
/* #define STM32L4S9xx */ /*!< STM32L4S9xx Devices */
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Tip: To avoid modifying this file each time you need to switch between these
|
||||||
|
devices, you can define the device in your toolchain compiler preprocessor.
|
||||||
|
*/
|
||||||
|
#if !defined (USE_HAL_DRIVER)
|
||||||
|
/**
|
||||||
|
* @brief Comment the line below if you will not use the peripherals drivers.
|
||||||
|
In this case, these drivers will not be included and the application code will
|
||||||
|
be based on direct access to peripherals registers
|
||||||
|
*/
|
||||||
|
/*#define USE_HAL_DRIVER */
|
||||||
|
#endif /* USE_HAL_DRIVER */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief CMSIS Device version number
|
||||||
|
*/
|
||||||
|
#define __STM32L4_CMSIS_VERSION_MAIN (0x01) /*!< [31:24] main version */
|
||||||
|
#define __STM32L4_CMSIS_VERSION_SUB1 (0x07) /*!< [23:16] sub1 version */
|
||||||
|
#define __STM32L4_CMSIS_VERSION_SUB2 (0x04) /*!< [15:8] sub2 version */
|
||||||
|
#define __STM32L4_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */
|
||||||
|
#define __STM32L4_CMSIS_VERSION ((__STM32L4_CMSIS_VERSION_MAIN << 24)\
|
||||||
|
|(__STM32L4_CMSIS_VERSION_SUB1 << 16)\
|
||||||
|
|(__STM32L4_CMSIS_VERSION_SUB2 << 8 )\
|
||||||
|
|(__STM32L4_CMSIS_VERSION_RC))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup Device_Included
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if defined(STM32L412xx)
|
||||||
|
#include "stm32l412xx.h"
|
||||||
|
#elif defined(STM32L422xx)
|
||||||
|
#include "stm32l422xx.h"
|
||||||
|
#elif defined(STM32L431xx)
|
||||||
|
#include "stm32l431xx.h"
|
||||||
|
#elif defined(STM32L432xx)
|
||||||
|
#include "stm32l432xx.h"
|
||||||
|
#elif defined(STM32L433xx)
|
||||||
|
#include "stm32l433xx.h"
|
||||||
|
#elif defined(STM32L442xx)
|
||||||
|
#include "stm32l442xx.h"
|
||||||
|
#elif defined(STM32L443xx)
|
||||||
|
#include "stm32l443xx.h"
|
||||||
|
#elif defined(STM32L451xx)
|
||||||
|
#include "stm32l451xx.h"
|
||||||
|
#elif defined(STM32L452xx)
|
||||||
|
#include "stm32l452xx.h"
|
||||||
|
#elif defined(STM32L462xx)
|
||||||
|
#include "stm32l462xx.h"
|
||||||
|
#elif defined(STM32L471xx)
|
||||||
|
#include "stm32l471xx.h"
|
||||||
|
#elif defined(STM32L475xx)
|
||||||
|
#include "stm32l475xx.h"
|
||||||
|
#elif defined(STM32L476xx)
|
||||||
|
#include "stm32l476xx.h"
|
||||||
|
#elif defined(STM32L485xx)
|
||||||
|
#include "stm32l485xx.h"
|
||||||
|
#elif defined(STM32L486xx)
|
||||||
|
#include "stm32l486xx.h"
|
||||||
|
#elif defined(STM32L496xx)
|
||||||
|
#include "stm32l496xx.h"
|
||||||
|
#elif defined(STM32L4A6xx)
|
||||||
|
#include "stm32l4a6xx.h"
|
||||||
|
#elif defined(STM32L4P5xx)
|
||||||
|
#include "stm32l4p5xx.h"
|
||||||
|
#elif defined(STM32L4Q5xx)
|
||||||
|
#include "stm32l4q5xx.h"
|
||||||
|
#elif defined(STM32L4R5xx)
|
||||||
|
#include "stm32l4r5xx.h"
|
||||||
|
#elif defined(STM32L4R7xx)
|
||||||
|
#include "stm32l4r7xx.h"
|
||||||
|
#elif defined(STM32L4R9xx)
|
||||||
|
#include "stm32l4r9xx.h"
|
||||||
|
#elif defined(STM32L4S5xx)
|
||||||
|
#include "stm32l4s5xx.h"
|
||||||
|
#elif defined(STM32L4S7xx)
|
||||||
|
#include "stm32l4s7xx.h"
|
||||||
|
#elif defined(STM32L4S9xx)
|
||||||
|
#include "stm32l4s9xx.h"
|
||||||
|
#else
|
||||||
|
#error "Please select first the target STM32L4xx device used in your application (in stm32l4xx.h file)"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup Exported_types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
RESET = 0,
|
||||||
|
SET = !RESET
|
||||||
|
} FlagStatus, ITStatus;
|
||||||
|
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
DISABLE = 0,
|
||||||
|
ENABLE = !DISABLE
|
||||||
|
} FunctionalState;
|
||||||
|
#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
|
||||||
|
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
SUCCESS = 0,
|
||||||
|
ERROR = !SUCCESS
|
||||||
|
} ErrorStatus;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/** @addtogroup Exported_macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SET_BIT(REG, BIT) ((REG) |= (BIT))
|
||||||
|
|
||||||
|
#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
|
||||||
|
|
||||||
|
#define READ_BIT(REG, BIT) ((REG) & (BIT))
|
||||||
|
|
||||||
|
#define CLEAR_REG(REG) ((REG) = (0x0))
|
||||||
|
|
||||||
|
#define WRITE_REG(REG, VAL) ((REG) = (VAL))
|
||||||
|
|
||||||
|
#define READ_REG(REG) ((REG))
|
||||||
|
|
||||||
|
#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
|
||||||
|
|
||||||
|
/* Use of CMSIS compiler intrinsics for register exclusive access */
|
||||||
|
/* Atomic 32-bit register access macro to set one or several bits */
|
||||||
|
#define ATOMIC_SET_BIT(REG, BIT) \
|
||||||
|
do { \
|
||||||
|
uint32_t val; \
|
||||||
|
do { \
|
||||||
|
val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT); \
|
||||||
|
} while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
|
||||||
|
} while(0)
|
||||||
|
|
||||||
|
/* Atomic 32-bit register access macro to clear one or several bits */
|
||||||
|
#define ATOMIC_CLEAR_BIT(REG, BIT) \
|
||||||
|
do { \
|
||||||
|
uint32_t val; \
|
||||||
|
do { \
|
||||||
|
val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT); \
|
||||||
|
} while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
|
||||||
|
} while(0)
|
||||||
|
|
||||||
|
/* Atomic 32-bit register access macro to clear and set one or several bits */
|
||||||
|
#define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \
|
||||||
|
do { \
|
||||||
|
uint32_t val; \
|
||||||
|
do { \
|
||||||
|
val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
|
||||||
|
} while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
|
||||||
|
} while(0)
|
||||||
|
|
||||||
|
/* Atomic 16-bit register access macro to set one or several bits */
|
||||||
|
#define ATOMIC_SETH_BIT(REG, BIT) \
|
||||||
|
do { \
|
||||||
|
uint16_t val; \
|
||||||
|
do { \
|
||||||
|
val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT); \
|
||||||
|
} while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
|
||||||
|
} while(0)
|
||||||
|
|
||||||
|
/* Atomic 16-bit register access macro to clear one or several bits */
|
||||||
|
#define ATOMIC_CLEARH_BIT(REG, BIT) \
|
||||||
|
do { \
|
||||||
|
uint16_t val; \
|
||||||
|
do { \
|
||||||
|
val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT); \
|
||||||
|
} while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
|
||||||
|
} while(0)
|
||||||
|
|
||||||
|
/* Atomic 16-bit register access macro to clear and set one or several bits */
|
||||||
|
#define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) \
|
||||||
|
do { \
|
||||||
|
uint16_t val; \
|
||||||
|
do { \
|
||||||
|
val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
|
||||||
|
} while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
|
||||||
|
} while(0)
|
||||||
|
|
||||||
|
#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if defined (USE_HAL_DRIVER)
|
||||||
|
#include "stm32l4xx_hal.h"
|
||||||
|
#endif /* USE_HAL_DRIVER */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif /* __cplusplus */
|
||||||
|
|
||||||
|
#endif /* __STM32L4xx_H */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
106
Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h
Normal file
106
Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h
Normal file
@@ -0,0 +1,106 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file system_stm32l4xx.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief CMSIS Cortex-M4 Device System Source File for STM32L4xx devices.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2017 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup CMSIS
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup stm32l4xx_system
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Define to prevent recursive inclusion
|
||||||
|
*/
|
||||||
|
#ifndef __SYSTEM_STM32L4XX_H
|
||||||
|
#define __SYSTEM_STM32L4XX_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/** @addtogroup STM32L4xx_System_Includes
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/** @addtogroup STM32L4xx_System_Exported_Variables
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* The SystemCoreClock variable is updated in three ways:
|
||||||
|
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||||
|
2) by calling HAL API function HAL_RCC_GetSysClockFreq()
|
||||||
|
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||||
|
Note: If you use this function to configure the system clock; then there
|
||||||
|
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||||
|
variable is updated automatically.
|
||||||
|
*/
|
||||||
|
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
|
||||||
|
|
||||||
|
extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */
|
||||||
|
extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */
|
||||||
|
extern const uint32_t MSIRangeTable[12]; /*!< MSI ranges table values */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32L4xx_System_Exported_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32L4xx_System_Exported_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32L4xx_System_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
extern void SystemInit(void);
|
||||||
|
extern void SystemCoreClockUpdate(void);
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /*__SYSTEM_STM32L4XX_H */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
189
MX/L432KC/STM32L432KCUX_FLASH.ld
Normal file
189
MX/L432KC/STM32L432KCUX_FLASH.ld
Normal file
@@ -0,0 +1,189 @@
|
|||||||
|
/*
|
||||||
|
******************************************************************************
|
||||||
|
**
|
||||||
|
** @file : LinkerScript.ld
|
||||||
|
**
|
||||||
|
** @author : Auto-generated by STM32CubeIDE
|
||||||
|
**
|
||||||
|
** Abstract : Linker script for NUCLEO-L432KC Board embedding STM32L432KCUx Device from stm32l4 series
|
||||||
|
** 256KBytes FLASH
|
||||||
|
** 48KBytes RAM
|
||||||
|
** 16KBytes RAM2
|
||||||
|
**
|
||||||
|
** Set heap size, stack size and stack location according
|
||||||
|
** to application requirements.
|
||||||
|
**
|
||||||
|
** Set memory bank area and size if external memory is used
|
||||||
|
**
|
||||||
|
** Target : STMicroelectronics STM32
|
||||||
|
**
|
||||||
|
** Distribution: The file is distributed as is, without any warranty
|
||||||
|
** of any kind.
|
||||||
|
**
|
||||||
|
******************************************************************************
|
||||||
|
** @attention
|
||||||
|
**
|
||||||
|
** Copyright (c) 2025 STMicroelectronics.
|
||||||
|
** All rights reserved.
|
||||||
|
**
|
||||||
|
** This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
** in the root directory of this software component.
|
||||||
|
** If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
**
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Entry Point */
|
||||||
|
ENTRY(Reset_Handler)
|
||||||
|
|
||||||
|
/* Highest address of the user mode stack */
|
||||||
|
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
|
||||||
|
|
||||||
|
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||||
|
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||||
|
|
||||||
|
/* Memories definition */
|
||||||
|
MEMORY
|
||||||
|
{
|
||||||
|
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 48K
|
||||||
|
RAM2 (xrw) : ORIGIN = 0x10000000, LENGTH = 16K
|
||||||
|
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 256K
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Sections */
|
||||||
|
SECTIONS
|
||||||
|
{
|
||||||
|
/* The startup code into "FLASH" Rom type memory */
|
||||||
|
.isr_vector :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
KEEP(*(.isr_vector)) /* Startup code */
|
||||||
|
. = ALIGN(4);
|
||||||
|
} >FLASH
|
||||||
|
|
||||||
|
/* The program code and other data into "FLASH" Rom type memory */
|
||||||
|
.text :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
*(.text) /* .text sections (code) */
|
||||||
|
*(.text*) /* .text* sections (code) */
|
||||||
|
*(.glue_7) /* glue arm to thumb code */
|
||||||
|
*(.glue_7t) /* glue thumb to arm code */
|
||||||
|
*(.eh_frame)
|
||||||
|
|
||||||
|
KEEP (*(.init))
|
||||||
|
KEEP (*(.fini))
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
_etext = .; /* define a global symbols at end of code */
|
||||||
|
} >FLASH
|
||||||
|
|
||||||
|
/* Constant data into "FLASH" Rom type memory */
|
||||||
|
.rodata :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||||
|
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||||
|
. = ALIGN(4);
|
||||||
|
} >FLASH
|
||||||
|
|
||||||
|
.ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||||
|
. = ALIGN(4);
|
||||||
|
} >FLASH
|
||||||
|
|
||||||
|
.ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
__exidx_start = .;
|
||||||
|
*(.ARM.exidx*)
|
||||||
|
__exidx_end = .;
|
||||||
|
. = ALIGN(4);
|
||||||
|
} >FLASH
|
||||||
|
|
||||||
|
.preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||||
|
KEEP (*(.preinit_array*))
|
||||||
|
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||||
|
. = ALIGN(4);
|
||||||
|
} >FLASH
|
||||||
|
|
||||||
|
.init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
PROVIDE_HIDDEN (__init_array_start = .);
|
||||||
|
KEEP (*(SORT(.init_array.*)))
|
||||||
|
KEEP (*(.init_array*))
|
||||||
|
PROVIDE_HIDDEN (__init_array_end = .);
|
||||||
|
. = ALIGN(4);
|
||||||
|
} >FLASH
|
||||||
|
|
||||||
|
.fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||||
|
KEEP (*(SORT(.fini_array.*)))
|
||||||
|
KEEP (*(.fini_array*))
|
||||||
|
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||||
|
. = ALIGN(4);
|
||||||
|
} >FLASH
|
||||||
|
|
||||||
|
/* Used by the startup to initialize data */
|
||||||
|
_sidata = LOADADDR(.data);
|
||||||
|
|
||||||
|
/* Initialized data sections into "RAM" Ram type memory */
|
||||||
|
.data :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
_sdata = .; /* create a global symbol at data start */
|
||||||
|
*(.data) /* .data sections */
|
||||||
|
*(.data*) /* .data* sections */
|
||||||
|
*(.RamFunc) /* .RamFunc sections */
|
||||||
|
*(.RamFunc*) /* .RamFunc* sections */
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
_edata = .; /* define a global symbol at data end */
|
||||||
|
|
||||||
|
} >RAM AT> FLASH
|
||||||
|
|
||||||
|
/* Uninitialized data section into "RAM" Ram type memory */
|
||||||
|
. = ALIGN(4);
|
||||||
|
.bss :
|
||||||
|
{
|
||||||
|
/* This is used by the startup in order to initialize the .bss section */
|
||||||
|
_sbss = .; /* define a global symbol at bss start */
|
||||||
|
__bss_start__ = _sbss;
|
||||||
|
*(.bss)
|
||||||
|
*(.bss*)
|
||||||
|
*(COMMON)
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
_ebss = .; /* define a global symbol at bss end */
|
||||||
|
__bss_end__ = _ebss;
|
||||||
|
} >RAM
|
||||||
|
|
||||||
|
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
|
||||||
|
._user_heap_stack :
|
||||||
|
{
|
||||||
|
. = ALIGN(8);
|
||||||
|
PROVIDE ( end = . );
|
||||||
|
PROVIDE ( _end = . );
|
||||||
|
. = . + _Min_Heap_Size;
|
||||||
|
. = . + _Min_Stack_Size;
|
||||||
|
. = ALIGN(8);
|
||||||
|
} >RAM
|
||||||
|
|
||||||
|
/* Remove information from the compiler libraries */
|
||||||
|
/DISCARD/ :
|
||||||
|
{
|
||||||
|
libc.a ( * )
|
||||||
|
libm.a ( * )
|
||||||
|
libgcc.a ( * )
|
||||||
|
}
|
||||||
|
|
||||||
|
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||||
|
}
|
||||||
449
MX/L432KC/startup_stm32l432kcux.s
Normal file
449
MX/L432KC/startup_stm32l432kcux.s
Normal file
@@ -0,0 +1,449 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file startup_stm32l432xx.s
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief STM32L432xx devices vector table for GCC toolchain.
|
||||||
|
* This module performs:
|
||||||
|
* - Set the initial SP
|
||||||
|
* - Set the initial PC == Reset_Handler,
|
||||||
|
* - Set the vector table entries with the exceptions ISR address,
|
||||||
|
* - Configure the clock system
|
||||||
|
* - Branches to main in the C library (which eventually
|
||||||
|
* calls main()).
|
||||||
|
* After Reset the Cortex-M4 processor is in Thread mode,
|
||||||
|
* priority is Privileged, and the Stack is set to Main.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2017 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
.syntax unified
|
||||||
|
.cpu cortex-m4
|
||||||
|
.fpu softvfp
|
||||||
|
.thumb
|
||||||
|
|
||||||
|
.global g_pfnVectors
|
||||||
|
.global Default_Handler
|
||||||
|
|
||||||
|
/* start address for the initialization values of the .data section.
|
||||||
|
defined in linker script */
|
||||||
|
.word _sidata
|
||||||
|
/* start address for the .data section. defined in linker script */
|
||||||
|
.word _sdata
|
||||||
|
/* end address for the .data section. defined in linker script */
|
||||||
|
.word _edata
|
||||||
|
/* start address for the .bss section. defined in linker script */
|
||||||
|
.word _sbss
|
||||||
|
/* end address for the .bss section. defined in linker script */
|
||||||
|
.word _ebss
|
||||||
|
|
||||||
|
.equ BootRAM, 0xF1E0F85F
|
||||||
|
/**
|
||||||
|
* @brief This is the code that gets called when the processor first
|
||||||
|
* starts execution following a reset event. Only the absolutely
|
||||||
|
* necessary set is performed, after which the application
|
||||||
|
* supplied main() routine is called.
|
||||||
|
* @param None
|
||||||
|
* @retval : None
|
||||||
|
*/
|
||||||
|
|
||||||
|
.section .text.Reset_Handler
|
||||||
|
.weak Reset_Handler
|
||||||
|
.type Reset_Handler, %function
|
||||||
|
Reset_Handler:
|
||||||
|
ldr sp, =_estack /* Set stack pointer */
|
||||||
|
|
||||||
|
/* Call the clock system initialization function.*/
|
||||||
|
bl SystemInit
|
||||||
|
|
||||||
|
/* Copy the data segment initializers from flash to SRAM */
|
||||||
|
ldr r0, =_sdata
|
||||||
|
ldr r1, =_edata
|
||||||
|
ldr r2, =_sidata
|
||||||
|
movs r3, #0
|
||||||
|
b LoopCopyDataInit
|
||||||
|
|
||||||
|
CopyDataInit:
|
||||||
|
ldr r4, [r2, r3]
|
||||||
|
str r4, [r0, r3]
|
||||||
|
adds r3, r3, #4
|
||||||
|
|
||||||
|
LoopCopyDataInit:
|
||||||
|
adds r4, r0, r3
|
||||||
|
cmp r4, r1
|
||||||
|
bcc CopyDataInit
|
||||||
|
|
||||||
|
/* Zero fill the bss segment. */
|
||||||
|
ldr r2, =_sbss
|
||||||
|
ldr r4, =_ebss
|
||||||
|
movs r3, #0
|
||||||
|
b LoopFillZerobss
|
||||||
|
|
||||||
|
FillZerobss:
|
||||||
|
str r3, [r2]
|
||||||
|
adds r2, r2, #4
|
||||||
|
|
||||||
|
LoopFillZerobss:
|
||||||
|
cmp r2, r4
|
||||||
|
bcc FillZerobss
|
||||||
|
|
||||||
|
/* Call static constructors */
|
||||||
|
bl __libc_init_array
|
||||||
|
/* Call the application's entry point.*/
|
||||||
|
bl main
|
||||||
|
|
||||||
|
LoopForever:
|
||||||
|
b LoopForever
|
||||||
|
|
||||||
|
.size Reset_Handler, .-Reset_Handler
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This is the code that gets called when the processor receives an
|
||||||
|
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||||
|
* the system state for examination by a debugger.
|
||||||
|
*
|
||||||
|
* @param None
|
||||||
|
* @retval : None
|
||||||
|
*/
|
||||||
|
.section .text.Default_Handler,"ax",%progbits
|
||||||
|
Default_Handler:
|
||||||
|
Infinite_Loop:
|
||||||
|
b Infinite_Loop
|
||||||
|
.size Default_Handler, .-Default_Handler
|
||||||
|
/******************************************************************************
|
||||||
|
*
|
||||||
|
* The minimal vector table for a Cortex-M4. Note that the proper constructs
|
||||||
|
* must be placed on this to ensure that it ends up at physical address
|
||||||
|
* 0x0000.0000.
|
||||||
|
*
|
||||||
|
******************************************************************************/
|
||||||
|
.section .isr_vector,"a",%progbits
|
||||||
|
.type g_pfnVectors, %object
|
||||||
|
.size g_pfnVectors, .-g_pfnVectors
|
||||||
|
|
||||||
|
|
||||||
|
g_pfnVectors:
|
||||||
|
.word _estack
|
||||||
|
.word Reset_Handler
|
||||||
|
.word NMI_Handler
|
||||||
|
.word HardFault_Handler
|
||||||
|
.word MemManage_Handler
|
||||||
|
.word BusFault_Handler
|
||||||
|
.word UsageFault_Handler
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word SVC_Handler
|
||||||
|
.word DebugMon_Handler
|
||||||
|
.word 0
|
||||||
|
.word PendSV_Handler
|
||||||
|
.word SysTick_Handler
|
||||||
|
.word WWDG_IRQHandler
|
||||||
|
.word PVD_PVM_IRQHandler
|
||||||
|
.word TAMP_STAMP_IRQHandler
|
||||||
|
.word RTC_WKUP_IRQHandler
|
||||||
|
.word FLASH_IRQHandler
|
||||||
|
.word RCC_IRQHandler
|
||||||
|
.word EXTI0_IRQHandler
|
||||||
|
.word EXTI1_IRQHandler
|
||||||
|
.word EXTI2_IRQHandler
|
||||||
|
.word EXTI3_IRQHandler
|
||||||
|
.word EXTI4_IRQHandler
|
||||||
|
.word DMA1_Channel1_IRQHandler
|
||||||
|
.word DMA1_Channel2_IRQHandler
|
||||||
|
.word DMA1_Channel3_IRQHandler
|
||||||
|
.word DMA1_Channel4_IRQHandler
|
||||||
|
.word DMA1_Channel5_IRQHandler
|
||||||
|
.word DMA1_Channel6_IRQHandler
|
||||||
|
.word DMA1_Channel7_IRQHandler
|
||||||
|
.word ADC1_IRQHandler
|
||||||
|
.word CAN1_TX_IRQHandler
|
||||||
|
.word CAN1_RX0_IRQHandler
|
||||||
|
.word CAN1_RX1_IRQHandler
|
||||||
|
.word CAN1_SCE_IRQHandler
|
||||||
|
.word EXTI9_5_IRQHandler
|
||||||
|
.word TIM1_BRK_TIM15_IRQHandler
|
||||||
|
.word TIM1_UP_TIM16_IRQHandler
|
||||||
|
.word TIM1_TRG_COM_IRQHandler
|
||||||
|
.word TIM1_CC_IRQHandler
|
||||||
|
.word TIM2_IRQHandler
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word I2C1_EV_IRQHandler
|
||||||
|
.word I2C1_ER_IRQHandler
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word SPI1_IRQHandler
|
||||||
|
.word 0
|
||||||
|
.word USART1_IRQHandler
|
||||||
|
.word USART2_IRQHandler
|
||||||
|
.word 0
|
||||||
|
.word EXTI15_10_IRQHandler
|
||||||
|
.word RTC_Alarm_IRQHandler
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word SPI3_IRQHandler
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word TIM6_DAC_IRQHandler
|
||||||
|
.word TIM7_IRQHandler
|
||||||
|
.word DMA2_Channel1_IRQHandler
|
||||||
|
.word DMA2_Channel2_IRQHandler
|
||||||
|
.word DMA2_Channel3_IRQHandler
|
||||||
|
.word DMA2_Channel4_IRQHandler
|
||||||
|
.word DMA2_Channel5_IRQHandler
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word COMP_IRQHandler
|
||||||
|
.word LPTIM1_IRQHandler
|
||||||
|
.word LPTIM2_IRQHandler
|
||||||
|
.word USB_IRQHandler
|
||||||
|
.word DMA2_Channel6_IRQHandler
|
||||||
|
.word DMA2_Channel7_IRQHandler
|
||||||
|
.word LPUART1_IRQHandler
|
||||||
|
.word QUADSPI_IRQHandler
|
||||||
|
.word I2C3_EV_IRQHandler
|
||||||
|
.word I2C3_ER_IRQHandler
|
||||||
|
.word SAI1_IRQHandler
|
||||||
|
.word 0
|
||||||
|
.word SWPMI1_IRQHandler
|
||||||
|
.word TSC_IRQHandler
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word RNG_IRQHandler
|
||||||
|
.word FPU_IRQHandler
|
||||||
|
.word CRS_IRQHandler
|
||||||
|
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
*
|
||||||
|
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||||
|
* As they are weak aliases, any function with the same name will override
|
||||||
|
* this definition.
|
||||||
|
*
|
||||||
|
*******************************************************************************/
|
||||||
|
|
||||||
|
.weak NMI_Handler
|
||||||
|
.thumb_set NMI_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak HardFault_Handler
|
||||||
|
.thumb_set HardFault_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak MemManage_Handler
|
||||||
|
.thumb_set MemManage_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak BusFault_Handler
|
||||||
|
.thumb_set BusFault_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak UsageFault_Handler
|
||||||
|
.thumb_set UsageFault_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak SVC_Handler
|
||||||
|
.thumb_set SVC_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak DebugMon_Handler
|
||||||
|
.thumb_set DebugMon_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak PendSV_Handler
|
||||||
|
.thumb_set PendSV_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak SysTick_Handler
|
||||||
|
.thumb_set SysTick_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak WWDG_IRQHandler
|
||||||
|
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak PVD_PVM_IRQHandler
|
||||||
|
.thumb_set PVD_PVM_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TAMP_STAMP_IRQHandler
|
||||||
|
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak RTC_WKUP_IRQHandler
|
||||||
|
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak FLASH_IRQHandler
|
||||||
|
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak RCC_IRQHandler
|
||||||
|
.thumb_set RCC_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak EXTI0_IRQHandler
|
||||||
|
.thumb_set EXTI0_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak EXTI1_IRQHandler
|
||||||
|
.thumb_set EXTI1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak EXTI2_IRQHandler
|
||||||
|
.thumb_set EXTI2_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak EXTI3_IRQHandler
|
||||||
|
.thumb_set EXTI3_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak EXTI4_IRQHandler
|
||||||
|
.thumb_set EXTI4_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA1_Channel1_IRQHandler
|
||||||
|
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA1_Channel2_IRQHandler
|
||||||
|
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA1_Channel3_IRQHandler
|
||||||
|
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA1_Channel4_IRQHandler
|
||||||
|
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA1_Channel5_IRQHandler
|
||||||
|
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA1_Channel6_IRQHandler
|
||||||
|
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA1_Channel7_IRQHandler
|
||||||
|
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak ADC1_IRQHandler
|
||||||
|
.thumb_set ADC1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak CAN1_TX_IRQHandler
|
||||||
|
.thumb_set CAN1_TX_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak CAN1_RX0_IRQHandler
|
||||||
|
.thumb_set CAN1_RX0_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak CAN1_RX1_IRQHandler
|
||||||
|
.thumb_set CAN1_RX1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak CAN1_SCE_IRQHandler
|
||||||
|
.thumb_set CAN1_SCE_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak EXTI9_5_IRQHandler
|
||||||
|
.thumb_set EXTI9_5_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM1_BRK_TIM15_IRQHandler
|
||||||
|
.thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM1_UP_TIM16_IRQHandler
|
||||||
|
.thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM1_TRG_COM_IRQHandler
|
||||||
|
.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM1_CC_IRQHandler
|
||||||
|
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM2_IRQHandler
|
||||||
|
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak I2C1_EV_IRQHandler
|
||||||
|
.thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak I2C1_ER_IRQHandler
|
||||||
|
.thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak SPI1_IRQHandler
|
||||||
|
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak USART1_IRQHandler
|
||||||
|
.thumb_set USART1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak USART2_IRQHandler
|
||||||
|
.thumb_set USART2_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak EXTI15_10_IRQHandler
|
||||||
|
.thumb_set EXTI15_10_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak RTC_Alarm_IRQHandler
|
||||||
|
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak SPI3_IRQHandler
|
||||||
|
.thumb_set SPI3_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM6_DAC_IRQHandler
|
||||||
|
.thumb_set TIM6_DAC_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM7_IRQHandler
|
||||||
|
.thumb_set TIM7_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA2_Channel1_IRQHandler
|
||||||
|
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA2_Channel2_IRQHandler
|
||||||
|
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA2_Channel3_IRQHandler
|
||||||
|
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA2_Channel4_IRQHandler
|
||||||
|
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA2_Channel5_IRQHandler
|
||||||
|
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak COMP_IRQHandler
|
||||||
|
.thumb_set COMP_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak LPTIM1_IRQHandler
|
||||||
|
.thumb_set LPTIM1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak LPTIM2_IRQHandler
|
||||||
|
.thumb_set LPTIM2_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak USB_IRQHandler
|
||||||
|
.thumb_set USB_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA2_Channel6_IRQHandler
|
||||||
|
.thumb_set DMA2_Channel6_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA2_Channel7_IRQHandler
|
||||||
|
.thumb_set DMA2_Channel7_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak LPUART1_IRQHandler
|
||||||
|
.thumb_set LPUART1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak QUADSPI_IRQHandler
|
||||||
|
.thumb_set QUADSPI_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak I2C3_EV_IRQHandler
|
||||||
|
.thumb_set I2C3_EV_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak I2C3_ER_IRQHandler
|
||||||
|
.thumb_set I2C3_ER_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak SAI1_IRQHandler
|
||||||
|
.thumb_set SAI1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak SWPMI1_IRQHandler
|
||||||
|
.thumb_set SWPMI1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TSC_IRQHandler
|
||||||
|
.thumb_set TSC_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak RNG_IRQHandler
|
||||||
|
.thumb_set RNG_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak FPU_IRQHandler
|
||||||
|
.thumb_set FPU_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak CRS_IRQHandler
|
||||||
|
.thumb_set CRS_IRQHandler,Default_Handler
|
||||||
|
|
||||||
9
Makefile
9
Makefile
@@ -5,9 +5,12 @@ BUILD_DIR := build
|
|||||||
BUILD_TYPE ?= Debug
|
BUILD_TYPE ?= Debug
|
||||||
TOOLCHAIN := gcc-arm-none-eabi.cmake
|
TOOLCHAIN := gcc-arm-none-eabi.cmake
|
||||||
|
|
||||||
|
CFLAGS_DEBUG ?= -g3 -O0
|
||||||
|
CXXFLAGS_DEBUG ?= -g3 -O0
|
||||||
|
|
||||||
# MCU target (override on command line: make build MCU_MODEL=STM32F051x8)
|
# MCU target (override on command line: make build MCU_MODEL=STM32F051x8)
|
||||||
MCU_MODEL ?= STM32F072xB
|
MCU_MODEL ?= STM32L432xx
|
||||||
MCU_FAMILY ?= STM32F0xx
|
MCU_FAMILY ?= STM32L4xx
|
||||||
|
|
||||||
# --- Default target ---
|
# --- Default target ---
|
||||||
all: build
|
all: build
|
||||||
@@ -20,6 +23,8 @@ ${BUILD_DIR}/build.ninja:
|
|||||||
-DCMAKE_BUILD_TYPE=${BUILD_TYPE} \
|
-DCMAKE_BUILD_TYPE=${BUILD_TYPE} \
|
||||||
-DCMAKE_TOOLCHAIN_FILE=${TOOLCHAIN} \
|
-DCMAKE_TOOLCHAIN_FILE=${TOOLCHAIN} \
|
||||||
-DCMAKE_EXPORT_COMPILE_COMMANDS=ON \
|
-DCMAKE_EXPORT_COMPILE_COMMANDS=ON \
|
||||||
|
-DCMAKE_C_FLAGS_DEBUG="${CFLAGS_DEBUG}" \
|
||||||
|
-DCMAKE_CXX_FLAGS_DEBUG="${CXXFLAGS_DEBUG}" \
|
||||||
-DMCU_MODEL=$(MCU_MODEL) \
|
-DMCU_MODEL=$(MCU_MODEL) \
|
||||||
-DMCU_FAMILY=$(MCU_FAMILY)
|
-DMCU_FAMILY=$(MCU_FAMILY)
|
||||||
|
|
||||||
|
|||||||
@@ -10,23 +10,120 @@
|
|||||||
#define SHMINGO_HAL_SHAL_CORE_H
|
#define SHMINGO_HAL_SHAL_CORE_H
|
||||||
|
|
||||||
#include <cstdint>
|
#include <cstdint>
|
||||||
|
#include <cstddef>
|
||||||
|
|
||||||
|
//Overall init function for SHAL --------------------------
|
||||||
|
|
||||||
|
void SHAL_init();
|
||||||
|
|
||||||
|
//---------------------------------------------------------
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
//Universal structs and defines ---------------------------
|
//Universal structs and defines ---------------------------
|
||||||
|
|
||||||
struct SHAL_Peripheral {
|
enum class SHAL_Result{
|
||||||
void* registers;
|
OKAY,
|
||||||
unsigned long global_offset;
|
ERROR
|
||||||
};
|
};
|
||||||
|
|
||||||
struct SHAL_Peripheral_Register {
|
|
||||||
volatile uint32_t* reg;
|
|
||||||
unsigned long offset;
|
|
||||||
};
|
|
||||||
|
|
||||||
struct SHAL_EXTIO_Register{
|
#define SHAL_CALL(func) \
|
||||||
volatile uint32_t* EXT_ICR;
|
if(func != SHAL_Result::OKAY){ \
|
||||||
unsigned long mask;
|
return SHAL_Result::ERROR; \
|
||||||
};
|
}
|
||||||
|
|
||||||
|
#define SHAL_WAIT_FOR_CONDITION_US(cond, timeout_us) \
|
||||||
|
SHAL_wait_for_condition_us([&](){ return (cond); }, (timeout_us))
|
||||||
|
|
||||||
|
#define SHAL_WAIT_FOR_CONDITION_MS(cond, timeout_ms) \
|
||||||
|
SHAL_wait_for_condition_ms([&](){ return (cond); }, (timeout_ms))
|
||||||
|
|
||||||
|
|
||||||
|
//Currently configures systick to count down in microseconds
|
||||||
|
void systick_init();
|
||||||
|
|
||||||
|
//Max of 16ms, use SHAL_delay_ms for longer delay
|
||||||
|
void SHAL_delay_us(uint32_t us);
|
||||||
|
|
||||||
|
void SHAL_delay_ms(uint32_t ms);
|
||||||
|
|
||||||
|
template<typename Condition>
|
||||||
|
bool SHAL_wait_for_condition_us(Condition cond, uint32_t timeout_us) {
|
||||||
|
while (timeout_us--) {
|
||||||
|
if (cond()) {
|
||||||
|
return true; // success
|
||||||
|
}
|
||||||
|
SHAL_delay_us(1);
|
||||||
|
}
|
||||||
|
return false; // timeout
|
||||||
|
}
|
||||||
|
|
||||||
|
template<typename Condition>
|
||||||
|
bool SHAL_wait_for_condition_ms(Condition cond, uint32_t timeout_ms) {
|
||||||
|
while (timeout_ms--) {
|
||||||
|
if (cond()) {
|
||||||
|
return true; // success
|
||||||
|
}
|
||||||
|
SHAL_delay_ms(1);
|
||||||
|
}
|
||||||
|
return false; // timeout
|
||||||
|
}
|
||||||
|
|
||||||
|
#define SHAL_set_bits(reg, size, bits, offset) \
|
||||||
|
do { \
|
||||||
|
if ((reg) != NULL) { \
|
||||||
|
uint32_t _mask = ((1U << (size)) - 1U); \
|
||||||
|
*(reg) &= ~((uint32_t)(_mask) << (offset)); \
|
||||||
|
*(reg) |= ((uint32_t)(bits) << (offset)); \
|
||||||
|
} \
|
||||||
|
} while (0)
|
||||||
|
|
||||||
|
#define SHAL_flip_bits(reg, size, offset) \
|
||||||
|
do { \
|
||||||
|
if ((reg) != NULL) { \
|
||||||
|
uint32_t _mask = ((1U << (size)) - 1U); \
|
||||||
|
*(reg) ^= (_mask << (offset)); \
|
||||||
|
} \
|
||||||
|
} while (0)
|
||||||
|
|
||||||
|
#define SHAL_set_bits_16(reg, size, bits, offset) \
|
||||||
|
do { \
|
||||||
|
if ((reg) != NULL) { \
|
||||||
|
uint16_t _mask = (uint16_t)((1U << (size)) - 1U); \
|
||||||
|
*(reg) &= (uint16_t)~((uint16_t)(_mask) << (offset)); \
|
||||||
|
*(reg) |= (uint16_t)((uint16_t)(bits) << (offset)); \
|
||||||
|
} \
|
||||||
|
} while (0)
|
||||||
|
|
||||||
|
#define SHAL_clear_bitmask(reg, mask) \
|
||||||
|
do { \
|
||||||
|
*(reg) &= ~(mask); \
|
||||||
|
} while (0)
|
||||||
|
|
||||||
|
#define SHAL_apply_bitmask(reg, mask) \
|
||||||
|
do { \
|
||||||
|
SHAL_clear_bitmask((reg), (mask)); \
|
||||||
|
*(reg) |= (mask); \
|
||||||
|
} while (0)
|
||||||
|
|
||||||
|
#define SHAL_set_register_value(reg, value) \
|
||||||
|
do { \
|
||||||
|
if ((reg) != NULL) { \
|
||||||
|
*(reg) = (uint32_t)(value); \
|
||||||
|
} \
|
||||||
|
} while (0)
|
||||||
|
|
||||||
|
#define SHAL_set_register_value_16(reg, value) \
|
||||||
|
do { \
|
||||||
|
if ((reg) != NULL) { \
|
||||||
|
*(reg) = (uint16_t)(value); \
|
||||||
|
} \
|
||||||
|
} while (0)
|
||||||
|
|
||||||
|
|
||||||
|
void SHAL_print_register(const volatile uint32_t* reg);
|
||||||
|
|
||||||
//---------------------------------------------------------
|
//---------------------------------------------------------
|
||||||
|
|
||||||
@@ -55,17 +152,65 @@ struct SHAL_EXTIO_Register{
|
|||||||
#include "stm32f071xb.h"
|
#include "stm32f071xb.h"
|
||||||
#elif defined(STM32F072xB)
|
#elif defined(STM32F072xB)
|
||||||
#include "stm32f072xb.h"
|
#include "stm32f072xb.h"
|
||||||
#include "SHAL_TIM_REG_F072xB.h"
|
|
||||||
#elif defined(STM32F078xx)
|
#elif defined(STM32F078xx)
|
||||||
#include "stm32f078xx.h"
|
#include "stm32f078xx.h"
|
||||||
#elif defined(STM32F091xC)
|
#elif defined(STM32F091xC)
|
||||||
#include "stm32f091xc.h"
|
#include "stm32f091xc.h"
|
||||||
#elif defined(STM32F098xx)
|
#elif defined(STM32F098xx)
|
||||||
#include "stm32f098xx.h"
|
#include "stm32f098xx.h"
|
||||||
|
#elif defined(STM32L412xx)
|
||||||
|
#include "stm32l412xx.h"
|
||||||
|
#elif defined(STM32L422xx)
|
||||||
|
#include "stm32l422xx.h"
|
||||||
|
#elif defined(STM32L431xx)
|
||||||
|
#include "stm32l431xx.h"
|
||||||
|
#elif defined(STM32L432xx)
|
||||||
|
#include "stm32l432xx.h"
|
||||||
|
#elif defined(STM32L433xx)
|
||||||
|
#include "stm32l433xx.h"
|
||||||
|
#elif defined(STM32L442xx)
|
||||||
|
#include "stm32l442xx.h"
|
||||||
|
#elif defined(STM32L443xx)
|
||||||
|
#include "stm32l443xx.h"
|
||||||
|
#elif defined(STM32L451xx)
|
||||||
|
#include "stm32l451xx.h"
|
||||||
|
#elif defined(STM32L452xx)
|
||||||
|
#include "stm32l452xx.h"
|
||||||
|
#elif defined(STM32L462xx)
|
||||||
|
#include "stm32l462xx.h"
|
||||||
|
#elif defined(STM32L471xx)
|
||||||
|
#include "stm32l471xx.h"
|
||||||
|
#elif defined(STM32L475xx)
|
||||||
|
#include "stm32l475xx.h"
|
||||||
|
#elif defined(STM32L476xx)
|
||||||
|
#include "stm32l476xx.h"
|
||||||
|
#elif defined(STM32L485xx)
|
||||||
|
#include "stm32l485xx.h"
|
||||||
|
#elif defined(STM32L486xx)
|
||||||
|
#include "stm32l486xx.h"
|
||||||
|
#elif defined(STM32L496xx)
|
||||||
|
#include "stm32l496xx.h"
|
||||||
|
#elif defined(STM32L4A6xx)
|
||||||
|
#include "stm32l4a6xx.h"
|
||||||
|
#elif defined(STM32L4P5xx)
|
||||||
|
#include "stm32l4p5xx.h"
|
||||||
|
#elif defined(STM32L4Q5xx)
|
||||||
|
#include "stm32l4q5xx.h"
|
||||||
|
#elif defined(STM32L4R5xx)
|
||||||
|
#include "stm32l4r5xx.h"
|
||||||
|
#elif defined(STM32L4R7xx)
|
||||||
|
#include "stm32l4r7xx.h"
|
||||||
|
#elif defined(STM32L4R9xx)
|
||||||
|
#include "stm32l4r9xx.h"
|
||||||
|
#elif defined(STM32L4S5xx)
|
||||||
|
#include "stm32l4s5xx.h"
|
||||||
|
#elif defined(STM32L4S7xx)
|
||||||
|
#include "stm32l4s7xx.h"
|
||||||
|
#elif defined(STM32L4S9xx)
|
||||||
#elif defined(STM32F030xC)
|
#elif defined(STM32F030xC)
|
||||||
#include "stm32f030xc.h"
|
#include "stm32f030xc.h"
|
||||||
#else
|
#else
|
||||||
#error "Please select first the target STM32F0xx device used in your application (in stm32f0xx.h file)"
|
#error "Please select first the target STM32 device used in your application (in stm32f0xx.h file)"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
31
SHAL/Include/Peripheral/ADC/Reg/SHAL_ADC_REG_F072xB.h
Normal file
31
SHAL/Include/Peripheral/ADC/Reg/SHAL_ADC_REG_F072xB.h
Normal file
@@ -0,0 +1,31 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 9/21/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#ifndef SHMINGO_HAL_SHAL_ADC_REG_F072XB_H
|
||||||
|
#define SHMINGO_HAL_SHAL_ADC_REG_F072XB_H
|
||||||
|
|
||||||
|
#include "SHAL_CORE.h"
|
||||||
|
#include "SHAL_ADC_TYPES.h"
|
||||||
|
|
||||||
|
#define SHAL_ADC1 SHAL_ADC(1)
|
||||||
|
|
||||||
|
enum class ADC_Key : uint8_t{
|
||||||
|
S_ADC1,
|
||||||
|
NUM_ADC,
|
||||||
|
INVALID
|
||||||
|
};
|
||||||
|
|
||||||
|
constexpr ADC_TypeDef* getADCRegister(ADC_Key key){
|
||||||
|
switch(key){
|
||||||
|
case ADC_Key::S_ADC1:
|
||||||
|
return ADC1;
|
||||||
|
|
||||||
|
case ADC_Key::NUM_ADC:
|
||||||
|
case ADC_Key::INVALID:
|
||||||
|
return nullptr;
|
||||||
|
}
|
||||||
|
__builtin_unreachable();
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif //SHMINGO_HAL_SHAL_ADC_REG_F072XB_H
|
||||||
171
SHAL/Include/Peripheral/ADC/Reg/SHAL_ADC_REG_L432KC.h
Normal file
171
SHAL/Include/Peripheral/ADC/Reg/SHAL_ADC_REG_L432KC.h
Normal file
@@ -0,0 +1,171 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 10/8/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#ifndef SHMINGO_HAL_SHAL_ADC_REG_L432KC_H
|
||||||
|
#define SHMINGO_HAL_SHAL_ADC_REG_L432KC_H
|
||||||
|
|
||||||
|
#include "SHAL_CORE.h"
|
||||||
|
#include "SHAL_ADC_TYPES.h"
|
||||||
|
|
||||||
|
#define SHAL_ADC1 SHAL_ADC(1)
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
#define NUM_ADCS 1
|
||||||
|
#define NUM_ADC_CHANNELS 16
|
||||||
|
|
||||||
|
enum class SHAL_ADC_Channel : uint32_t {
|
||||||
|
CH0 = 0,
|
||||||
|
CH1,
|
||||||
|
CH2,
|
||||||
|
CH3,
|
||||||
|
CH4,
|
||||||
|
CH5,
|
||||||
|
CH6,
|
||||||
|
CH7,
|
||||||
|
CH8,
|
||||||
|
CH9,
|
||||||
|
CH10,
|
||||||
|
CH11,
|
||||||
|
CH12,
|
||||||
|
CH13,
|
||||||
|
CH14,
|
||||||
|
CH15,
|
||||||
|
CH16,
|
||||||
|
CHTemp,
|
||||||
|
CHRef,
|
||||||
|
CHBat,
|
||||||
|
NO_ADC_MAPPING
|
||||||
|
};
|
||||||
|
|
||||||
|
enum class ADC_Key : uint8_t{
|
||||||
|
S_ADC1 = 0,
|
||||||
|
NUM_ADC = 1,
|
||||||
|
INVALID = 255
|
||||||
|
};
|
||||||
|
|
||||||
|
enum class ADC_Clock_Source : uint32_t {
|
||||||
|
SHAL_NO_CLOCK = 0x00,
|
||||||
|
SHAL_PLLSAI1 = 0x01,
|
||||||
|
SHAL_PLLSYS = 0x02,
|
||||||
|
SHAL_SYSCLK = 0x03,
|
||||||
|
};
|
||||||
|
|
||||||
|
static volatile ADC_TypeDef* ADC_TABLE[1] = { //Lookup table for ADCs
|
||||||
|
ADC1,
|
||||||
|
};
|
||||||
|
|
||||||
|
static inline SHAL_ADC_Common_Control_Reg getADCCommonControl() {
|
||||||
|
return {&ADC1_COMMON->CCR ,ADC_CCR_VREFEN,ADC_CCR_TSEN,ADC_CCR_VBATEN};
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_ADC_RCC_Enable_Reg getADCRCCEnableRegister(ADC_Key key){
|
||||||
|
SHAL_ADC_RCC_Enable_Reg res = {&RCC->AHB2ENR, RCC_AHB2ENR_ADCEN};
|
||||||
|
|
||||||
|
return res;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_ADC_Control_Reg getADCControlReg(ADC_Key key) {
|
||||||
|
|
||||||
|
SHAL_ADC_Control_Reg res = {nullptr, ADC_CR_ADEN,
|
||||||
|
ADC_CR_ADSTP,
|
||||||
|
ADC_CR_ADDIS,
|
||||||
|
ADC_CR_ADCAL,
|
||||||
|
ADC_CR_ADSTART,
|
||||||
|
ADC_CR_DEEPPWD,
|
||||||
|
ADC_CR_ADVREGEN,
|
||||||
|
ADC_CR_ADCALDIF};
|
||||||
|
|
||||||
|
res.reg = &(ADC_TABLE[static_cast<uint8_t>(key)]->CR);
|
||||||
|
return res;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_ADC_Config_Reg getADCConfigReg(ADC_Key key) {
|
||||||
|
|
||||||
|
SHAL_ADC_Config_Reg res = {nullptr, ADC_CFGR_CONT, ADC_CFGR_RES_Pos, ADC_CFGR_ALIGN_Pos, ADC_CFGR_CONT_Msk};
|
||||||
|
|
||||||
|
res.reg = &(ADC_TABLE[static_cast<uint8_t>(key)]->CFGR);
|
||||||
|
return res;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_ADC_ISR_Reg getADCISRReg(ADC_Key key){
|
||||||
|
SHAL_ADC_ISR_Reg res = {nullptr, ADC_ISR_EOC, ADC_ISR_EOS, ADC_ISR_ADRDY, ADC_ISR_OVR};
|
||||||
|
|
||||||
|
res.reg = &(ADC_TABLE[static_cast<uint8_t>(key)]->ISR);
|
||||||
|
return res;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_ADC_Data_Reg getADCDataReg(ADC_Key key){
|
||||||
|
SHAL_ADC_Data_Reg res = {nullptr, 0xFFFF};
|
||||||
|
|
||||||
|
res.reg = &(ADC_TABLE[static_cast<uint8_t>(key)]->DR);
|
||||||
|
return res;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_ADC_Clock_Reg getADCClockSelectRegister() {
|
||||||
|
SHAL_ADC_Clock_Reg res = {&RCC->CCIPR, RCC_CCIPR_ADCSEL_Pos}; //Position
|
||||||
|
|
||||||
|
return res;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_ADC_Channel_Sampling_Time_Reg getADCChannelSamplingTimeRegister(ADC_Key key, SHAL_ADC_Channel channel){
|
||||||
|
volatile ADC_TypeDef* ADCReg = ADC_TABLE[static_cast<uint8_t>(key)];
|
||||||
|
|
||||||
|
volatile uint32_t* SMPReg = nullptr;
|
||||||
|
uint32_t pos;
|
||||||
|
|
||||||
|
auto channelNum = static_cast<uint8_t>(channel);
|
||||||
|
|
||||||
|
if (channelNum <= 9) {
|
||||||
|
SMPReg = &ADCReg->SMPR1;
|
||||||
|
pos = (channelNum * 3);
|
||||||
|
} else {
|
||||||
|
SMPReg = &ADCReg->SMPR2;
|
||||||
|
pos = ((channelNum - 10) * 3);
|
||||||
|
}
|
||||||
|
|
||||||
|
return {SMPReg, pos};
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_ADC_Sequence_Amount_Reg getADCSequenceAmountRegister(ADC_Key key){
|
||||||
|
SHAL_ADC_Sequence_Amount_Reg res = {nullptr, ADC_SQR1_L_Pos};
|
||||||
|
|
||||||
|
res.reg = &(ADC_TABLE[static_cast<uint8_t>(key)]->SQR1);
|
||||||
|
return res;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_ADC_Sequence_Reg getADCSequenceRegisters(ADC_Key key){
|
||||||
|
|
||||||
|
volatile ADC_TypeDef* adc_reg = ADC_TABLE[static_cast<uint8_t>(key)];
|
||||||
|
|
||||||
|
|
||||||
|
SHAL_ADC_Sequence_Reg res = {{&adc_reg->SQR1,
|
||||||
|
&adc_reg->SQR2,
|
||||||
|
&adc_reg->SQR3,
|
||||||
|
&adc_reg->SQR4,
|
||||||
|
nullptr,
|
||||||
|
nullptr},
|
||||||
|
{0,
|
||||||
|
6,
|
||||||
|
12,
|
||||||
|
18,
|
||||||
|
24}
|
||||||
|
};
|
||||||
|
|
||||||
|
return res;
|
||||||
|
}
|
||||||
|
|
||||||
|
constexpr ADC_TypeDef* getADCRegister(ADC_Key key){
|
||||||
|
switch(key){
|
||||||
|
case ADC_Key::S_ADC1:
|
||||||
|
return ADC1;
|
||||||
|
|
||||||
|
case ADC_Key::NUM_ADC:
|
||||||
|
case ADC_Key::INVALID:
|
||||||
|
return nullptr;
|
||||||
|
}
|
||||||
|
__builtin_unreachable();
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif //SHMINGO_HAL_SHAL_ADC_REG_L432KC_H
|
||||||
95
SHAL/Include/Peripheral/ADC/SHAL_ADC.h
Normal file
95
SHAL/Include/Peripheral/ADC/SHAL_ADC.h
Normal file
@@ -0,0 +1,95 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 9/21/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#ifndef SHMINGO_HAL_SHAL_ADC_H
|
||||||
|
#define SHMINGO_HAL_SHAL_ADC_H
|
||||||
|
|
||||||
|
#include <cstdint>
|
||||||
|
|
||||||
|
#include "SHAL_CORE.h"
|
||||||
|
#include "SHAL_ADC_REG.h"
|
||||||
|
|
||||||
|
class SHAL_ADC {
|
||||||
|
|
||||||
|
friend class ADCManager;
|
||||||
|
|
||||||
|
public:
|
||||||
|
|
||||||
|
SHAL_Result init(ADC_Key key);
|
||||||
|
|
||||||
|
SHAL_Result calibrate();
|
||||||
|
|
||||||
|
SHAL_Result configureResolution(SHAL_ADC_Resolution resolution);
|
||||||
|
|
||||||
|
SHAL_Result configureAlignment(SHAL_ADC_Alignment alignment);
|
||||||
|
|
||||||
|
/// Performs analog to digital conversion on a single channel, one time
|
||||||
|
/// \param channel Channel to be converted
|
||||||
|
/// \param time SHAL_ADC_SampleTime - amount of clock cycles per conversion
|
||||||
|
/// \return resulting value
|
||||||
|
uint16_t singleConvertSingle(SHAL_ADC_Channel channel, SHAL_ADC_SampleTime time = SHAL_ADC_SampleTime::C8);
|
||||||
|
|
||||||
|
/// Performs analog to digital conversion on multiple channels, one time
|
||||||
|
/// \param channels Pointer to an array of channels to convert
|
||||||
|
/// \param numChannels Number of channels to convert
|
||||||
|
/// \param result Pointer to store converted channel results in
|
||||||
|
/// \param time SHAL_ADC_SampleTime - amount of clock cycles per conversion
|
||||||
|
SHAL_Result multiConvertSingle(SHAL_ADC_Channel* channels, int numChannels, uint16_t* result, SHAL_ADC_SampleTime time = SHAL_ADC_SampleTime::C8);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
private:
|
||||||
|
|
||||||
|
SHAL_ADC() = default;
|
||||||
|
|
||||||
|
ADC_Key m_ADCKey = ADC_Key::INVALID;
|
||||||
|
|
||||||
|
//Checks to see if instance is initialized with a proper ADC peripheral tag
|
||||||
|
bool isValid();
|
||||||
|
|
||||||
|
//Enabled peripheral
|
||||||
|
SHAL_Result enable();
|
||||||
|
|
||||||
|
//Disables peripheral
|
||||||
|
SHAL_Result disable();
|
||||||
|
|
||||||
|
//Wake up ADC from initial deep sleep state
|
||||||
|
SHAL_Result wakeFromDeepSleep();
|
||||||
|
|
||||||
|
SHAL_Result startConversion();
|
||||||
|
|
||||||
|
/// Adds an ADC channel to the conversion sequence
|
||||||
|
/// \param channel Channel to add
|
||||||
|
/// \param index Index to add channel to (ADC channel will be the nth channel to convert
|
||||||
|
/// \return Result
|
||||||
|
SHAL_Result addADCChannelToSequence(SHAL_ADC_Channel channel, uint32_t index);
|
||||||
|
|
||||||
|
/// Sets the amount of ADC channels to convert
|
||||||
|
/// \param amount Number of channels to convert
|
||||||
|
/// \return
|
||||||
|
SHAL_Result setADCSequenceAmount(uint32_t amount);
|
||||||
|
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
|
#define SHAL_ADC(x) ADCManager::getByIndex(x-1)
|
||||||
|
|
||||||
|
class ADCManager{
|
||||||
|
|
||||||
|
public:
|
||||||
|
|
||||||
|
static SHAL_ADC& get(ADC_Key key);
|
||||||
|
|
||||||
|
static SHAL_ADC& getByIndex(int index);
|
||||||
|
|
||||||
|
|
||||||
|
ADCManager() = delete;
|
||||||
|
|
||||||
|
private:
|
||||||
|
|
||||||
|
inline static SHAL_ADC m_ADCs[static_cast<uint8_t>(ADC_Key::NUM_ADC)] = {};
|
||||||
|
|
||||||
|
};
|
||||||
|
|
||||||
|
#endif //SHMINGO_HAL_SHAL_ADC_H
|
||||||
95
SHAL/Include/Peripheral/ADC/SHAL_ADC_REG.h
Normal file
95
SHAL/Include/Peripheral/ADC/SHAL_ADC_REG.h
Normal file
@@ -0,0 +1,95 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 9/21/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#ifndef SHMINGO_HAL_SHAL_ADC_REG_H
|
||||||
|
#define SHMINGO_HAL_SHAL_ADC_REG_H
|
||||||
|
|
||||||
|
#if defined(STM32F030x6)
|
||||||
|
#include "stm32f030x6.h"
|
||||||
|
#elif defined(STM32F030x8)
|
||||||
|
#include "stm32f030x8.h"
|
||||||
|
#elif defined(STM32F031x6)
|
||||||
|
#include "stm32f031x6.h"
|
||||||
|
#elif defined(STM32F038xx)
|
||||||
|
#include "stm32f038xx.h"
|
||||||
|
#elif defined(STM32F042x6)
|
||||||
|
#include "stm32f042x6.h"
|
||||||
|
#elif defined(STM32F048xx)
|
||||||
|
#include "stm32f048xx.h"
|
||||||
|
#elif defined(STM32F051x8)
|
||||||
|
#include "stm32f051x8.h"
|
||||||
|
#elif defined(STM32F058xx)
|
||||||
|
#include "stm32f058xx.h"
|
||||||
|
#elif defined(STM32F070x6)
|
||||||
|
#include "stm32f070x6.h"
|
||||||
|
#elif defined(STM32F070xB)
|
||||||
|
#include "stm32f070xb.h"
|
||||||
|
#elif defined(STM32F071xB)
|
||||||
|
#include "stm32f071xb.h"
|
||||||
|
#elif defined(STM32F072xB)
|
||||||
|
#include "SHAL_ADC_REG_F072xB.h"
|
||||||
|
#elif defined(STM32F078xx)
|
||||||
|
#include "stm32f078xx.h"
|
||||||
|
#elif defined(STM32F091xC)
|
||||||
|
#include "stm32f091xc.h"
|
||||||
|
#elif defined(STM32F098xx)
|
||||||
|
#include "stm32f098xx.h"
|
||||||
|
#elif defined(STM32F030xC)
|
||||||
|
#include "stm32f030xc.h"
|
||||||
|
#elif defined(STM32F030xC)
|
||||||
|
#include "stm32f030xc.h"
|
||||||
|
#elif defined(STM32L412xx)
|
||||||
|
#include "stm32l412xx.h"
|
||||||
|
#elif defined(STM32L422xx)
|
||||||
|
#include "stm32l422xx.h"
|
||||||
|
#elif defined(STM32L431xx)
|
||||||
|
#include "stm32l431xx.h"
|
||||||
|
#elif defined(STM32L432xx)
|
||||||
|
#include "SHAL_ADC_REG_L432KC.h"
|
||||||
|
#elif defined(STM32L433xx)
|
||||||
|
#include "stm32l433xx.h"
|
||||||
|
#elif defined(STM32L442xx)
|
||||||
|
#include "stm32l442xx.h"
|
||||||
|
#elif defined(STM32L443xx)
|
||||||
|
#include "stm32l443xx.h"
|
||||||
|
#elif defined(STM32L451xx)
|
||||||
|
#include "stm32l451xx.h"
|
||||||
|
#elif defined(STM32L452xx)
|
||||||
|
#include "stm32l452xx.h"
|
||||||
|
#elif defined(STM32L462xx)
|
||||||
|
#include "stm32l462xx.h"
|
||||||
|
#elif defined(STM32L471xx)
|
||||||
|
#include "stm32l471xx.h"
|
||||||
|
#elif defined(STM32L475xx)
|
||||||
|
#include "stm32l475xx.h"
|
||||||
|
#elif defined(STM32L476xx)
|
||||||
|
#include "stm32l476xx.h"
|
||||||
|
#elif defined(STM32L485xx)
|
||||||
|
#include "stm32l485xx.h"
|
||||||
|
#elif defined(STM32L486xx)
|
||||||
|
#include "stm32l486xx.h"
|
||||||
|
#elif defined(STM32L496xx)
|
||||||
|
#include "stm32l496xx.h"
|
||||||
|
#elif defined(STM32L4A6xx)
|
||||||
|
#include "stm32l4a6xx.h"
|
||||||
|
#elif defined(STM32L4P5xx)
|
||||||
|
#include "stm32l4p5xx.h"
|
||||||
|
#elif defined(STM32L4Q5xx)
|
||||||
|
#include "stm32l4q5xx.h"
|
||||||
|
#elif defined(STM32L4R5xx)
|
||||||
|
#include "stm32l4r5xx.h"
|
||||||
|
#elif defined(STM32L4R7xx)
|
||||||
|
#include "stm32l4r7xx.h"
|
||||||
|
#elif defined(STM32L4R9xx)
|
||||||
|
#include "stm32l4r9xx.h"
|
||||||
|
#elif defined(STM32L4S5xx)
|
||||||
|
#include "stm32l4s5xx.h"
|
||||||
|
#elif defined(STM32L4S7xx)
|
||||||
|
#include "stm32l4s7xx.h"
|
||||||
|
#elif defined(STM32L4S9xx)
|
||||||
|
#else
|
||||||
|
#error "Please select first the target STM32F0xx device used in your application (in stm32f0xx.h file)"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif //SHMINGO_HAL_SHAL_ADC_REG_H
|
||||||
113
SHAL/Include/Peripheral/ADC/SHAL_ADC_TYPES.h
Normal file
113
SHAL/Include/Peripheral/ADC/SHAL_ADC_TYPES.h
Normal file
@@ -0,0 +1,113 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 9/21/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#ifndef SHMINGO_HAL_SHAL_ADC_TYPES_H
|
||||||
|
#define SHMINGO_HAL_SHAL_ADC_TYPES_H
|
||||||
|
|
||||||
|
//Common register among all ADC peripherals
|
||||||
|
struct SHAL_ADC_Common_Control_Reg {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t VoltageRefEnable;
|
||||||
|
uint32_t TempSensorEnable;
|
||||||
|
uint32_t VBatteryEnable;
|
||||||
|
};
|
||||||
|
|
||||||
|
//Register controlling the ADC peripheral clock
|
||||||
|
struct SHAL_ADC_RCC_Enable_Reg {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t mask;
|
||||||
|
};
|
||||||
|
|
||||||
|
//Register with ADC controls
|
||||||
|
struct SHAL_ADC_Control_Reg {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t enable_mask;
|
||||||
|
uint32_t stop_mask;
|
||||||
|
uint32_t disable_mask;
|
||||||
|
uint32_t calibration_mask;
|
||||||
|
uint32_t start_mask;
|
||||||
|
uint32_t deep_power_down_mask;
|
||||||
|
uint32_t voltage_regulator_mask;
|
||||||
|
uint32_t differential_mode_mask;
|
||||||
|
};
|
||||||
|
|
||||||
|
//Register controlling ADC configuration
|
||||||
|
struct SHAL_ADC_Config_Reg {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t continue_mask;
|
||||||
|
|
||||||
|
uint32_t resolution_offset;
|
||||||
|
uint32_t alignment_offset;
|
||||||
|
uint32_t continuous_mode_mask;
|
||||||
|
};
|
||||||
|
|
||||||
|
//Register for all ADC data
|
||||||
|
struct SHAL_ADC_Data_Reg {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t mask;
|
||||||
|
};
|
||||||
|
|
||||||
|
//Register for the interrupt service routine for ADCs
|
||||||
|
struct SHAL_ADC_ISR_Reg {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t end_of_conversion_mask;
|
||||||
|
uint32_t end_of_sequence_mask;
|
||||||
|
uint32_t ready_mask;
|
||||||
|
uint32_t overrun_mask;
|
||||||
|
};
|
||||||
|
|
||||||
|
//Register controlling the clock source for the ADC
|
||||||
|
struct SHAL_ADC_Clock_Reg {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t offset;
|
||||||
|
};
|
||||||
|
|
||||||
|
//Register controlling the sampling time of ADC samples
|
||||||
|
struct SHAL_ADC_Channel_Sampling_Time_Reg {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t channel_offset;
|
||||||
|
};
|
||||||
|
|
||||||
|
//Register controlling the number of conversions to do in one sequence
|
||||||
|
struct SHAL_ADC_Sequence_Amount_Reg {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t offset;
|
||||||
|
};
|
||||||
|
|
||||||
|
/*Register group controlling which ADC channels to convert. DO NOT USE THE FOLLOWING ILLEGAL COMBINATIONS:
|
||||||
|
*reg 1 + offset 1
|
||||||
|
*Any sections after the last one (for example, max for a 16 channel register is reg 4 offset 2*/
|
||||||
|
struct SHAL_ADC_Sequence_Reg {
|
||||||
|
volatile uint32_t* regs[6];
|
||||||
|
|
||||||
|
uint32_t offsets[5];
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
enum class SHAL_ADC_SampleTime : uint32_t {
|
||||||
|
C1 = 0x00, //1.5 cycles per sample (F0 only, timings change on other ADC architectures)
|
||||||
|
C2 = 0x01, //7.5 cycles
|
||||||
|
C3 = 0x02, //13.5 cycles
|
||||||
|
C4 = 0x03, //28.5 cycles
|
||||||
|
C5 = 0x04, //41.5 cycles
|
||||||
|
C6 = 0x05, //55.5 cycles
|
||||||
|
C7 = 0x06, //71.5 cycles
|
||||||
|
C8 = 0x07 //239.5 cycles
|
||||||
|
};
|
||||||
|
|
||||||
|
enum class SHAL_ADC_Resolution : uint8_t {
|
||||||
|
B12 = 0x00,
|
||||||
|
B10 = 0x01,
|
||||||
|
B8 = 0x02,
|
||||||
|
B6 = 0x03,
|
||||||
|
};
|
||||||
|
|
||||||
|
enum class SHAL_ADC_Alignment : uint8_t {
|
||||||
|
RIGHT = 0x00,
|
||||||
|
LEFT = 0x01,
|
||||||
|
};
|
||||||
|
|
||||||
|
#endif //SHMINGO_HAL_SHAL_ADC_TYPES_H
|
||||||
12
SHAL/Include/Peripheral/EXT/Reg/SHAL_EXTI_REG_F072xB.h
Normal file
12
SHAL/Include/Peripheral/EXT/Reg/SHAL_EXTI_REG_F072xB.h
Normal file
@@ -0,0 +1,12 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 10/8/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#ifndef SHMINGO_HAL_SHAL_EXTI_REG_F072XB_H
|
||||||
|
#define SHMINGO_HAL_SHAL_EXTI_REG_F072XB_H
|
||||||
|
|
||||||
|
#include "SHAL_CORE.h"
|
||||||
|
|
||||||
|
#define EXTI_PENDING_REG(line) (EXTI->PR)
|
||||||
|
|
||||||
|
#endif //SHMINGO_HAL_SHAL_EXTI_REG_F072XB_H
|
||||||
37
SHAL/Include/Peripheral/EXT/Reg/SHAL_EXTI_REG_L432KC.h
Normal file
37
SHAL/Include/Peripheral/EXT/Reg/SHAL_EXTI_REG_L432KC.h
Normal file
@@ -0,0 +1,37 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 10/8/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#ifndef SHMINGO_HAL_SHAL_EXTI_REG_L432KC_H
|
||||||
|
#define SHMINGO_HAL_SHAL_EXTI_REG_L432KC_H
|
||||||
|
|
||||||
|
#include "SHAL_CORE.h"
|
||||||
|
#include "SHAL_EXTI_TYPES.h"
|
||||||
|
|
||||||
|
#define EXTI_PENDING_REG(line) ((line) < 32 ? EXTI->PR1 : EXTI->PR2)
|
||||||
|
|
||||||
|
static inline SHAL_EXTI_Control_Register getEXTIControlRegister(uint32_t line){
|
||||||
|
uint8_t maskOffset = line % 4; //Each register has four 4-bit wide fields
|
||||||
|
uint8_t registerOffset = line / 4; //Composed of four registers with 4 fields each
|
||||||
|
|
||||||
|
SHAL_EXTI_Control_Register res = {&SYSCFG->EXTICR[registerOffset], maskOffset};
|
||||||
|
|
||||||
|
return res;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_EXTI_Interrupt_Mask_Register getEXTIInterruptMaskRegister(uint32_t line){
|
||||||
|
volatile uint32_t* reg = line < 32 ? &EXTI->IMR1 : &EXTI->IMR2;
|
||||||
|
return {reg};;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_EXTI_Rising_Trigger_Selection_Register getEXTIRisingTriggerSelectionRegister(uint32_t line){
|
||||||
|
volatile uint32_t* reg = line < 32 ? &EXTI->RTSR1 : &EXTI->RTSR2;
|
||||||
|
return {reg};
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_EXTI_Falling_Trigger_Selection_Register getEXTIFallingTriggerSelectionRegister(uint32_t line){
|
||||||
|
volatile uint32_t* reg = line < 32 ? &EXTI->FTSR1 : &EXTI->FTSR2;
|
||||||
|
return {reg};
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif //SHMINGO_HAL_SHAL_EXTI_REG_L432KC_H
|
||||||
42
SHAL/Include/Peripheral/EXT/SHAL_EXTI_CALLBACK.h
Normal file
42
SHAL/Include/Peripheral/EXT/SHAL_EXTI_CALLBACK.h
Normal file
@@ -0,0 +1,42 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file SHAL_TIM.h
|
||||||
|
* @author Luca Lizaranzu
|
||||||
|
* @brief Callbacks for external interrupts
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef SHAL_EXTI_CALLBACK_H
|
||||||
|
#define SHAL_EXTI_CALLBACK_H
|
||||||
|
|
||||||
|
#include "SHAL_CORE.h"
|
||||||
|
#include "SHAL_GPIO_REG.h"
|
||||||
|
#include "SHAL_EXTI_REG.h"
|
||||||
|
|
||||||
|
#define DEFINE_EXTI_IRQ(EXTI_Channel) \
|
||||||
|
extern "C" void EXTI##EXTI_Channel##_IRQHandler(void) { \
|
||||||
|
if (EXTI_PENDING_REG(EXTI_Channel) & (1 << EXTI_Channel)) { \
|
||||||
|
EXTI_PENDING_REG(EXTI_Channel) |= (1 << EXTI_Channel); /*clear flag */ \
|
||||||
|
auto cb = EXTI_callbacks[EXTI_Channel]; \
|
||||||
|
if (cb) cb(); \
|
||||||
|
}; \
|
||||||
|
};
|
||||||
|
|
||||||
|
#define DEFINE_MULTI_EXTI_IRQ(EXTI_Channel_Min, EXTI_Channel_Max) \
|
||||||
|
extern "C" void EXTI##EXTI_Channel_Min##_##EXTI_Channel_Max##_IRQHandler(void) { \
|
||||||
|
for(uint8_t line = EXTI_Channel_Min; line <= EXTI_Channel_Max; line++){ \
|
||||||
|
if (EXTI_PENDING_REG(EXTI_Channel_Max) & (1 << line)) { \
|
||||||
|
EXTI_PENDING_REG(EXTI_Channel_Max) |= (1 << line); /*clear flag */ \
|
||||||
|
auto cb = EXTI_callbacks[line]; \
|
||||||
|
if (cb) cb(); \
|
||||||
|
}; \
|
||||||
|
} \
|
||||||
|
};
|
||||||
|
|
||||||
|
typedef void (*EXTICallback)(); //Typedef for callback function
|
||||||
|
|
||||||
|
[[maybe_unused]] static EXTICallback EXTI_callbacks[NUM_EXTI_LINES] = {nullptr}; //Timer IRQ Callback table
|
||||||
|
|
||||||
|
void registerEXTICallback(GPIO_Key key, EXTICallback callback);
|
||||||
|
|
||||||
|
#endif //SHAL_EXTI_CALLBACK_H
|
||||||
100
SHAL/Include/Peripheral/EXT/SHAL_EXTI_REG.h
Normal file
100
SHAL/Include/Peripheral/EXT/SHAL_EXTI_REG.h
Normal file
@@ -0,0 +1,100 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 9/6/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#ifndef SHAL_EXTI_REG_H
|
||||||
|
#define SHAL_EXTI_REG_H
|
||||||
|
|
||||||
|
#if defined(STM32F030x6)
|
||||||
|
#include "stm32f030x6.h"
|
||||||
|
#elif defined(STM32F030x8)
|
||||||
|
#include "stm32f030x8.h"
|
||||||
|
#elif defined(STM32F031x6)
|
||||||
|
#include "stm32f031x6.h"
|
||||||
|
#elif defined(STM32F038xx)
|
||||||
|
#include "stm32f038xx.h"
|
||||||
|
#elif defined(STM32F042x6)
|
||||||
|
#include "stm32f042x6.h"
|
||||||
|
#elif defined(STM32F048xx)
|
||||||
|
#include "stm32f048xx.h"
|
||||||
|
#elif defined(STM32F051x8)
|
||||||
|
#include "stm32f051x8.h"
|
||||||
|
#elif defined(STM32F058xx)
|
||||||
|
#include "stm32f058xx.h"
|
||||||
|
#elif defined(STM32F070x6)
|
||||||
|
#include "stm32f070x6.h"
|
||||||
|
#elif defined(STM32F070xB)
|
||||||
|
#include "stm32f070xb.h"
|
||||||
|
#elif defined(STM32F071xB)
|
||||||
|
#include "stm32f071xb.h"
|
||||||
|
#elif defined(STM32F072xB)
|
||||||
|
#include "SHAL_EXTI_REG_F072xB.h"
|
||||||
|
#elif defined(STM32F078xx)
|
||||||
|
#include "stm32f078xx.h"
|
||||||
|
#elif defined(STM32F091xC)
|
||||||
|
#include "stm32f091xc.h"
|
||||||
|
#elif defined(STM32F098xx)
|
||||||
|
#include "stm32f098xx.h"
|
||||||
|
#elif defined(STM32F030xC)
|
||||||
|
#include "stm32f030xc.h"
|
||||||
|
#elif defined(STM32F030xC)
|
||||||
|
#include "stm32f030xc.h"
|
||||||
|
#elif defined(STM32L412xx)
|
||||||
|
#include "stm32l412xx.h"
|
||||||
|
#elif defined(STM32L422xx)
|
||||||
|
#include "stm32l422xx.h"
|
||||||
|
#elif defined(STM32L431xx)
|
||||||
|
#include "stm32l431xx.h"
|
||||||
|
#elif defined(STM32L432xx)
|
||||||
|
#include "SHAL_EXTI_REG_L432KC.h"
|
||||||
|
#elif defined(STM32L433xx)
|
||||||
|
#include "stm32l433xx.h"
|
||||||
|
#elif defined(STM32L442xx)
|
||||||
|
#include "stm32l442xx.h"
|
||||||
|
#elif defined(STM32L443xx)
|
||||||
|
#include "stm32l443xx.h"
|
||||||
|
#elif defined(STM32L451xx)
|
||||||
|
#include "stm32l451xx.h"
|
||||||
|
#elif defined(STM32L452xx)
|
||||||
|
#include "stm32l452xx.h"
|
||||||
|
#elif defined(STM32L462xx)
|
||||||
|
#include "stm32l462xx.h"
|
||||||
|
#elif defined(STM32L471xx)
|
||||||
|
#include "stm32l471xx.h"
|
||||||
|
#elif defined(STM32L475xx)
|
||||||
|
#include "stm32l475xx.h"
|
||||||
|
#elif defined(STM32L476xx)
|
||||||
|
#include "stm32l476xx.h"
|
||||||
|
#elif defined(STM32L485xx)
|
||||||
|
#include "stm32l485xx.h"
|
||||||
|
#elif defined(STM32L486xx)
|
||||||
|
#include "stm32l486xx.h"
|
||||||
|
#elif defined(STM32L496xx)
|
||||||
|
#include "stm32l496xx.h"
|
||||||
|
#elif defined(STM32L4A6xx)
|
||||||
|
#include "stm32l4a6xx.h"
|
||||||
|
#elif defined(STM32L4P5xx)
|
||||||
|
#include "stm32l4p5xx.h"
|
||||||
|
#elif defined(STM32L4Q5xx)
|
||||||
|
#include "stm32l4q5xx.h"
|
||||||
|
#elif defined(STM32L4R5xx)
|
||||||
|
#include "stm32l4r5xx.h"
|
||||||
|
#elif defined(STM32L4R7xx)
|
||||||
|
#include "stm32l4r7xx.h"
|
||||||
|
#elif defined(STM32L4R9xx)
|
||||||
|
#include "stm32l4r9xx.h"
|
||||||
|
#elif defined(STM32L4S5xx)
|
||||||
|
#include "stm32l4s5xx.h"
|
||||||
|
#elif defined(STM32L4S7xx)
|
||||||
|
#include "stm32l4s7xx.h"
|
||||||
|
#elif defined(STM32L4S9xx)
|
||||||
|
|
||||||
|
#else
|
||||||
|
|
||||||
|
#error "Please select first the target STM32F0xx device used in your application (in stm32f0xx.h file)"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
#endif //SHAL_EXTI_REG_H
|
||||||
27
SHAL/Include/Peripheral/EXT/SHAL_EXTI_TYPES.h
Normal file
27
SHAL/Include/Peripheral/EXT/SHAL_EXTI_TYPES.h
Normal file
@@ -0,0 +1,27 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 10/17/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#ifndef SHMINGO_HAL_SHAL_EXTI_TYPES_H
|
||||||
|
#define SHMINGO_HAL_SHAL_EXTI_TYPES_H
|
||||||
|
|
||||||
|
#include "SHAL_CORE.h"
|
||||||
|
|
||||||
|
struct SHAL_EXTI_Interrupt_Mask_Register {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct SHAL_EXTI_Rising_Trigger_Selection_Register {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct SHAL_EXTI_Falling_Trigger_Selection_Register {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct SHAL_EXTI_Control_Register {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t offset;
|
||||||
|
};
|
||||||
|
|
||||||
|
#endif //SHMINGO_HAL_SHAL_EXTI_TYPES_H
|
||||||
@@ -2,16 +2,17 @@
|
|||||||
// Created by Luca on 8/29/2025.
|
// Created by Luca on 8/29/2025.
|
||||||
//
|
//
|
||||||
|
|
||||||
#ifndef SHMINGO_HAL_SHAL_GPIO_REG_F072XB_H
|
#ifndef SHAL_GPIO_REG_F072XB_H
|
||||||
#define SHMINGO_HAL_SHAL_GPIO_REG_F072XB_H
|
#define SHAL_GPIO_REG_F072XB_H
|
||||||
|
|
||||||
#include <stm32f072xb.h>
|
#include <stm32f072xb.h>
|
||||||
#include <cassert>
|
#include <cassert>
|
||||||
|
|
||||||
#include "SHAL_CORE.h"
|
#include "SHAL_GPIO_TYPES.h"
|
||||||
|
|
||||||
#define AVAILABLE_PORTS 3
|
#define AVAILABLE_PORTS 3
|
||||||
#define PINS_PER_PORT 16
|
#define PINS_PER_PORT 16
|
||||||
|
#define NUM_EXTI_LINES 16
|
||||||
|
|
||||||
#define AVAILABLE_GPIO \
|
#define AVAILABLE_GPIO \
|
||||||
X(A0) X(A1) X(A2) X(A3) X(A4) X(A5) X(A6) X(A7) X(A8) X(A9) X(A10) X(A11) X(A12) X(A13) X(A14) X(A15) \
|
X(A0) X(A1) X(A2) X(A3) X(A4) X(A5) X(A6) X(A7) X(A8) X(A9) X(A10) X(A11) X(A12) X(A13) X(A14) X(A15) \
|
||||||
@@ -19,7 +20,7 @@
|
|||||||
X(C0) X(C1) X(C2) X(C3) X(C4) X(C5) X(C6) X(C7) X(C8) X(C9) X(C10) X(C11) X(C12) X(C13) X(C14) X(C15)
|
X(C0) X(C1) X(C2) X(C3) X(C4) X(C5) X(C6) X(C7) X(C8) X(C9) X(C10) X(C11) X(C12) X(C13) X(C14) X(C15)
|
||||||
|
|
||||||
|
|
||||||
//Build enum map of available GPIO pins
|
//Build enum map of available SHAL_GPIO pins
|
||||||
enum class GPIO_Key : uint8_t {
|
enum class GPIO_Key : uint8_t {
|
||||||
#define X(key) key,
|
#define X(key) key,
|
||||||
AVAILABLE_GPIO
|
AVAILABLE_GPIO
|
||||||
@@ -29,7 +30,8 @@ enum class GPIO_Key : uint8_t {
|
|||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
constexpr SHAL_Peripheral getGPIORegister(const GPIO_Key g){
|
|
||||||
|
constexpr SHAL_GPIO_Peripheral getGPIORegister(const GPIO_Key g){
|
||||||
switch(g) {
|
switch(g) {
|
||||||
case GPIO_Key::A0: return {GPIOA,0};
|
case GPIO_Key::A0: return {GPIOA,0};
|
||||||
case GPIO_Key::A1: return {GPIOA,1};
|
case GPIO_Key::A1: return {GPIOA,1};
|
||||||
@@ -82,66 +84,66 @@ constexpr SHAL_Peripheral getGPIORegister(const GPIO_Key g){
|
|||||||
case GPIO_Key::INVALID:
|
case GPIO_Key::INVALID:
|
||||||
case GPIO_Key::NUM_GPIO:
|
case GPIO_Key::NUM_GPIO:
|
||||||
assert(false);
|
assert(false);
|
||||||
return SHAL_Peripheral(nullptr,0); //Unreachable
|
return SHAL_GPIO_Peripheral(nullptr,0); //Unreachable
|
||||||
}
|
}
|
||||||
__builtin_unreachable();
|
__builtin_unreachable();
|
||||||
}
|
}
|
||||||
|
|
||||||
constexpr SHAL_EXTIO_Register getGPIOEXTICR(const GPIO_Key g){
|
constexpr SHAL_GPIO_EXTI_Register getGPIOEXTICR(const GPIO_Key g){
|
||||||
switch(g) {
|
switch(g) {
|
||||||
case GPIO_Key::A0: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI0_PA};
|
case GPIO_Key::A0: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI0_PA,EXTI0_1_IRQn};
|
||||||
case GPIO_Key::A1: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI1_PA};
|
case GPIO_Key::A1: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI1_PA,EXTI0_1_IRQn};
|
||||||
case GPIO_Key::A2: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI2_PA};
|
case GPIO_Key::A2: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI2_PA,EXTI2_3_IRQn};
|
||||||
case GPIO_Key::A3: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI3_PA};
|
case GPIO_Key::A3: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI3_PA,EXTI2_3_IRQn};
|
||||||
case GPIO_Key::A4: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI4_PA};
|
case GPIO_Key::A4: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI4_PA,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::A5: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI5_PA};
|
case GPIO_Key::A5: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI5_PA,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::A6: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI6_PA};
|
case GPIO_Key::A6: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI6_PA,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::A7: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI7_PA};
|
case GPIO_Key::A7: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI7_PA,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::A8: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI8_PA};
|
case GPIO_Key::A8: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI8_PA,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::A9: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI9_PA};
|
case GPIO_Key::A9: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI9_PA,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::A10: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI10_PA};
|
case GPIO_Key::A10: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI10_PA,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::A11: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI11_PA};
|
case GPIO_Key::A11: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI11_PA,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::A12: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI12_PA};
|
case GPIO_Key::A12: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI12_PA,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::A13: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI13_PA};
|
case GPIO_Key::A13: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI13_PA,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::A14: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI14_PA};
|
case GPIO_Key::A14: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI14_PA,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::A15: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI15_PA};
|
case GPIO_Key::A15: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI15_PA,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::B0: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI0_PB};
|
case GPIO_Key::B0: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI0_PB,EXTI0_1_IRQn};
|
||||||
case GPIO_Key::B1: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI1_PB};
|
case GPIO_Key::B1: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI1_PB,EXTI0_1_IRQn};
|
||||||
case GPIO_Key::B2: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI2_PB};
|
case GPIO_Key::B2: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI2_PB,EXTI2_3_IRQn};
|
||||||
case GPIO_Key::B3: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI3_PB};
|
case GPIO_Key::B3: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI3_PB,EXTI2_3_IRQn};
|
||||||
case GPIO_Key::B4: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI4_PB};
|
case GPIO_Key::B4: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI4_PB,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::B5: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI5_PB};
|
case GPIO_Key::B5: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI5_PB,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::B6: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI6_PB};
|
case GPIO_Key::B6: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI6_PB,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::B7: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI7_PB};
|
case GPIO_Key::B7: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI7_PB,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::B8: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI8_PB};
|
case GPIO_Key::B8: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI8_PB,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::B9: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI9_PB};
|
case GPIO_Key::B9: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI9_PB,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::B10: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI10_PB};
|
case GPIO_Key::B10: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI10_PB,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::B11: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI11_PB};
|
case GPIO_Key::B11: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI11_PB,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::B12: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI12_PB};
|
case GPIO_Key::B12: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI12_PB,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::B13: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI13_PB};
|
case GPIO_Key::B13: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI13_PB,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::B14: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI14_PB};
|
case GPIO_Key::B14: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI14_PB,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::B15: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI15_PB};
|
case GPIO_Key::B15: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI15_PB,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::C0: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI0_PC};
|
case GPIO_Key::C0: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI0_PC,EXTI0_1_IRQn};
|
||||||
case GPIO_Key::C1: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI1_PC};
|
case GPIO_Key::C1: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI1_PC,EXTI0_1_IRQn};
|
||||||
case GPIO_Key::C2: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI2_PC};
|
case GPIO_Key::C2: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI2_PC,EXTI2_3_IRQn};
|
||||||
case GPIO_Key::C3: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI3_PC};
|
case GPIO_Key::C3: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI3_PC,EXTI2_3_IRQn};
|
||||||
case GPIO_Key::C4: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI4_PC};
|
case GPIO_Key::C4: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI4_PC,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::C5: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI5_PC};
|
case GPIO_Key::C5: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI5_PC,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::C6: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI6_PC};
|
case GPIO_Key::C6: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI6_PC,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::C7: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI7_PC};
|
case GPIO_Key::C7: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI7_PC,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::C8: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI8_PC};
|
case GPIO_Key::C8: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI8_PC,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::C9: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI9_PC};
|
case GPIO_Key::C9: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI9_PC,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::C10: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI10_PC};
|
case GPIO_Key::C10: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI10_PC,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::C11: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI11_PC};
|
case GPIO_Key::C11: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI11_PC,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::C12: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI12_PC};
|
case GPIO_Key::C12: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI12_PC,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::C13: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI13_PC};
|
case GPIO_Key::C13: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI13_PC,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::C14: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI14_PC};
|
case GPIO_Key::C14: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI14_PC,EXTI4_15_IRQn};
|
||||||
case GPIO_Key::C15: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI15_PC};
|
case GPIO_Key::C15: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI15_PC,EXTI4_15_IRQn};
|
||||||
|
|
||||||
case GPIO_Key::INVALID:
|
case GPIO_Key::INVALID:
|
||||||
case GPIO_Key::NUM_GPIO:
|
case GPIO_Key::NUM_GPIO:
|
||||||
assert(false);
|
assert(false);
|
||||||
return SHAL_EXTIO_Register(nullptr,0); //Unreachable
|
return SHAL_GPIO_EXTI_Register(nullptr, 0, EXTI4_15_IRQn); //Unreachable
|
||||||
}
|
}
|
||||||
__builtin_unreachable();
|
__builtin_unreachable();
|
||||||
}
|
}
|
||||||
@@ -207,7 +209,7 @@ constexpr SHAL_Peripheral_Register getGPIORCCEnable(const GPIO_Key g){
|
|||||||
__builtin_unreachable();
|
__builtin_unreachable();
|
||||||
}
|
}
|
||||||
|
|
||||||
constexpr unsigned int getGPIOPortNumber(const GPIO_Key g){
|
constexpr uint32_t getGPIOPortNumber(const GPIO_Key g){
|
||||||
switch(g) {
|
switch(g) {
|
||||||
case GPIO_Key::A0:
|
case GPIO_Key::A0:
|
||||||
case GPIO_Key::A1:
|
case GPIO_Key::A1:
|
||||||
@@ -268,4 +270,79 @@ constexpr unsigned int getGPIOPortNumber(const GPIO_Key g){
|
|||||||
__builtin_unreachable();
|
__builtin_unreachable();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
constexpr SHAL_GPIO_Port_Info getGPIOPortInfo(GPIO_Key key){
|
||||||
|
switch(key){
|
||||||
|
case GPIO_Key::A0:
|
||||||
|
case GPIO_Key::B0:
|
||||||
|
case GPIO_Key::C0:
|
||||||
|
return {0, SHAL_ADC_Channel::CH0};
|
||||||
|
case GPIO_Key::A1:
|
||||||
|
case GPIO_Key::B1:
|
||||||
|
case GPIO_Key::C1:
|
||||||
|
return {1, SHAL_ADC_Channel::CH1};
|
||||||
|
case GPIO_Key::A2:
|
||||||
|
case GPIO_Key::B2:
|
||||||
|
case GPIO_Key::C2:
|
||||||
|
return {2, SHAL_ADC_Channel::CH2};
|
||||||
|
case GPIO_Key::A3:
|
||||||
|
case GPIO_Key::B3:
|
||||||
|
case GPIO_Key::C3:
|
||||||
|
return {3, SHAL_ADC_Channel::CH3};
|
||||||
|
case GPIO_Key::A4:
|
||||||
|
case GPIO_Key::B4:
|
||||||
|
case GPIO_Key::C4:
|
||||||
|
return {4, SHAL_ADC_Channel::CH4};
|
||||||
|
case GPIO_Key::A5:
|
||||||
|
case GPIO_Key::B5:
|
||||||
|
case GPIO_Key::C5:
|
||||||
|
return {5, SHAL_ADC_Channel::CH5};
|
||||||
|
case GPIO_Key::A6:
|
||||||
|
case GPIO_Key::B6:
|
||||||
|
case GPIO_Key::C6:
|
||||||
|
return {6, SHAL_ADC_Channel::CH6};
|
||||||
|
case GPIO_Key::A7:
|
||||||
|
case GPIO_Key::B7:
|
||||||
|
case GPIO_Key::C7:
|
||||||
|
return {7, SHAL_ADC_Channel::CH7};
|
||||||
|
case GPIO_Key::A8:
|
||||||
|
case GPIO_Key::B8:
|
||||||
|
case GPIO_Key::C8:
|
||||||
|
return {8, SHAL_ADC_Channel::CH8};
|
||||||
|
case GPIO_Key::A9:
|
||||||
|
case GPIO_Key::B9:
|
||||||
|
case GPIO_Key::C9:
|
||||||
|
return {9, SHAL_ADC_Channel::CH9};
|
||||||
|
case GPIO_Key::A10:
|
||||||
|
case GPIO_Key::B10:
|
||||||
|
case GPIO_Key::C10:
|
||||||
|
return {10, SHAL_ADC_Channel::CH10};
|
||||||
|
case GPIO_Key::A11:
|
||||||
|
case GPIO_Key::B11:
|
||||||
|
case GPIO_Key::C11:
|
||||||
|
return {11, SHAL_ADC_Channel::CH11};
|
||||||
|
case GPIO_Key::A12:
|
||||||
|
case GPIO_Key::B12:
|
||||||
|
case GPIO_Key::C12:
|
||||||
|
return {12, SHAL_ADC_Channel::CH12};
|
||||||
|
case GPIO_Key::A13:
|
||||||
|
case GPIO_Key::B13:
|
||||||
|
case GPIO_Key::C13:
|
||||||
|
return {13, SHAL_ADC_Channel::CH13};
|
||||||
|
case GPIO_Key::A14:
|
||||||
|
case GPIO_Key::B14:
|
||||||
|
case GPIO_Key::C14:
|
||||||
|
return {14, SHAL_ADC_Channel::CH14};
|
||||||
|
case GPIO_Key::A15:
|
||||||
|
case GPIO_Key::B15:
|
||||||
|
case GPIO_Key::C15:
|
||||||
|
return {15, SHAL_ADC_Channel::CH15};
|
||||||
|
case GPIO_Key::NUM_GPIO:
|
||||||
|
case GPIO_Key::INVALID:
|
||||||
|
return {0, SHAL_ADC_Channel::CH0};
|
||||||
|
}
|
||||||
|
__builtin_unreachable();
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
#endif //SHMINGO_HAL_SHAL_GPIO_REG_F072XB_H
|
#endif //SHMINGO_HAL_SHAL_GPIO_REG_F072XB_H
|
||||||
|
|||||||
226
SHAL/Include/Peripheral/GPIO/Reg/SHAL_GPIO_REG_L432KC.h
Normal file
226
SHAL/Include/Peripheral/GPIO/Reg/SHAL_GPIO_REG_L432KC.h
Normal file
@@ -0,0 +1,226 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 8/29/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#ifndef SHAL_GPIO_REG_F072XB_H
|
||||||
|
#define SHAL_GPIO_REG_F072XB_H
|
||||||
|
|
||||||
|
#include <stm32l432xx.h>
|
||||||
|
#include <cassert>
|
||||||
|
|
||||||
|
#include "SHAL_GPIO_TYPES.h"
|
||||||
|
|
||||||
|
#define AVAILABLE_PORTS 2
|
||||||
|
#define PINS_PER_PORT 16
|
||||||
|
#define NUM_EXTI_LINES 16
|
||||||
|
|
||||||
|
|
||||||
|
//Build enum map of available SHAL_GPIO pins
|
||||||
|
enum class GPIO_Key : uint8_t {
|
||||||
|
A0 = 0,
|
||||||
|
A1 = 1,
|
||||||
|
A2 = 2,
|
||||||
|
A3 = 3,
|
||||||
|
A4 = 4,
|
||||||
|
A5 = 5,
|
||||||
|
A6 = 6,
|
||||||
|
A7 = 7,
|
||||||
|
A8 = 8,
|
||||||
|
A9,
|
||||||
|
A10,
|
||||||
|
A11,
|
||||||
|
A12,
|
||||||
|
A13,
|
||||||
|
A14,
|
||||||
|
A15,
|
||||||
|
B0,
|
||||||
|
B1,
|
||||||
|
B3 = 19, //Offset to compensate for lack of B2
|
||||||
|
B4,
|
||||||
|
B5,
|
||||||
|
B6,
|
||||||
|
B7,
|
||||||
|
NUM_GPIO,
|
||||||
|
INVALID
|
||||||
|
};
|
||||||
|
|
||||||
|
enum class GPIO_Alternate_Function_Mapping {
|
||||||
|
A0_TIM2CH1 = 0x01,
|
||||||
|
A1_TIM2CH2 = 0x01,
|
||||||
|
A2_TIM2CH3 = 0x01,
|
||||||
|
A3_TIM2CH4 = 0x01,
|
||||||
|
A5_TIM2CH1 = 0x01,
|
||||||
|
A6_TIM1BKIN = 0x01,
|
||||||
|
A7_TIM1CH1N = 0x01,
|
||||||
|
A8_TIM1CH1 = 0x01,
|
||||||
|
A9_TIM1CH2 = 0x01,
|
||||||
|
A10_TIM1CH3 = 0x01,
|
||||||
|
A11_TIM1CH4 = 0x01,
|
||||||
|
A12_TIM1ETR = 0x01,
|
||||||
|
A15_TIM2CH1 = 0x01,
|
||||||
|
B0_TIM1CH2N = 0x01,
|
||||||
|
B1_TIM1CH3N = 0x01,
|
||||||
|
};
|
||||||
|
|
||||||
|
static volatile GPIO_TypeDef * GPIO_TABLE[2] = { //Lookup table for ADCs
|
||||||
|
GPIOA,
|
||||||
|
GPIOB
|
||||||
|
};
|
||||||
|
|
||||||
|
constexpr uint8_t getGPIOPinNumber(GPIO_Key key){
|
||||||
|
return static_cast<uint8_t>(key) % 16;
|
||||||
|
}
|
||||||
|
|
||||||
|
constexpr uint8_t getGPIOPortNUmber(GPIO_Key key){
|
||||||
|
return static_cast<uint8_t>(key) / 16;
|
||||||
|
}
|
||||||
|
|
||||||
|
constexpr SHAL_GPIO_EXTI_Register getGPIOEXTICR(const GPIO_Key g){
|
||||||
|
switch(g) {
|
||||||
|
case GPIO_Key::A0: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI0_PA,EXTI0_IRQn};
|
||||||
|
case GPIO_Key::A1: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI1_PA,EXTI1_IRQn};
|
||||||
|
case GPIO_Key::A2: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI2_PA,EXTI2_IRQn};
|
||||||
|
case GPIO_Key::A3: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI3_PA,EXTI3_IRQn};
|
||||||
|
case GPIO_Key::A4: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI4_PA,EXTI4_IRQn};
|
||||||
|
case GPIO_Key::A5: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI5_PA,EXTI9_5_IRQn};
|
||||||
|
case GPIO_Key::A6: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI6_PA,EXTI9_5_IRQn};
|
||||||
|
case GPIO_Key::A7: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI7_PA,EXTI9_5_IRQn};
|
||||||
|
case GPIO_Key::A8: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI8_PA,EXTI9_5_IRQn};
|
||||||
|
case GPIO_Key::A9: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI9_PA,EXTI9_5_IRQn};
|
||||||
|
case GPIO_Key::A10: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI10_PA,EXTI15_10_IRQn};
|
||||||
|
case GPIO_Key::A11: return {&SYSCFG->EXTICR[2],SYSCFG_EXTICR3_EXTI11_PA,EXTI15_10_IRQn};
|
||||||
|
case GPIO_Key::A12: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI12_PA,EXTI15_10_IRQn};
|
||||||
|
case GPIO_Key::A13: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI13_PA,EXTI15_10_IRQn};
|
||||||
|
case GPIO_Key::A14: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI14_PA,EXTI15_10_IRQn};
|
||||||
|
case GPIO_Key::A15: return {&SYSCFG->EXTICR[3],SYSCFG_EXTICR4_EXTI15_PA,EXTI15_10_IRQn};
|
||||||
|
case GPIO_Key::B0: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI0_PB,EXTI0_IRQn};
|
||||||
|
case GPIO_Key::B1: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI1_PB,EXTI1_IRQn};
|
||||||
|
case GPIO_Key::B3: return {&SYSCFG->EXTICR[0],SYSCFG_EXTICR1_EXTI3_PB,EXTI3_IRQn};
|
||||||
|
case GPIO_Key::B4: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI4_PB,EXTI4_IRQn};
|
||||||
|
case GPIO_Key::B5: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI5_PB,EXTI9_5_IRQn};
|
||||||
|
case GPIO_Key::B6: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI6_PB,EXTI9_5_IRQn};
|
||||||
|
case GPIO_Key::B7: return {&SYSCFG->EXTICR[1],SYSCFG_EXTICR2_EXTI7_PB,EXTI9_5_IRQn};
|
||||||
|
|
||||||
|
|
||||||
|
case GPIO_Key::INVALID:
|
||||||
|
case GPIO_Key::NUM_GPIO:
|
||||||
|
assert(false);
|
||||||
|
return SHAL_GPIO_EXTI_Register(nullptr, 0, static_cast<IRQn_Type>(0)); //Unreachable
|
||||||
|
}
|
||||||
|
__builtin_unreachable();
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_GPIO_RCC_Enable_Register getGPIORCCEnable(const GPIO_Key g){
|
||||||
|
volatile uint32_t* reg = &RCC->AHB2ENR; //register
|
||||||
|
uint32_t offset;
|
||||||
|
offset = (static_cast<uint8_t>(g) / 16) == 0 ? RCC_AHB2ENR_GPIOAEN_Pos : RCC_AHB2ENR_GPIOBEN_Pos;
|
||||||
|
|
||||||
|
return {reg,offset};
|
||||||
|
}
|
||||||
|
|
||||||
|
constexpr uint32_t getGPIOPortNumber(const GPIO_Key g){
|
||||||
|
return (static_cast<uint8_t>(g) / 16);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_GPIO_Mode_Register getGPIOModeRegister(const GPIO_Key key){
|
||||||
|
volatile uint32_t* reg = &GPIO_TABLE[static_cast<uint8_t>(key) / 16]->MODER;
|
||||||
|
uint32_t offset = 2 * (static_cast<uint8_t>(key) % 16);
|
||||||
|
return {reg,offset};
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_GPIO_Pullup_Pulldown_Register getGPIOPUPDRegister(const GPIO_Key key){
|
||||||
|
volatile uint32_t* reg = &GPIO_TABLE[static_cast<uint8_t>(key) / 16]->PUPDR;
|
||||||
|
uint32_t offset = 2 * static_cast<uint8_t>(key) % 16;
|
||||||
|
return {reg,offset};
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_GPIO_Alternate_Function_Register getGPIOAlternateFunctionRegister(const GPIO_Key key){
|
||||||
|
|
||||||
|
uint32_t pinNumber = static_cast<uint8_t>(key) % 16; //Number of pin (We need 0-7 to be AFR 1 and 8-15 to be AFR 2)
|
||||||
|
uint32_t afrIndex = pinNumber < 8 ? 0 : 1;
|
||||||
|
|
||||||
|
volatile uint32_t* reg = &GPIO_TABLE[static_cast<uint8_t>(key) / 16]->AFR[afrIndex];
|
||||||
|
uint32_t offset = (pinNumber % 8) * 4; //Increment in groups of four
|
||||||
|
return {reg,offset};
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_GPIO_Output_Speed_Register getGPIOOutputSpeedRegister(const GPIO_Key key){
|
||||||
|
volatile uint32_t* reg = &GPIO_TABLE[static_cast<uint8_t>(key) / 16]->OSPEEDR;
|
||||||
|
uint32_t offset = 2 * static_cast<uint8_t>(key) % 16;
|
||||||
|
return {reg,offset};
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_GPIO_Output_Type_Register getGPIOOutputTypeRegister(const GPIO_Key key){
|
||||||
|
volatile uint32_t* reg = &GPIO_TABLE[static_cast<uint8_t>(key) / 16]->OTYPER;
|
||||||
|
uint32_t offset = static_cast<uint8_t>(key) % 16;
|
||||||
|
return {reg,offset};
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_GPIO_Output_Data_Register getGPIOOutputDataRegister(const GPIO_Key key){
|
||||||
|
volatile uint32_t* reg = &GPIO_TABLE[static_cast<uint8_t>(key) / 16]->ODR;
|
||||||
|
uint32_t offset = (static_cast<uint8_t>(key) % 16);
|
||||||
|
return {reg,offset};
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_GPIO_Input_Data_Register getGPIOInputDataRegister(const GPIO_Key key){
|
||||||
|
volatile uint32_t* reg = &GPIO_TABLE[static_cast<uint8_t>(key) / 16]->IDR;
|
||||||
|
uint32_t offset = static_cast<uint8_t>(key) % 16;
|
||||||
|
return {reg,offset};
|
||||||
|
}
|
||||||
|
|
||||||
|
constexpr SHAL_GPIO_Port_Info getGPIOPortInfo(GPIO_Key key){
|
||||||
|
switch(key){
|
||||||
|
case GPIO_Key::A0:
|
||||||
|
return {0, SHAL_ADC_Channel::CH5};
|
||||||
|
case GPIO_Key::B0:
|
||||||
|
return {0, SHAL_ADC_Channel::CH15};
|
||||||
|
case GPIO_Key::A1:
|
||||||
|
return {1, SHAL_ADC_Channel::CH6};
|
||||||
|
case GPIO_Key::B1:
|
||||||
|
return {1, SHAL_ADC_Channel::CH16};
|
||||||
|
case GPIO_Key::A2:
|
||||||
|
return {2, SHAL_ADC_Channel::CH7};
|
||||||
|
case GPIO_Key::A3:
|
||||||
|
return {3, SHAL_ADC_Channel::CH8};
|
||||||
|
case GPIO_Key::B3:
|
||||||
|
return {3, SHAL_ADC_Channel::NO_ADC_MAPPING};
|
||||||
|
case GPIO_Key::A4:
|
||||||
|
return {4, SHAL_ADC_Channel::CH9};
|
||||||
|
case GPIO_Key::B4:
|
||||||
|
return {4, SHAL_ADC_Channel::NO_ADC_MAPPING};
|
||||||
|
case GPIO_Key::A5:
|
||||||
|
return {5, SHAL_ADC_Channel::CH10};
|
||||||
|
case GPIO_Key::B5:
|
||||||
|
return {5, SHAL_ADC_Channel::NO_ADC_MAPPING};
|
||||||
|
case GPIO_Key::A6:
|
||||||
|
return {6, SHAL_ADC_Channel::CH11};
|
||||||
|
case GPIO_Key::B6:
|
||||||
|
return {6, SHAL_ADC_Channel::NO_ADC_MAPPING};
|
||||||
|
case GPIO_Key::A7:
|
||||||
|
return {7, SHAL_ADC_Channel::CH12};
|
||||||
|
case GPIO_Key::B7:
|
||||||
|
return {7, SHAL_ADC_Channel::NO_ADC_MAPPING};
|
||||||
|
case GPIO_Key::A8:
|
||||||
|
return {8, SHAL_ADC_Channel::NO_ADC_MAPPING};
|
||||||
|
case GPIO_Key::A9:
|
||||||
|
return {9, SHAL_ADC_Channel::NO_ADC_MAPPING};
|
||||||
|
case GPIO_Key::A10:
|
||||||
|
return {10, SHAL_ADC_Channel::NO_ADC_MAPPING};
|
||||||
|
case GPIO_Key::A11:
|
||||||
|
return {11, SHAL_ADC_Channel::NO_ADC_MAPPING};
|
||||||
|
case GPIO_Key::A12:
|
||||||
|
return {12, SHAL_ADC_Channel::NO_ADC_MAPPING};
|
||||||
|
case GPIO_Key::A13:
|
||||||
|
return {13, SHAL_ADC_Channel::NO_ADC_MAPPING};
|
||||||
|
case GPIO_Key::A14:
|
||||||
|
return {14, SHAL_ADC_Channel::NO_ADC_MAPPING};
|
||||||
|
case GPIO_Key::A15:
|
||||||
|
return {15, SHAL_ADC_Channel::NO_ADC_MAPPING};
|
||||||
|
case GPIO_Key::NUM_GPIO:
|
||||||
|
case GPIO_Key::INVALID:
|
||||||
|
return {0, SHAL_ADC_Channel::NO_ADC_MAPPING};
|
||||||
|
}
|
||||||
|
__builtin_unreachable();
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif //SHAL_GPIO_REG_F072XB_H
|
||||||
@@ -2,61 +2,92 @@
|
|||||||
// Created by Luca on 8/29/2025.
|
// Created by Luca on 8/29/2025.
|
||||||
//
|
//
|
||||||
|
|
||||||
#ifndef SHMINGO_HAL_SHAL_GPIO_H
|
#ifndef SHAL_GPIO_H
|
||||||
#define SHMINGO_HAL_SHAL_GPIO_H
|
#define SHAL_GPIO_H
|
||||||
|
|
||||||
#include "SHAL_CORE.h"
|
#include "SHAL_GPIO_REG.h"
|
||||||
|
|
||||||
#include <cassert>
|
#include <cassert>
|
||||||
#include "SHAL_GPIO_REG_F072xB.h"
|
|
||||||
|
|
||||||
enum class PinMode : uint8_t{
|
#include "SHAL_EXTI_CALLBACK.h"
|
||||||
INPUT_MODE,
|
#include "SHAL_ADC.h"
|
||||||
OUTPUT_MODE,
|
|
||||||
ALTERNATE_FUNCTION_MODE,
|
|
||||||
ANALOG_MODE,
|
|
||||||
INVALID
|
|
||||||
};
|
|
||||||
|
|
||||||
unsigned long getPinMode(PinMode mode);
|
|
||||||
|
|
||||||
//Abstraction of GPIO registers
|
//Abstraction of SHAL_GPIO registers
|
||||||
class GPIO{
|
class SHAL_GPIO{
|
||||||
|
|
||||||
public:
|
public:
|
||||||
|
|
||||||
void toggle();
|
void toggle() volatile;
|
||||||
|
|
||||||
//TODO replace stupid offset hack from APB
|
//TODO replace stupid offset hack from APB
|
||||||
void setHigh();
|
void setHigh();
|
||||||
void setLow();
|
void setLow();
|
||||||
|
|
||||||
|
/// Uses the ADC to read an analog voltage value
|
||||||
|
/// \param sampleTime The amount of clock cycles to use for the ADC
|
||||||
|
/// \return ADC result
|
||||||
|
uint16_t analogRead(SHAL_ADC_SampleTime sampleTime = SHAL_ADC_SampleTime::C8);
|
||||||
|
|
||||||
|
uint16_t digitalRead();
|
||||||
|
|
||||||
|
void setAlternateFunction(GPIO_Alternate_Function AF) volatile;
|
||||||
|
void setAlternateFunction(GPIO_Alternate_Function_Mapping AF) volatile;
|
||||||
|
|
||||||
|
void setOutputType(PinType type) volatile;
|
||||||
|
|
||||||
|
void setOutputSpeed(OutputSpeed speed) volatile;
|
||||||
|
|
||||||
|
void setInternalResistor(InternalResistorType type) volatile;
|
||||||
|
|
||||||
|
void useAsExternalInterrupt(TriggerMode mode, EXTICallback callback);
|
||||||
|
|
||||||
|
SHAL_Result setPinMode(PinMode mode) volatile;
|
||||||
|
|
||||||
private:
|
private:
|
||||||
|
|
||||||
friend class GPIOManager;
|
friend class GPIOManager;
|
||||||
|
|
||||||
explicit GPIO(GPIO_Key key, PinMode pinMode);
|
explicit SHAL_GPIO(GPIO_Key key);
|
||||||
GPIO();
|
SHAL_GPIO();
|
||||||
|
|
||||||
GPIO_Key m_GPIO_KEY = GPIO_Key::INVALID;
|
GPIO_Key m_GPIO_KEY = GPIO_Key::INVALID;
|
||||||
|
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
#define initGPIO(GPIO_KEY, PIN_MODE) GPIOManager::get(GPIO_KEY, PIN_MODE)
|
|
||||||
|
|
||||||
//Manages instances of GPIO objects
|
|
||||||
|
|
||||||
|
//Init SHAL_GPIO for normal use
|
||||||
|
#define PIN_TO_KEY(name) GPIO_Key::name
|
||||||
|
#define PIN(name) GPIOManager::get(PIN_TO_KEY(name))
|
||||||
|
|
||||||
|
#define GET_GPIO(key) GPIOManager::get(key)
|
||||||
|
|
||||||
|
#define SET_ANALOGREAD_ADC(x) GPIOManager::setGPIOADC(x)
|
||||||
|
|
||||||
|
|
||||||
|
//Manages instances of SHAL_GPIO objects
|
||||||
class GPIOManager{
|
class GPIOManager{
|
||||||
|
|
||||||
public:
|
public:
|
||||||
|
|
||||||
static GPIO& get(GPIO_Key, PinMode pinMode);
|
static SHAL_GPIO& get(GPIO_Key);
|
||||||
|
|
||||||
|
static SHAL_ADC getGPIOADC(){ return m_GPIO_ADC;}
|
||||||
|
|
||||||
|
static void setGPIOADC(SHAL_ADC adc){m_GPIO_ADC = adc;}
|
||||||
|
|
||||||
GPIOManager() = delete;
|
GPIOManager() = delete;
|
||||||
|
|
||||||
private:
|
private:
|
||||||
|
|
||||||
inline static GPIO m_gpios[AVAILABLE_PORTS][PINS_PER_PORT] = {{}};
|
inline static SHAL_GPIO m_gpios[AVAILABLE_PORTS][PINS_PER_PORT] = {{}};
|
||||||
|
|
||||||
|
inline static SHAL_ADC m_GPIO_ADC = SHAL_ADC(1);
|
||||||
|
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
#endif //SHMINGO_HAL_SHAL_GPIO_H
|
#endif //SHMINGO_HAL_SHAL_GPIO_H
|
||||||
|
|||||||
100
SHAL/Include/Peripheral/GPIO/SHAL_GPIO_REG.h
Normal file
100
SHAL/Include/Peripheral/GPIO/SHAL_GPIO_REG.h
Normal file
@@ -0,0 +1,100 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 9/6/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#ifndef SHAL_GPIO_REG_H
|
||||||
|
#define SHAL_GPIO_REG_H
|
||||||
|
|
||||||
|
#if defined(STM32F030x6)
|
||||||
|
#include "stm32f030x6.h"
|
||||||
|
#elif defined(STM32F030x8)
|
||||||
|
#include "stm32f030x8.h"
|
||||||
|
#elif defined(STM32F031x6)
|
||||||
|
#include "stm32f031x6.h"
|
||||||
|
#elif defined(STM32F038xx)
|
||||||
|
#include "stm32f038xx.h"
|
||||||
|
#elif defined(STM32F042x6)
|
||||||
|
#include "stm32f042x6.h"
|
||||||
|
#elif defined(STM32F048xx)
|
||||||
|
#include "stm32f048xx.h"
|
||||||
|
#elif defined(STM32F051x8)
|
||||||
|
#include "stm32f051x8.h"
|
||||||
|
#elif defined(STM32F058xx)
|
||||||
|
#include "stm32f058xx.h"
|
||||||
|
#elif defined(STM32F070x6)
|
||||||
|
#include "stm32f070x6.h"
|
||||||
|
#elif defined(STM32F070xB)
|
||||||
|
#include "stm32f070xb.h"
|
||||||
|
#elif defined(STM32F071xB)
|
||||||
|
#include "stm32f071xb.h"
|
||||||
|
#elif defined(STM32F072xB)
|
||||||
|
#include "SHAL_GPIO_REG_F072xB.h"
|
||||||
|
#elif defined(STM32F078xx)
|
||||||
|
#include "stm32f078xx.h"
|
||||||
|
#elif defined(STM32F091xC)
|
||||||
|
#include "stm32f091xc.h"
|
||||||
|
#elif defined(STM32F098xx)
|
||||||
|
#include "stm32f098xx.h"
|
||||||
|
#elif defined(STM32F030xC)
|
||||||
|
#include "stm32f030xc.h"
|
||||||
|
#elif defined(STM32F030xC)
|
||||||
|
#include "stm32f030xc.h"
|
||||||
|
#elif defined(STM32L412xx)
|
||||||
|
#include "stm32l412xx.h"
|
||||||
|
#elif defined(STM32L422xx)
|
||||||
|
#include "stm32l422xx.h"
|
||||||
|
#elif defined(STM32L431xx)
|
||||||
|
#include "stm32l431xx.h"
|
||||||
|
#elif defined(STM32L432xx)
|
||||||
|
#include "SHAL_GPIO_REG_L432KC.h"
|
||||||
|
#elif defined(STM32L433xx)
|
||||||
|
#include "stm32l433xx.h"
|
||||||
|
#elif defined(STM32L442xx)
|
||||||
|
#include "stm32l442xx.h"
|
||||||
|
#elif defined(STM32L443xx)
|
||||||
|
#include "stm32l443xx.h"
|
||||||
|
#elif defined(STM32L451xx)
|
||||||
|
#include "stm32l451xx.h"
|
||||||
|
#elif defined(STM32L452xx)
|
||||||
|
#include "stm32l452xx.h"
|
||||||
|
#elif defined(STM32L462xx)
|
||||||
|
#include "stm32l462xx.h"
|
||||||
|
#elif defined(STM32L471xx)
|
||||||
|
#include "stm32l471xx.h"
|
||||||
|
#elif defined(STM32L475xx)
|
||||||
|
#include "stm32l475xx.h"
|
||||||
|
#elif defined(STM32L476xx)
|
||||||
|
#include "stm32l476xx.h"
|
||||||
|
#elif defined(STM32L485xx)
|
||||||
|
#include "stm32l485xx.h"
|
||||||
|
#elif defined(STM32L486xx)
|
||||||
|
#include "stm32l486xx.h"
|
||||||
|
#elif defined(STM32L496xx)
|
||||||
|
#include "stm32l496xx.h"
|
||||||
|
#elif defined(STM32L4A6xx)
|
||||||
|
#include "stm32l4a6xx.h"
|
||||||
|
#elif defined(STM32L4P5xx)
|
||||||
|
#include "stm32l4p5xx.h"
|
||||||
|
#elif defined(STM32L4Q5xx)
|
||||||
|
#include "stm32l4q5xx.h"
|
||||||
|
#elif defined(STM32L4R5xx)
|
||||||
|
#include "stm32l4r5xx.h"
|
||||||
|
#elif defined(STM32L4R7xx)
|
||||||
|
#include "stm32l4r7xx.h"
|
||||||
|
#elif defined(STM32L4R9xx)
|
||||||
|
#include "stm32l4r9xx.h"
|
||||||
|
#elif defined(STM32L4S5xx)
|
||||||
|
#include "stm32l4s5xx.h"
|
||||||
|
#elif defined(STM32L4S7xx)
|
||||||
|
#include "stm32l4s7xx.h"
|
||||||
|
#elif defined(STM32L4S9xx)
|
||||||
|
|
||||||
|
#else
|
||||||
|
|
||||||
|
#error "Please select first the target STM32F0xx device used in your application (in stm32f0xx.h file)"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
#endif //SHMINGO_HAL_SHAL_GPIO_REG_H
|
||||||
107
SHAL/Include/Peripheral/GPIO/SHAL_GPIO_TYPES.h
Normal file
107
SHAL/Include/Peripheral/GPIO/SHAL_GPIO_TYPES.h
Normal file
@@ -0,0 +1,107 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 9/6/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#ifndef SHAL_GPIO_TYPES_H
|
||||||
|
#define SHAL_GPIO_TYPES_H
|
||||||
|
|
||||||
|
#include "SHAL_CORE.h"
|
||||||
|
#include "SHAL_ADC.h"
|
||||||
|
#include "SHAL_ADC_TYPES.h"
|
||||||
|
|
||||||
|
struct SHAL_GPIO_EXTI_Register{
|
||||||
|
volatile uint32_t* EXT_ICR; //4 32 bit registers which say which GPIO a line is connected to
|
||||||
|
uint32_t mask; //Mask for enabling GPIO connection
|
||||||
|
IRQn_Type IRQN; //IRQ number for enabling lines
|
||||||
|
};
|
||||||
|
|
||||||
|
struct SHAL_GPIO_RCC_Enable_Register{
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t offset;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct SHAL_GPIO_Mode_Register {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t offset;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct SHAL_GPIO_Pullup_Pulldown_Register {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t offset;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct SHAL_GPIO_Alternate_Function_Register {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t offset;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct SHAL_GPIO_Output_Speed_Register{
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t offset;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct SHAL_GPIO_Output_Type_Register {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t offset;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct SHAL_GPIO_Output_Data_Register {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t offset;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct SHAL_GPIO_Input_Data_Register {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t offset;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct SHAL_GPIO_Port_Info{
|
||||||
|
uint8_t number;
|
||||||
|
SHAL_ADC_Channel ADCChannel;
|
||||||
|
};
|
||||||
|
|
||||||
|
enum class PinMode : uint8_t{
|
||||||
|
INPUT_MODE = 0x00,
|
||||||
|
OUTPUT_MODE = 0x01,
|
||||||
|
ALTERNATE_FUNCTION_MODE = 0x02,
|
||||||
|
ANALOG_MODE = 0x03,
|
||||||
|
INVALID = 0x00,
|
||||||
|
};
|
||||||
|
|
||||||
|
enum class GPIO_Alternate_Function : uint8_t{
|
||||||
|
AF0 = 0x00,
|
||||||
|
AF1 = 0x01,
|
||||||
|
AF2 = 0x02,
|
||||||
|
AF3 = 0x03,
|
||||||
|
AF4 = 0x04,
|
||||||
|
AF5 = 0x05,
|
||||||
|
AF6 = 0x06,
|
||||||
|
AF7 = 0x07,
|
||||||
|
};
|
||||||
|
|
||||||
|
enum class PinType : uint8_t{
|
||||||
|
PUSH_PULL = 0x00,
|
||||||
|
OPEN_DRAIN = 0x01,
|
||||||
|
};
|
||||||
|
|
||||||
|
enum class InternalResistorType : uint8_t{
|
||||||
|
NO_PULL = 0x00,
|
||||||
|
PULLUP = 0x01,
|
||||||
|
PULLDOWN = 0x02,
|
||||||
|
};
|
||||||
|
|
||||||
|
enum class OutputSpeed : uint8_t{
|
||||||
|
LOW_SPEED = 0x00,
|
||||||
|
MEDIUM_SPEED = 0x01,
|
||||||
|
HIGH_SPEED = 0x02,
|
||||||
|
VERY_HIGH_SPEED = 0x03,
|
||||||
|
};
|
||||||
|
|
||||||
|
enum class TriggerMode : uint8_t{
|
||||||
|
RISING_EDGE,
|
||||||
|
FALLING_EDGE,
|
||||||
|
RISING_FALLING_EDGE
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
|
#endif //SHMINGO_HAL_SHAL_GPIO_TYPES_H
|
||||||
94
SHAL/Include/Peripheral/I2C/Reg/SHAL_I2C_REG_F072xB.h
Normal file
94
SHAL/Include/Peripheral/I2C/Reg/SHAL_I2C_REG_F072xB.h
Normal file
@@ -0,0 +1,94 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 9/9/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#ifndef SHAL_I2C_REG_F072XB_H
|
||||||
|
#define SHAL_I2C_REG_F072XB_H
|
||||||
|
|
||||||
|
#include "SHAL_CORE.h"
|
||||||
|
#include <cassert>
|
||||||
|
|
||||||
|
#include "SHAL_I2C_TYPES.h"
|
||||||
|
|
||||||
|
#define NUM_I2C_BUSES 2
|
||||||
|
|
||||||
|
#define SHAL_I2C1 I2C(1)
|
||||||
|
#define SHAL_I2C2 I2C(2)
|
||||||
|
|
||||||
|
enum class I2C_Pair : uint8_t{
|
||||||
|
//I2C_1
|
||||||
|
SCL1B6_SDA1B7, //AF1
|
||||||
|
SCL1B8_SDA1B9, //AF1
|
||||||
|
|
||||||
|
//I2C_2
|
||||||
|
SCL2B10_SDA2B11, //AF1
|
||||||
|
SCL2B13_SDA2B14, //AF5
|
||||||
|
|
||||||
|
NUM_PAIRS,
|
||||||
|
INVALID
|
||||||
|
};
|
||||||
|
|
||||||
|
constexpr SHAL_I2C_Pair getI2CPair(const I2C_Pair pair){
|
||||||
|
switch(pair){
|
||||||
|
case I2C_Pair::SCL1B6_SDA1B7: return {I2C1,GPIO_Key::B6,GPIO_Key::B7,GPIO_Alternate_Function::AF1,GPIO_Alternate_Function::AF1};
|
||||||
|
case I2C_Pair::SCL1B8_SDA1B9: return {I2C1,GPIO_Key::B8,GPIO_Key::B9,GPIO_Alternate_Function::AF1,GPIO_Alternate_Function::AF1};
|
||||||
|
case I2C_Pair::SCL2B10_SDA2B11: return {I2C2,GPIO_Key::B10,GPIO_Key::B11,GPIO_Alternate_Function::AF1,GPIO_Alternate_Function::AF1};
|
||||||
|
case I2C_Pair::SCL2B13_SDA2B14: return {I2C2,GPIO_Key::B13,GPIO_Key::B14,GPIO_Alternate_Function::AF5,GPIO_Alternate_Function::AF5};
|
||||||
|
case I2C_Pair::NUM_PAIRS:
|
||||||
|
case I2C_Pair::INVALID:
|
||||||
|
assert(false);
|
||||||
|
return {nullptr,GPIO_Key::INVALID,GPIO_Key::INVALID,GPIO_Alternate_Function::AF0,GPIO_Alternate_Function::AF0};
|
||||||
|
}
|
||||||
|
__builtin_unreachable();
|
||||||
|
}
|
||||||
|
|
||||||
|
constexpr SHAL_I2C_Enable_Reg getI2CEnableReg(const I2C_Pair pair){
|
||||||
|
switch(pair){
|
||||||
|
case I2C_Pair::SCL1B6_SDA1B7:
|
||||||
|
case I2C_Pair::SCL1B8_SDA1B9:
|
||||||
|
return {&RCC->APB1ENR,RCC_APB1ENR_I2C1EN};
|
||||||
|
case I2C_Pair::SCL2B10_SDA2B11:
|
||||||
|
case I2C_Pair::SCL2B13_SDA2B14:
|
||||||
|
return {&RCC->APB1ENR,RCC_APB1ENR_I2C2EN};
|
||||||
|
case I2C_Pair::NUM_PAIRS:
|
||||||
|
case I2C_Pair::INVALID:
|
||||||
|
assert(false);
|
||||||
|
return {nullptr, 0};
|
||||||
|
}
|
||||||
|
__builtin_unreachable();
|
||||||
|
}
|
||||||
|
|
||||||
|
constexpr SHAL_I2C_Reset_Reg getI2CResetReg(const I2C_Pair pair){
|
||||||
|
switch(pair){
|
||||||
|
case I2C_Pair::SCL1B6_SDA1B7:
|
||||||
|
case I2C_Pair::SCL1B8_SDA1B9:
|
||||||
|
return {&RCC->APB1RSTR,RCC_APB1RSTR_I2C1RST};
|
||||||
|
case I2C_Pair::SCL2B10_SDA2B11:
|
||||||
|
case I2C_Pair::SCL2B13_SDA2B14:
|
||||||
|
return {&RCC->APB1RSTR,RCC_APB1RSTR_I2C2RST};
|
||||||
|
case I2C_Pair::NUM_PAIRS:
|
||||||
|
case I2C_Pair::INVALID:
|
||||||
|
assert(false);
|
||||||
|
return {nullptr, 0};
|
||||||
|
}
|
||||||
|
__builtin_unreachable();
|
||||||
|
}
|
||||||
|
|
||||||
|
//Gets all the bits in the I2C timer register, these values should rarely be manually set, but I wanted to support it anyway
|
||||||
|
constexpr SHAL_I2C_Timing_Reg getI2CTimerReg(const I2C_Pair pair){
|
||||||
|
switch(pair){
|
||||||
|
case I2C_Pair::SCL1B6_SDA1B7:
|
||||||
|
case I2C_Pair::SCL1B8_SDA1B9:
|
||||||
|
return {&I2C1->TIMINGR,31,23,19,15,7};
|
||||||
|
case I2C_Pair::SCL2B10_SDA2B11:
|
||||||
|
case I2C_Pair::SCL2B13_SDA2B14:
|
||||||
|
return {&I2C2->TIMINGR,31,23,19,15,7};
|
||||||
|
case I2C_Pair::NUM_PAIRS:
|
||||||
|
case I2C_Pair::INVALID:
|
||||||
|
assert(false);
|
||||||
|
__builtin_unreachable();
|
||||||
|
}
|
||||||
|
__builtin_unreachable();
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif //SHAL_I2C_REG_F072XB_H
|
||||||
83
SHAL/Include/Peripheral/I2C/Reg/SHAL_I2C_REG_L432KC.h
Normal file
83
SHAL/Include/Peripheral/I2C/Reg/SHAL_I2C_REG_L432KC.h
Normal file
@@ -0,0 +1,83 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 10/8/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#ifndef SHMINGO_HAL_SHAL_I2C_REG_L432KC_H
|
||||||
|
#define SHMINGO_HAL_SHAL_I2C_REG_L432KC_H
|
||||||
|
|
||||||
|
#include "SHAL_CORE.h"
|
||||||
|
#include "SHAL_I2C_TYPES.h"
|
||||||
|
|
||||||
|
#define NUM_I2C_BUSES 3
|
||||||
|
|
||||||
|
enum class I2C_Pair : uint8_t{
|
||||||
|
//I2C_1
|
||||||
|
SCL1A9_SDA1A10, //AF4
|
||||||
|
SCL1B6_SDA1B7, //AF4
|
||||||
|
|
||||||
|
//I2C_3
|
||||||
|
SCL3A7_SDA3B4, //AF4
|
||||||
|
|
||||||
|
NUM_PAIRS,
|
||||||
|
INVALID
|
||||||
|
};
|
||||||
|
|
||||||
|
constexpr SHAL_I2C_Pair getI2CPair(const I2C_Pair pair){
|
||||||
|
switch(pair){
|
||||||
|
case I2C_Pair::SCL1A9_SDA1A10: return {I2C1,GPIO_Key::A9,GPIO_Key::A10,GPIO_Alternate_Function::AF4,GPIO_Alternate_Function::AF4};
|
||||||
|
case I2C_Pair::SCL1B6_SDA1B7: return {I2C1,GPIO_Key::B6,GPIO_Key::B7,GPIO_Alternate_Function::AF4,GPIO_Alternate_Function::AF4};
|
||||||
|
case I2C_Pair::SCL3A7_SDA3B4: return {I2C3,GPIO_Key::A7,GPIO_Key::B4,GPIO_Alternate_Function::AF4,GPIO_Alternate_Function::AF4};
|
||||||
|
case I2C_Pair::INVALID:
|
||||||
|
assert(false);
|
||||||
|
return {nullptr,GPIO_Key::INVALID,GPIO_Key::INVALID,GPIO_Alternate_Function::AF0,GPIO_Alternate_Function::AF0};
|
||||||
|
}
|
||||||
|
__builtin_unreachable();
|
||||||
|
}
|
||||||
|
|
||||||
|
constexpr SHAL_I2C_Enable_Reg getI2CEnableReg(const I2C_Pair pair){
|
||||||
|
switch(pair){
|
||||||
|
case I2C_Pair::SCL1A9_SDA1A10:
|
||||||
|
case I2C_Pair::SCL1B6_SDA1B7:
|
||||||
|
return {&RCC->APB1ENR1,RCC_APB1ENR1_I2C1EN};
|
||||||
|
case I2C_Pair::SCL3A7_SDA3B4:
|
||||||
|
return {&RCC->APB1ENR1,RCC_APB1ENR1_I2C3EN};
|
||||||
|
case I2C_Pair::NUM_PAIRS:
|
||||||
|
case I2C_Pair::INVALID:
|
||||||
|
assert(false);
|
||||||
|
return {nullptr, 0};
|
||||||
|
}
|
||||||
|
__builtin_unreachable();
|
||||||
|
}
|
||||||
|
|
||||||
|
constexpr SHAL_I2C_Reset_Reg getI2CResetReg(const I2C_Pair pair){
|
||||||
|
switch(pair){
|
||||||
|
case I2C_Pair::SCL1A9_SDA1A10:
|
||||||
|
case I2C_Pair::SCL1B6_SDA1B7:
|
||||||
|
return {&RCC->APB1RSTR1,RCC_APB1RSTR1_I2C1RST};
|
||||||
|
case I2C_Pair::SCL3A7_SDA3B4:
|
||||||
|
return {&RCC->APB1RSTR1,RCC_APB1RSTR1_I2C3RST};
|
||||||
|
case I2C_Pair::NUM_PAIRS:
|
||||||
|
case I2C_Pair::INVALID:
|
||||||
|
assert(false);
|
||||||
|
return {nullptr, 0};
|
||||||
|
}
|
||||||
|
__builtin_unreachable();
|
||||||
|
}
|
||||||
|
|
||||||
|
//Gets all the bits in the I2C timer register, these values should rarely be manually set, but I wanted to support it anyway
|
||||||
|
constexpr SHAL_I2C_Timing_Reg getI2CTimerReg(const I2C_Pair pair){
|
||||||
|
switch(pair){
|
||||||
|
case I2C_Pair::SCL1A9_SDA1A10:
|
||||||
|
case I2C_Pair::SCL1B6_SDA1B7:
|
||||||
|
return {&I2C1->TIMINGR,31,23,19,15,7};
|
||||||
|
case I2C_Pair::SCL3A7_SDA3B4:
|
||||||
|
return {&I2C3->TIMINGR,31,23,19,15,7};
|
||||||
|
case I2C_Pair::NUM_PAIRS:
|
||||||
|
case I2C_Pair::INVALID:
|
||||||
|
assert(false);
|
||||||
|
__builtin_unreachable();
|
||||||
|
}
|
||||||
|
__builtin_unreachable();
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif //SHMINGO_HAL_SHAL_I2C_REG_L432KC_H
|
||||||
75
SHAL/Include/Peripheral/I2C/SHAL_I2C.h
Normal file
75
SHAL/Include/Peripheral/I2C/SHAL_I2C.h
Normal file
@@ -0,0 +1,75 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 9/9/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#ifndef SHMINGO_HAL_SHAL_I2C_H
|
||||||
|
#define SHMINGO_HAL_SHAL_I2C_H
|
||||||
|
|
||||||
|
#include <cstdio>
|
||||||
|
|
||||||
|
#include "SHAL_CORE.h"
|
||||||
|
#include "SHAL_I2C_REG.h"
|
||||||
|
|
||||||
|
|
||||||
|
class SHAL_I2C{
|
||||||
|
|
||||||
|
friend class I2CManager;
|
||||||
|
|
||||||
|
public:
|
||||||
|
|
||||||
|
void init(I2C_Pair pair) volatile;
|
||||||
|
|
||||||
|
/// General I2C function to send commands to a device, then read back any returned data if necessary
|
||||||
|
/// \param addr address of slave device
|
||||||
|
/// \param writeData pointer to array of write commands
|
||||||
|
/// \param writeLen number of write commands
|
||||||
|
/// \param readData pointer to buffer to write received data to
|
||||||
|
/// \param readLen number of bytes to be read
|
||||||
|
void masterWriteRead(uint8_t addr,const uint8_t* writeData, size_t writeLen, uint8_t* readData, size_t readLen);
|
||||||
|
|
||||||
|
uint8_t masterWriteReadByte(uint8_t addr, const uint8_t* writeData, size_t writeLen);
|
||||||
|
|
||||||
|
/// Function to write an array of commands to an I2C device
|
||||||
|
/// \param addr Address of slave device
|
||||||
|
/// \param writeData Pointer to array of commands
|
||||||
|
/// \param writeLen Number of commands
|
||||||
|
void masterWrite(uint8_t addr, const uint8_t* writeData, uint8_t writeLen);
|
||||||
|
|
||||||
|
/// Function to read bytes from an I2C device
|
||||||
|
/// \param addr Address of slave device
|
||||||
|
/// \param readBuffer Pointer to buffer where data will be placed
|
||||||
|
/// \param bytesToRead Number of bytes to read
|
||||||
|
void masterRead(uint8_t addr, uint8_t* readBuffer, uint8_t bytesToRead);
|
||||||
|
|
||||||
|
|
||||||
|
//Manually set the clock configuration. Refer to your MCU's reference manual for examples
|
||||||
|
void setClockConfig(uint8_t prescaler, uint8_t dataSetupTime, uint8_t dataHoldTime, uint8_t SCLHighPeriod, uint8_t SCLLowPeriod);
|
||||||
|
|
||||||
|
//Set clock configuration based on a value calculated from STM32CubeMX, or other similar tools
|
||||||
|
void setClockConfig(uint32_t configuration);
|
||||||
|
|
||||||
|
private:
|
||||||
|
|
||||||
|
SHAL_I2C() = default;
|
||||||
|
|
||||||
|
I2C_Pair m_I2CPair = I2C_Pair::INVALID; //Initialize to invalid
|
||||||
|
|
||||||
|
};
|
||||||
|
|
||||||
|
#define I2C(num) I2CManager::get(num)
|
||||||
|
|
||||||
|
class I2CManager{
|
||||||
|
|
||||||
|
public:
|
||||||
|
|
||||||
|
static SHAL_I2C& get(uint8_t i2c);
|
||||||
|
|
||||||
|
I2CManager() = delete;
|
||||||
|
|
||||||
|
private:
|
||||||
|
|
||||||
|
inline static SHAL_I2C m_I2CBuses[NUM_I2C_BUSES] = {};
|
||||||
|
|
||||||
|
};
|
||||||
|
|
||||||
|
#endif //SHMINGO_HAL_SHAL_I2C_H
|
||||||
93
SHAL/Include/Peripheral/I2C/SHAL_I2C_REG.h
Normal file
93
SHAL/Include/Peripheral/I2C/SHAL_I2C_REG.h
Normal file
@@ -0,0 +1,93 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 9/9/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#ifndef SHAL_I2C_REG_H
|
||||||
|
#define SHAL_I2C_REG_H
|
||||||
|
|
||||||
|
#if defined(STM32F030x6)
|
||||||
|
#include "stm32f030x6.h"
|
||||||
|
#elif defined(STM32F030x8)
|
||||||
|
#include "stm32f030x8.h"
|
||||||
|
#elif defined(STM32F031x6)
|
||||||
|
#include "stm32f031x6.h"
|
||||||
|
#elif defined(STM32F038xx)
|
||||||
|
#include "stm32f038xx.h"
|
||||||
|
#elif defined(STM32F042x6)
|
||||||
|
#include "stm32f042x6.h"
|
||||||
|
#elif defined(STM32F048xx)
|
||||||
|
#include "stm32f048xx.h"
|
||||||
|
#elif defined(STM32F051x8)
|
||||||
|
#include "stm32f051x8.h"
|
||||||
|
#elif defined(STM32F058xx)
|
||||||
|
#include "stm32f058xx.h"
|
||||||
|
#elif defined(STM32F070x6)
|
||||||
|
#include "stm32f070x6.h"
|
||||||
|
#elif defined(STM32F070xB)
|
||||||
|
#include "stm32f070xb.h"
|
||||||
|
#elif defined(STM32F071xB)
|
||||||
|
#include "stm32f071xb.h"
|
||||||
|
#elif defined(STM32F072xB)
|
||||||
|
#include "SHAL_I2C_REG_F072xB.h"
|
||||||
|
#elif defined(STM32F078xx)
|
||||||
|
#include "stm32f078xx.h"
|
||||||
|
#elif defined(STM32F091xC)
|
||||||
|
#include "stm32f091xc.h"
|
||||||
|
#elif defined(STM32F098xx)
|
||||||
|
#include "stm32f098xx.h"
|
||||||
|
#elif defined(STM32F030xC)
|
||||||
|
#include "stm32f030xc.h"
|
||||||
|
#elif defined(STM32L412xx)
|
||||||
|
#include "stm32l412xx.h"
|
||||||
|
#elif defined(STM32L422xx)
|
||||||
|
#include "stm32l422xx.h"
|
||||||
|
#elif defined(STM32L431xx)
|
||||||
|
#include "stm32l431xx.h"
|
||||||
|
#elif defined(STM32L432xx)
|
||||||
|
#include "SHAL_I2C_REG_L432KC.h"
|
||||||
|
#elif defined(STM32L433xx)
|
||||||
|
#include "stm32l433xx.h"
|
||||||
|
#elif defined(STM32L442xx)
|
||||||
|
#include "stm32l442xx.h"
|
||||||
|
#elif defined(STM32L443xx)
|
||||||
|
#include "stm32l443xx.h"
|
||||||
|
#elif defined(STM32L451xx)
|
||||||
|
#include "stm32l451xx.h"
|
||||||
|
#elif defined(STM32L452xx)
|
||||||
|
#include "stm32l452xx.h"
|
||||||
|
#elif defined(STM32L462xx)
|
||||||
|
#include "stm32l462xx.h"
|
||||||
|
#elif defined(STM32L471xx)
|
||||||
|
#include "stm32l471xx.h"
|
||||||
|
#elif defined(STM32L475xx)
|
||||||
|
#include "stm32l475xx.h"
|
||||||
|
#elif defined(STM32L476xx)
|
||||||
|
#include "stm32l476xx.h"
|
||||||
|
#elif defined(STM32L485xx)
|
||||||
|
#include "stm32l485xx.h"
|
||||||
|
#elif defined(STM32L486xx)
|
||||||
|
#include "stm32l486xx.h"
|
||||||
|
#elif defined(STM32L496xx)
|
||||||
|
#include "stm32l496xx.h"
|
||||||
|
#elif defined(STM32L4A6xx)
|
||||||
|
#include "stm32l4a6xx.h"
|
||||||
|
#elif defined(STM32L4P5xx)
|
||||||
|
#include "stm32l4p5xx.h"
|
||||||
|
#elif defined(STM32L4Q5xx)
|
||||||
|
#include "stm32l4q5xx.h"
|
||||||
|
#elif defined(STM32L4R5xx)
|
||||||
|
#include "stm32l4r5xx.h"
|
||||||
|
#elif defined(STM32L4R7xx)
|
||||||
|
#include "stm32l4r7xx.h"
|
||||||
|
#elif defined(STM32L4R9xx)
|
||||||
|
#include "stm32l4r9xx.h"
|
||||||
|
#elif defined(STM32L4S5xx)
|
||||||
|
#include "stm32l4s5xx.h"
|
||||||
|
#elif defined(STM32L4S7xx)
|
||||||
|
#include "stm32l4s7xx.h"
|
||||||
|
#elif defined(STM32L4S9xx)
|
||||||
|
#else
|
||||||
|
#error "Please select first the target STM32 device used in your application (in stm32f0xx.h file)"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif //SHAL_I2C_REG_H
|
||||||
40
SHAL/Include/Peripheral/I2C/SHAL_I2C_TYPES.h
Normal file
40
SHAL/Include/Peripheral/I2C/SHAL_I2C_TYPES.h
Normal file
@@ -0,0 +1,40 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 9/9/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#ifndef SHMINGO_HAL_SHAL_I2C_TYPES_H
|
||||||
|
#define SHMINGO_HAL_SHAL_I2C_TYPES_H
|
||||||
|
|
||||||
|
#include "SHAL_CORE.h"
|
||||||
|
#include "SHAL_GPIO_REG.h"
|
||||||
|
|
||||||
|
//Information necessary for I2C
|
||||||
|
struct SHAL_I2C_Pair {
|
||||||
|
I2C_TypeDef* I2CReg;
|
||||||
|
GPIO_Key SCL_Key;
|
||||||
|
GPIO_Key SDA_Key;
|
||||||
|
GPIO_Alternate_Function SCL_Mask;
|
||||||
|
GPIO_Alternate_Function SDA_Mask;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct SHAL_I2C_Enable_Reg{
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t mask;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct SHAL_I2C_Reset_Reg{
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t mask;
|
||||||
|
};
|
||||||
|
|
||||||
|
//Manual values for I2C timer register
|
||||||
|
struct SHAL_I2C_Timing_Reg{
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint8_t prescaler_offset;
|
||||||
|
uint8_t dataSetupTime_offset;
|
||||||
|
uint8_t dataHoldTime_offset;
|
||||||
|
uint8_t SCLHighPeriod_offset;
|
||||||
|
uint8_t SCLLowPeriod_offset;
|
||||||
|
};
|
||||||
|
|
||||||
|
#endif //SHMINGO_HAL_SHAL_I2C_TYPES_H
|
||||||
@@ -6,13 +6,14 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef SHAL_TIM_REG_H
|
#ifndef SHAL_TIM_REG_F072XB_H
|
||||||
#define SHAL_TIM_REG_H
|
#define SHAL_TIM_REG_F072XB_H
|
||||||
|
|
||||||
#include <cassert>
|
#include <cassert>
|
||||||
#include <stm32f072xb.h>
|
#include <stm32f072xb.h>
|
||||||
|
|
||||||
#include "SHAL_CORE.h"
|
#include "SHAL_CORE.h"
|
||||||
|
#include "SHAL_TIM_TYPES.h"
|
||||||
|
|
||||||
enum class Timer_Key : uint8_t { //For STM32F072
|
enum class Timer_Key : uint8_t { //For STM32F072
|
||||||
S_TIM1,
|
S_TIM1,
|
||||||
@@ -28,9 +29,20 @@ enum class Timer_Key : uint8_t { //For STM32F072
|
|||||||
S_TIM_INVALID
|
S_TIM_INVALID
|
||||||
};
|
};
|
||||||
|
|
||||||
|
#define SHAL_TIM1 TimerManager::get(Timer_Key::S_TIM1)
|
||||||
|
#define SHAL_TIM2 TimerManager::get(Timer_Key::S_TIM2)
|
||||||
|
#define SHAL_TIM3 TimerManager::get(Timer_Key::S_TIM3)
|
||||||
|
#define SHAL_TIM6 TimerManager::get(Timer_Key::S_TIM6)
|
||||||
|
#define SHAL_TIM7 TimerManager::get(Timer_Key::S_TIM7)
|
||||||
|
#define SHAL_TIM14 TimerManager::get(Timer_Key::S_TIM14)
|
||||||
|
#define SHAL_TIM15 TimerManager::get(Timer_Key::S_TIM15)
|
||||||
|
#define SHAL_TIM16 TimerManager::get(Timer_Key::S_TIM16)
|
||||||
|
#define SHAL_TIM17 TimerManager::get(Timer_Key::S_TIM17)
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
//Get TIMER_KEY peripheral struct including bus register, enable mask, TIMER_KEY mask
|
//Get TIMER_KEY peripheral struct including bus register, enable mask, TIMER_KEY mask
|
||||||
constexpr SHAL_Peripheral_Register getTimerRCC(Timer_Key t) {
|
constexpr TIM_RCC_Enable getTimerRCC(Timer_Key t) {
|
||||||
switch(t) {
|
switch(t) {
|
||||||
case Timer_Key::S_TIM1: return {&RCC->APB2ENR, RCC_APB2ENR_TIM1EN_Pos};
|
case Timer_Key::S_TIM1: return {&RCC->APB2ENR, RCC_APB2ENR_TIM1EN_Pos};
|
||||||
case Timer_Key::S_TIM2: return {&RCC->APB1ENR, RCC_APB1ENR_TIM2EN_Pos};
|
case Timer_Key::S_TIM2: return {&RCC->APB1ENR, RCC_APB1ENR_TIM2EN_Pos};
|
||||||
|
|||||||
205
SHAL/Include/Peripheral/Timer/Reg/SHAL_TIM_REG_L432KC.h
Normal file
205
SHAL/Include/Peripheral/Timer/Reg/SHAL_TIM_REG_L432KC.h
Normal file
@@ -0,0 +1,205 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file SHAL_TIM_REG.h
|
||||||
|
* @author Luca Lizaranzu
|
||||||
|
* @brief Defines universal macros and objects used across all STM32 families
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef SHAL_TIM_REG_L432KC_H
|
||||||
|
#define SHAL_TIM_REG_L432KC_H
|
||||||
|
|
||||||
|
#include <cassert>
|
||||||
|
#include <stm32l432xx.h>
|
||||||
|
|
||||||
|
#include "SHAL_CORE.h"
|
||||||
|
#include "SHAL_TIM_TYPES.h"
|
||||||
|
|
||||||
|
enum class Timer_Key : uint8_t { //For STM32L432
|
||||||
|
S_TIM1,
|
||||||
|
S_TIM2,
|
||||||
|
S_TIM6,
|
||||||
|
S_TIM7,
|
||||||
|
S_TIM15,
|
||||||
|
S_TIM16,
|
||||||
|
NUM_TIMERS,
|
||||||
|
S_TIM_INVALID
|
||||||
|
};
|
||||||
|
|
||||||
|
//Lookup table for timer typedefs
|
||||||
|
static volatile TIM_TypeDef* TIM_TABLE[6] = {
|
||||||
|
TIM1,
|
||||||
|
TIM2,
|
||||||
|
TIM6,
|
||||||
|
TIM7,
|
||||||
|
TIM15,
|
||||||
|
TIM16,
|
||||||
|
};
|
||||||
|
|
||||||
|
static IRQn_Type IRQN_TABLE[6] = {
|
||||||
|
TIM1_TRG_COM_IRQn,
|
||||||
|
TIM2_IRQn,
|
||||||
|
TIM6_DAC_IRQn,
|
||||||
|
TIM7_IRQn,
|
||||||
|
TIM1_BRK_TIM15_IRQn,
|
||||||
|
TIM1_UP_TIM16_IRQn
|
||||||
|
};
|
||||||
|
|
||||||
|
#define SHAL_TIM1 TimerManager::get(Timer_Key::S_TIM1)
|
||||||
|
#define SHAL_TIM2 TimerManager::get(Timer_Key::S_TIM2)
|
||||||
|
#define SHAL_TIM6 TimerManager::get(Timer_Key::S_TIM6)
|
||||||
|
#define SHAL_TIM7 TimerManager::get(Timer_Key::S_TIM7)
|
||||||
|
#define SHAL_TIM15 TimerManager::get(Timer_Key::S_TIM15)
|
||||||
|
#define SHAL_TIM16 TimerManager::get(Timer_Key::S_TIM16)
|
||||||
|
|
||||||
|
|
||||||
|
static inline SHAL_TIM_Status_Register getTimerStatusRegister(Timer_Key key){
|
||||||
|
|
||||||
|
SHAL_TIM_Status_Register res = {nullptr, TIM_SR_UIF};
|
||||||
|
|
||||||
|
volatile TIM_TypeDef* tim = TIM_TABLE[static_cast<uint8_t>(key)];
|
||||||
|
|
||||||
|
res.reg = &tim->SR;
|
||||||
|
return res;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_TIM_Control_Register_1 getTimerControlRegister1(Timer_Key key){
|
||||||
|
|
||||||
|
SHAL_TIM_Control_Register_1 res = {nullptr, TIM_CR1_CEN_Msk,
|
||||||
|
TIM_CR1_UDIS,
|
||||||
|
TIM_CR1_OPM,
|
||||||
|
TIM_CR1_CMS_Pos,
|
||||||
|
TIM_CR1_ARPE};
|
||||||
|
|
||||||
|
volatile TIM_TypeDef* tim = TIM_TABLE[static_cast<uint8_t>(key)];
|
||||||
|
|
||||||
|
res.reg = &tim->CR1;
|
||||||
|
return res;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_TIM_DMA_Interrupt_Enable_Register getTimerDMAInterruptEnableRegister(Timer_Key key){
|
||||||
|
|
||||||
|
SHAL_TIM_DMA_Interrupt_Enable_Register res = {nullptr, TIM_DIER_UIE};
|
||||||
|
|
||||||
|
volatile TIM_TypeDef* tim = TIM_TABLE[static_cast<uint8_t>(key)];
|
||||||
|
|
||||||
|
res.reg = &tim->DIER;
|
||||||
|
return res;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_TIM_Event_Generation_Register getTimerEventGenerationRegister(Timer_Key key){
|
||||||
|
|
||||||
|
SHAL_TIM_Event_Generation_Register res = {nullptr, TIM_EGR_UG};
|
||||||
|
|
||||||
|
volatile TIM_TypeDef* tim = TIM_TABLE[static_cast<uint8_t>(key)];
|
||||||
|
|
||||||
|
res.reg = &tim->EGR;
|
||||||
|
return res;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_TIM_Prescaler_Register getTimerPrescalerRegister(Timer_Key key){
|
||||||
|
|
||||||
|
SHAL_TIM_Prescaler_Register res = {nullptr, 1UL << 15};
|
||||||
|
|
||||||
|
volatile TIM_TypeDef* tim = TIM_TABLE[static_cast<uint8_t>(key)];
|
||||||
|
|
||||||
|
res.reg = &tim->PSC;
|
||||||
|
return res;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_TIM_Auto_Reload_Register getTimerAutoReloadRegister(Timer_Key key){
|
||||||
|
|
||||||
|
SHAL_TIM_Auto_Reload_Register res = {nullptr, 1UL << 15};
|
||||||
|
|
||||||
|
volatile TIM_TypeDef* tim = TIM_TABLE[static_cast<uint8_t>(key)];
|
||||||
|
|
||||||
|
res.reg = &tim->ARR;
|
||||||
|
return res;
|
||||||
|
}
|
||||||
|
|
||||||
|
//Get TIMER_KEY peripheral struct including bus register, enable mask, TIMER_KEY mask
|
||||||
|
static inline SHAL_TIM_RCC_Register getTimerRCC(Timer_Key t) {
|
||||||
|
switch(t) {
|
||||||
|
case Timer_Key::S_TIM1: return {&RCC->APB2ENR, RCC_APB2ENR_TIM1EN};
|
||||||
|
case Timer_Key::S_TIM2: return {&RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN};
|
||||||
|
case Timer_Key::S_TIM6: return {&RCC->APB1ENR1, RCC_APB1ENR1_TIM6EN};
|
||||||
|
case Timer_Key::S_TIM7: return {&RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN};
|
||||||
|
case Timer_Key::S_TIM15: return {&RCC->APB2ENR, RCC_APB2ENR_TIM15EN};
|
||||||
|
case Timer_Key::S_TIM16: return {&RCC->APB2ENR, RCC_APB2ENR_TIM16EN};
|
||||||
|
case Timer_Key::NUM_TIMERS:
|
||||||
|
case Timer_Key::S_TIM_INVALID:
|
||||||
|
assert(false);
|
||||||
|
}
|
||||||
|
|
||||||
|
__builtin_unreachable();
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_TIM_Capture_Compare_Mode_Registers_Input getTimerCaptureCompareModeRegisters(Timer_Key key){
|
||||||
|
SHAL_TIM_Capture_Compare_Mode_Registers_Input res = {{nullptr,
|
||||||
|
nullptr},
|
||||||
|
TIM_CCMR1_CC1S_Pos,
|
||||||
|
TIM_CCMR1_IC1PSC_Pos,
|
||||||
|
TIM_CCMR1_IC1F_Pos,
|
||||||
|
TIM_CCMR1_CC2S_Pos,
|
||||||
|
TIM_CCMR1_IC2PSC_Pos,
|
||||||
|
TIM_CCMR1_IC2F_Pos
|
||||||
|
};
|
||||||
|
|
||||||
|
volatile TIM_TypeDef* tim = TIM_TABLE[static_cast<uint8_t>(key)];
|
||||||
|
|
||||||
|
res.regs[0] = &tim->CCMR1;
|
||||||
|
res.regs[1] = &tim->CCMR2;
|
||||||
|
|
||||||
|
return res;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_TIM_Capture_Compare_Mode_Registers_Output
|
||||||
|
getTimerCaptureCompareModeRegistersOutput(Timer_Key key) {
|
||||||
|
SHAL_TIM_Capture_Compare_Mode_Registers_Output res = {
|
||||||
|
{nullptr, nullptr},
|
||||||
|
TIM_CCMR1_CC1S_Pos, //Channel 1 Capture/Compare selection
|
||||||
|
TIM_CCMR1_OC1FE, //Channel 1 Fast enable
|
||||||
|
TIM_CCMR1_OC1PE, //Channel 1 Preload enable
|
||||||
|
TIM_CCMR1_OC1M_Pos, //Channel 1 Mode (OC1M)
|
||||||
|
TIM_CCMR1_OC1CE, //Channel 1 Clear enable
|
||||||
|
TIM_CCMR1_CC2S_Pos, //Channel 2 Capture/Compare selection
|
||||||
|
TIM_CCMR1_OC2FE, //Channel 2 Fast enable
|
||||||
|
TIM_CCMR1_OC2PE, //Channel 2 Preload enable
|
||||||
|
TIM_CCMR1_OC2M_Pos, //Channel 2 Mode (OC2M)
|
||||||
|
TIM_CCMR1_OC2CE //Channel 2 Clear enable
|
||||||
|
};
|
||||||
|
|
||||||
|
volatile TIM_TypeDef* tim = TIM_TABLE[static_cast<uint8_t>(key)];
|
||||||
|
res.regs[0] = &tim->CCMR1;
|
||||||
|
res.regs[1] = &tim->CCMR2;
|
||||||
|
|
||||||
|
return res;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_TIM_Break_Dead_Time_Register getTimerBreakDeadTimeRegister(Timer_Key key){
|
||||||
|
|
||||||
|
SHAL_TIM_Break_Dead_Time_Register res = {nullptr, TIM_BDTR_MOE};
|
||||||
|
|
||||||
|
volatile TIM_TypeDef* tim = TIM_TABLE[static_cast<uint8_t>(key)];
|
||||||
|
|
||||||
|
res.reg = &tim->BDTR;
|
||||||
|
return res;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_TIM_Capture_Compare_Enable_Register getTimerCaptureCompareEnableRegister(Timer_Key key){
|
||||||
|
volatile TIM_TypeDef* tim = TIM_TABLE[static_cast<uint8_t>(key)];
|
||||||
|
return {&tim->CCER};
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_TIM_Capture_Compare_Register getTimerCaptureCompareRegister(Timer_Key key){
|
||||||
|
volatile TIM_TypeDef* tim = TIM_TABLE[static_cast<uint8_t>(key)];
|
||||||
|
return {&tim->CCR2};
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
//Get timer IRQN from lookup table
|
||||||
|
static inline IRQn_Type getTimerIRQn(Timer_Key t) {
|
||||||
|
return IRQN_TABLE[static_cast<uint8_t>(t)];
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif
|
||||||
@@ -9,7 +9,7 @@
|
|||||||
#ifndef SHAL_TIM_H
|
#ifndef SHAL_TIM_H
|
||||||
#define SHAL_TIM_H
|
#define SHAL_TIM_H
|
||||||
|
|
||||||
#include "SHAL_TIM_REG_F072xB.h"
|
#include "SHAL_TIM_REG.h"
|
||||||
#include "SHAL_TIM_CALLBACK.h"
|
#include "SHAL_TIM_CALLBACK.h"
|
||||||
|
|
||||||
#include <array>
|
#include <array>
|
||||||
@@ -18,6 +18,11 @@ class Timer {
|
|||||||
friend class TimerManager;
|
friend class TimerManager;
|
||||||
public:
|
public:
|
||||||
|
|
||||||
|
/// Initializes a timer
|
||||||
|
/// \param prescaler The amount of times the base clock has to cycle before the timer adds one to the count
|
||||||
|
/// \param autoReload The number of timer counts before the count is reset and IRQ is called
|
||||||
|
void init(uint16_t prescaler, uint16_t autoReload);
|
||||||
|
|
||||||
//Starts the counter
|
//Starts the counter
|
||||||
void start();
|
void start();
|
||||||
|
|
||||||
@@ -33,9 +38,15 @@ public:
|
|||||||
//Enable interrupts
|
//Enable interrupts
|
||||||
void enableInterrupt();
|
void enableInterrupt();
|
||||||
|
|
||||||
|
void setPWMMode(SHAL_Timer_Channel channel, SHAL_TIM_Output_Compare_Mode outputCompareMode, SHAL_Timer_Channel_Main_Output_Mode mainOutputMode, SHAL_Timer_Channel_Complimentary_Output_Mode complimentaryOutputMode);
|
||||||
|
|
||||||
|
/// Set the duty cycle for PWM
|
||||||
|
/// \param dutyCycle 10 * percentage (e.g. 500 = 50%)
|
||||||
|
void setPWMDutyCycle(uint32_t dutyCycle);
|
||||||
|
|
||||||
//Set TIMER_KEY IRQ callback function
|
//Set TIMER_KEY IRQ callback function
|
||||||
void setCallbackFunc(TimerCallback callback){
|
void setCallbackFunc(TimerCallback callback){
|
||||||
registerTimerCallback(TIMER_KEY, callback);
|
registerTimerCallback(m_key, callback);
|
||||||
}
|
}
|
||||||
|
|
||||||
private:
|
private:
|
||||||
@@ -43,18 +54,23 @@ private:
|
|||||||
explicit Timer(Timer_Key t);
|
explicit Timer(Timer_Key t);
|
||||||
Timer();
|
Timer();
|
||||||
|
|
||||||
Timer_Key TIMER_KEY;
|
Timer_Key m_key;
|
||||||
|
|
||||||
|
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
#define getTimer(timer_key) TimerManager::get(timer_key)
|
#define getTimer(timer_key) TimerManager::get(timer_key)
|
||||||
|
#define TIM(num) TimerManager::getTimerFromIndex(num)
|
||||||
|
|
||||||
//Manages all timers so user does not have to personally initialize
|
//Manages all timers so user does not have to personally initialize
|
||||||
class TimerManager{
|
class TimerManager{
|
||||||
public:
|
public:
|
||||||
|
|
||||||
static Timer& get(Timer_Key);
|
static Timer& get(Timer_Key);
|
||||||
|
|
||||||
|
static Timer& getTimerFromIndex(uint8_t index){return timers[index];}
|
||||||
|
|
||||||
TimerManager() = delete;
|
TimerManager() = delete;
|
||||||
|
|
||||||
private:
|
private:
|
||||||
|
|||||||
@@ -7,16 +7,18 @@
|
|||||||
******************************************************************************
|
******************************************************************************
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef SHMINGO_HAL_SHAL_TIM_CALLBACK_H
|
#ifndef SHAL_TIM_CALLBACK_H
|
||||||
#define SHMINGO_HAL_SHAL_TIM_CALLBACK_H
|
#define SHAL_TIM_CALLBACK_H
|
||||||
|
|
||||||
|
#include "SHAL_CORE.h"
|
||||||
|
#include "SHAL_TIM_REG.h"
|
||||||
|
|
||||||
#include "SHAL/Include/Core/SHAL_CORE.h"
|
|
||||||
|
|
||||||
#define DEFINE_TIMER_IRQ(key, irq_handler) \
|
#define DEFINE_TIMER_IRQ(key, irq_handler) \
|
||||||
extern "C" void irq_handler(void) { \
|
extern "C" void irq_handler(void) { \
|
||||||
auto tim_reg = getTimerRegister(key); \
|
auto tim_status_reg = getTimerStatusRegister(key); \
|
||||||
if (tim_reg->SR & TIM_SR_UIF) { \
|
if (*tim_status_reg.reg & tim_status_reg.update_interrupt_flag_mask) { \
|
||||||
tim_reg->SR &= ~TIM_SR_UIF; /* clear flag */ \
|
SHAL_clear_bitmask(tim_status_reg.reg,tim_status_reg.update_interrupt_flag_mask); /* clear flag */ \
|
||||||
auto cb = timer_callbacks[static_cast<int>(key)]; \
|
auto cb = timer_callbacks[static_cast<int>(key)]; \
|
||||||
if (cb) cb(); \
|
if (cb) cb(); \
|
||||||
}; \
|
}; \
|
||||||
|
|||||||
95
SHAL/Include/Peripheral/Timer/SHAL_TIM_REG.h
Normal file
95
SHAL/Include/Peripheral/Timer/SHAL_TIM_REG.h
Normal file
@@ -0,0 +1,95 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 9/7/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#ifndef SHAL_TIM_REG_H
|
||||||
|
#define SHAL_TIM_REG_H
|
||||||
|
|
||||||
|
#if defined(STM32F030x6)
|
||||||
|
#include "stm32f030x6.h"
|
||||||
|
#elif defined(STM32F030x8)
|
||||||
|
#include "stm32f030x8.h"
|
||||||
|
#elif defined(STM32F031x6)
|
||||||
|
#include "stm32f031x6.h"
|
||||||
|
#elif defined(STM32F038xx)
|
||||||
|
#include "stm32f038xx.h"
|
||||||
|
#elif defined(STM32F042x6)
|
||||||
|
#include "stm32f042x6.h"
|
||||||
|
#elif defined(STM32F048xx)
|
||||||
|
#include "stm32f048xx.h"
|
||||||
|
#elif defined(STM32F051x8)
|
||||||
|
#include "stm32f051x8.h"
|
||||||
|
#elif defined(STM32F058xx)
|
||||||
|
#include "stm32f058xx.h"
|
||||||
|
#elif defined(STM32F070x6)
|
||||||
|
#include "stm32f070x6.h"
|
||||||
|
#elif defined(STM32F070xB)
|
||||||
|
#include "stm32f070xb.h"
|
||||||
|
#elif defined(STM32F071xB)
|
||||||
|
#include "stm32f071xb.h"
|
||||||
|
#elif defined(STM32F072xB)
|
||||||
|
#include "SHAL_TIM_REG_F072xB.h"
|
||||||
|
#elif defined(STM32F078xx)
|
||||||
|
#include "stm32f078xx.h"
|
||||||
|
#elif defined(STM32F091xC)
|
||||||
|
#include "stm32f091xc.h"
|
||||||
|
#elif defined(STM32F098xx)
|
||||||
|
#include "stm32f098xx.h"
|
||||||
|
#elif defined(STM32F030xC)
|
||||||
|
#include "stm32f030xc.h"
|
||||||
|
#elif defined(STM32F030xC)
|
||||||
|
#include "stm32f030xc.h"
|
||||||
|
#elif defined(STM32L412xx)
|
||||||
|
#include "stm32l412xx.h"
|
||||||
|
#elif defined(STM32L422xx)
|
||||||
|
#include "stm32l422xx.h"
|
||||||
|
#elif defined(STM32L431xx)
|
||||||
|
#include "stm32l431xx.h"
|
||||||
|
#elif defined(STM32L432xx)
|
||||||
|
#include "SHAL_TIM_REG_L432KC.h"
|
||||||
|
#elif defined(STM32L433xx)
|
||||||
|
#include "stm32l433xx.h"
|
||||||
|
#elif defined(STM32L442xx)
|
||||||
|
#include "stm32l442xx.h"
|
||||||
|
#elif defined(STM32L443xx)
|
||||||
|
#include "stm32l443xx.h"
|
||||||
|
#elif defined(STM32L451xx)
|
||||||
|
#include "stm32l451xx.h"
|
||||||
|
#elif defined(STM32L452xx)
|
||||||
|
#include "stm32l452xx.h"
|
||||||
|
#elif defined(STM32L462xx)
|
||||||
|
#include "stm32l462xx.h"
|
||||||
|
#elif defined(STM32L471xx)
|
||||||
|
#include "stm32l471xx.h"
|
||||||
|
#elif defined(STM32L475xx)
|
||||||
|
#include "stm32l475xx.h"
|
||||||
|
#elif defined(STM32L476xx)
|
||||||
|
#include "stm32l476xx.h"
|
||||||
|
#elif defined(STM32L485xx)
|
||||||
|
#include "stm32l485xx.h"
|
||||||
|
#elif defined(STM32L486xx)
|
||||||
|
#include "stm32l486xx.h"
|
||||||
|
#elif defined(STM32L496xx)
|
||||||
|
#include "stm32l496xx.h"
|
||||||
|
#elif defined(STM32L4A6xx)
|
||||||
|
#include "stm32l4a6xx.h"
|
||||||
|
#elif defined(STM32L4P5xx)
|
||||||
|
#include "stm32l4p5xx.h"
|
||||||
|
#elif defined(STM32L4Q5xx)
|
||||||
|
#include "stm32l4q5xx.h"
|
||||||
|
#elif defined(STM32L4R5xx)
|
||||||
|
#include "stm32l4r5xx.h"
|
||||||
|
#elif defined(STM32L4R7xx)
|
||||||
|
#include "stm32l4r7xx.h"
|
||||||
|
#elif defined(STM32L4R9xx)
|
||||||
|
#include "stm32l4r9xx.h"
|
||||||
|
#elif defined(STM32L4S5xx)
|
||||||
|
#include "stm32l4s5xx.h"
|
||||||
|
#elif defined(STM32L4S7xx)
|
||||||
|
#include "stm32l4s7xx.h"
|
||||||
|
#elif defined(STM32L4S9xx)
|
||||||
|
#else
|
||||||
|
#error "Please select first the target STM32F0xx device used in your application (in stm32f0xx.h file)"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif //SHAL_TIM_REG_H
|
||||||
126
SHAL/Include/Peripheral/Timer/SHAL_TIM_TYPES.h
Normal file
126
SHAL/Include/Peripheral/Timer/SHAL_TIM_TYPES.h
Normal file
@@ -0,0 +1,126 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 9/7/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#ifndef SHAL_TIM_TYPES_H
|
||||||
|
#define SHAL_TIM_TYPES_H
|
||||||
|
|
||||||
|
#include "SHAL_CORE.h"
|
||||||
|
|
||||||
|
struct SHAL_TIM_RCC_Register{
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t enable_mask;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct SHAL_TIM_Control_Register_1 {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t counter_enable_mask;
|
||||||
|
uint32_t update_disable_mask;
|
||||||
|
uint32_t one_pulse_mode_mask;
|
||||||
|
uint32_t center_align_mode_offset;
|
||||||
|
uint32_t auto_reload_preload_enable_mask;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct SHAL_TIM_DMA_Interrupt_Enable_Register {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t update_interrupt_enable_mask;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct SHAL_TIM_Status_Register {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t update_interrupt_flag_mask;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct SHAL_TIM_Event_Generation_Register {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t update_generation_mask;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct SHAL_TIM_Prescaler_Register {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t offset;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct SHAL_TIM_Auto_Reload_Register {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t offset;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct SHAL_TIM_Capture_Compare_Mode_Registers_Input {
|
||||||
|
volatile uint32_t* regs[2];
|
||||||
|
uint32_t input_capture_1_filter_offset;
|
||||||
|
uint32_t input_capture_1_prescaler_offset;
|
||||||
|
uint32_t capture_compare_1_selection_offset;
|
||||||
|
uint32_t input_capture_2_filter_offset;
|
||||||
|
uint32_t input_capture_2_prescaler_offset;
|
||||||
|
uint32_t capture_compare_2_selection_offset;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct SHAL_TIM_Capture_Compare_Mode_Registers_Output {
|
||||||
|
volatile uint32_t* regs[2];
|
||||||
|
uint32_t capture_compare_1_selection_offset;
|
||||||
|
uint32_t output_compare_1_fast_enable_mask;
|
||||||
|
uint32_t output_compare_1_preload_enable_mask;
|
||||||
|
uint32_t output_compare_1_mode_offset;
|
||||||
|
uint32_t output_compare_1_clear_enable_mask;
|
||||||
|
uint32_t capture_compare_2_selection_offset;
|
||||||
|
uint32_t output_compare_2_fast_enable_mask;
|
||||||
|
uint32_t output_compare_2_preload_enable_mask;
|
||||||
|
uint32_t output_compare_2_mode_offset;
|
||||||
|
uint32_t output_compare_2_clear_enable_mask;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct SHAL_TIM_Break_Dead_Time_Register {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t main_output_enable_mask;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct SHAL_TIM_Capture_Compare_Enable_Register {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct SHAL_TIM_Capture_Compare_Register {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
enum class SHAL_TIM_Output_Compare_Mode : uint8_t {
|
||||||
|
Frozen = 0b000, //Output compare frozen
|
||||||
|
ActiveOnMatch = 0b001, //Set output to active level on match
|
||||||
|
InactiveOnMatch = 0b010, //Set output to inactive level on match
|
||||||
|
Toggle = 0b011, //Toggle output on match
|
||||||
|
ForceInactive = 0b100, //Force output to inactive
|
||||||
|
ForceActive = 0b101, //Force output to active
|
||||||
|
PWMMode1 = 0b110, //PWM mode 1 (active until compare match)
|
||||||
|
PWMMode2 = 0b111, //PWM mode 2 (inactive until compare match)
|
||||||
|
};
|
||||||
|
|
||||||
|
enum class SHAL_TIM_Output_Compare_Preload : uint8_t {
|
||||||
|
Disabled = 0b0, //CCRx register is updated immediately
|
||||||
|
Enabled = 0b1, //CCRx register is buffered; updated on update event (UEV)
|
||||||
|
};
|
||||||
|
|
||||||
|
enum class SHAL_Timer_Channel : uint8_t { //TODO change if other timers have fewer than 6 channels
|
||||||
|
CH1 = 0,
|
||||||
|
CH2 = 1,
|
||||||
|
CH3 = 2,
|
||||||
|
CH4 = 3,
|
||||||
|
CH5 = 4,
|
||||||
|
CH6 = 5,
|
||||||
|
};
|
||||||
|
|
||||||
|
enum class SHAL_Timer_Channel_Main_Output_Mode : uint8_t {
|
||||||
|
Disabled = 0b00,
|
||||||
|
Polarity_Normal = 0b01,
|
||||||
|
Polarity_Reversed = 0b11,
|
||||||
|
};
|
||||||
|
|
||||||
|
enum class SHAL_Timer_Channel_Complimentary_Output_Mode : uint8_t {
|
||||||
|
Disabled = 0b00,
|
||||||
|
Polarity_Normal = 0b01,
|
||||||
|
Polarity_Reversed = 0b11,
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
|
#endif //SHAL_TIM_TYPES_H
|
||||||
123
SHAL/Include/Peripheral/UART/Reg/SHAL_UART_REG_F072xB.h
Normal file
123
SHAL/Include/Peripheral/UART/Reg/SHAL_UART_REG_F072xB.h
Normal file
@@ -0,0 +1,123 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 9/7/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#ifndef SHAL_UART_REG_F072XB_H
|
||||||
|
#define SHAL_UART_REG_F072XB_H
|
||||||
|
|
||||||
|
#include <stm32f072xb.h>
|
||||||
|
#include <cassert>
|
||||||
|
|
||||||
|
#include "SHAL_UART_TYPES.h"
|
||||||
|
|
||||||
|
#define NUM_USART_LINES 4
|
||||||
|
|
||||||
|
#define SHAL_UART1 UART(1)
|
||||||
|
#define SHAL_UART2 UART(2)
|
||||||
|
#define SHAL_UART3 UART(3)
|
||||||
|
#define SHAL_UART4 UART(4)
|
||||||
|
|
||||||
|
//Valid usart Tx and Rx pairings for STM32F072
|
||||||
|
enum class UART_Pair_Key : uint8_t{
|
||||||
|
//UART1
|
||||||
|
Tx1A9_Rx1A10,
|
||||||
|
Tx1B6_Rx1B7,
|
||||||
|
|
||||||
|
//UART2
|
||||||
|
Tx2A2_Rx2A3,
|
||||||
|
Tx2A14_Rx2A15,
|
||||||
|
|
||||||
|
//UART3
|
||||||
|
Tx3B10_Rx3B11,
|
||||||
|
Tx3C4_Rx3C5,
|
||||||
|
Tx3C10_Rx3C11,
|
||||||
|
|
||||||
|
//UART4
|
||||||
|
Tx4A0_Rx4A1,
|
||||||
|
Tx4C10_Rx4C11,
|
||||||
|
|
||||||
|
NUM_PAIRS,
|
||||||
|
INVALID
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
|
constexpr SHAL_UART_Pair getUARTPair(const UART_Pair_Key pair){
|
||||||
|
switch(pair){
|
||||||
|
case UART_Pair_Key::Tx1A9_Rx1A10: return {USART1, GPIO_Key::A9, GPIO_Key::A10, GPIO_Alternate_Function::AF1, GPIO_Alternate_Function::AF1};
|
||||||
|
case UART_Pair_Key::Tx1B6_Rx1B7: return {USART1, GPIO_Key::B6, GPIO_Key::B7, GPIO_Alternate_Function::AF0, GPIO_Alternate_Function::AF0};
|
||||||
|
case UART_Pair_Key::Tx2A2_Rx2A3: return {USART2, GPIO_Key::A2, GPIO_Key::A3, GPIO_Alternate_Function::AF1, GPIO_Alternate_Function::AF1};
|
||||||
|
case UART_Pair_Key::Tx2A14_Rx2A15: return {USART2, GPIO_Key::A14, GPIO_Key::A15, GPIO_Alternate_Function::AF1, GPIO_Alternate_Function::AF1};
|
||||||
|
case UART_Pair_Key::Tx3B10_Rx3B11: return {USART3, GPIO_Key::B10, GPIO_Key::B11, GPIO_Alternate_Function::AF4, GPIO_Alternate_Function::AF4};
|
||||||
|
case UART_Pair_Key::Tx3C4_Rx3C5: return {USART3, GPIO_Key::C4, GPIO_Key::C5, GPIO_Alternate_Function::AF1, GPIO_Alternate_Function::AF1};
|
||||||
|
case UART_Pair_Key::Tx3C10_Rx3C11: return {USART3, GPIO_Key::C10, GPIO_Key::C11, GPIO_Alternate_Function::AF1, GPIO_Alternate_Function::AF1};
|
||||||
|
case UART_Pair_Key::Tx4A0_Rx4A1: return {USART4, GPIO_Key::A0, GPIO_Key::A1, GPIO_Alternate_Function::AF4, GPIO_Alternate_Function::AF4};
|
||||||
|
case UART_Pair_Key::Tx4C10_Rx4C11: return {USART4, GPIO_Key::C10, GPIO_Key::C11, GPIO_Alternate_Function::AF0, GPIO_Alternate_Function::AF0};
|
||||||
|
case UART_Pair_Key::NUM_PAIRS:
|
||||||
|
case UART_Pair_Key::INVALID:
|
||||||
|
assert(false);
|
||||||
|
return {nullptr, GPIO_Key::INVALID, GPIO_Key::INVALID, GPIO_Alternate_Function::AF0, GPIO_Alternate_Function::AF0};
|
||||||
|
}
|
||||||
|
__builtin_unreachable();
|
||||||
|
}
|
||||||
|
|
||||||
|
constexpr uint8_t getUARTChannel(const UART_Pair_Key pair){
|
||||||
|
switch(pair){
|
||||||
|
case UART_Pair_Key::Tx1A9_Rx1A10:
|
||||||
|
case UART_Pair_Key::Tx1B6_Rx1B7:
|
||||||
|
return 0;
|
||||||
|
case UART_Pair_Key::Tx2A2_Rx2A3:
|
||||||
|
case UART_Pair_Key::Tx2A14_Rx2A15:
|
||||||
|
return 1;
|
||||||
|
case UART_Pair_Key::Tx3B10_Rx3B11:
|
||||||
|
case UART_Pair_Key::Tx3C4_Rx3C5:
|
||||||
|
case UART_Pair_Key::Tx3C10_Rx3C11:
|
||||||
|
return 2;
|
||||||
|
case UART_Pair_Key::Tx4A0_Rx4A1:
|
||||||
|
case UART_Pair_Key::Tx4C10_Rx4C11:
|
||||||
|
return 3;
|
||||||
|
case UART_Pair_Key::NUM_PAIRS:
|
||||||
|
case UART_Pair_Key::INVALID:
|
||||||
|
assert(false);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
__builtin_unreachable();
|
||||||
|
}
|
||||||
|
|
||||||
|
constexpr SHAL_UART_Enable_Register getUARTEnableReg(const UART_Pair_Key pair){
|
||||||
|
switch(pair){
|
||||||
|
case UART_Pair_Key::Tx1A9_Rx1A10:
|
||||||
|
case UART_Pair_Key::Tx1B6_Rx1B7:
|
||||||
|
return {&RCC->APB2ENR,RCC_APB2ENR_USART1EN};
|
||||||
|
case UART_Pair_Key::Tx2A2_Rx2A3:
|
||||||
|
case UART_Pair_Key::Tx2A14_Rx2A15:
|
||||||
|
return {&RCC->APB1ENR,RCC_APB1ENR_USART2EN};
|
||||||
|
case UART_Pair_Key::Tx3B10_Rx3B11:
|
||||||
|
case UART_Pair_Key::Tx3C4_Rx3C5:
|
||||||
|
case UART_Pair_Key::Tx3C10_Rx3C11:
|
||||||
|
return {&RCC->APB1ENR,RCC_APB1ENR_USART3EN};
|
||||||
|
case UART_Pair_Key::Tx4A0_Rx4A1:
|
||||||
|
case UART_Pair_Key::Tx4C10_Rx4C11:
|
||||||
|
return {&RCC->APB1ENR,RCC_APB1ENR_USART4EN};
|
||||||
|
case UART_Pair_Key::NUM_PAIRS:
|
||||||
|
case UART_Pair_Key::INVALID:
|
||||||
|
assert(false);
|
||||||
|
return {nullptr, 0};
|
||||||
|
}
|
||||||
|
__builtin_unreachable();
|
||||||
|
}
|
||||||
|
|
||||||
|
constexpr uint32_t getAFMask(const GPIO_Alternate_Function mask){
|
||||||
|
switch(mask){
|
||||||
|
case GPIO_Alternate_Function::AF0: return 0x00;
|
||||||
|
case GPIO_Alternate_Function::AF1: return 0x01;
|
||||||
|
case GPIO_Alternate_Function::AF2: return 0x02;
|
||||||
|
case GPIO_Alternate_Function::AF3: return 0x03;
|
||||||
|
case GPIO_Alternate_Function::AF4: return 0x04;
|
||||||
|
case GPIO_Alternate_Function::AF5: return 0x05;
|
||||||
|
case GPIO_Alternate_Function::AF6: return 0x06;
|
||||||
|
case GPIO_Alternate_Function::AF7: return 0x07;
|
||||||
|
}
|
||||||
|
__builtin_unreachable();
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif //SHMINGO_HAL_SHAL_UART_REG_F072XB_H
|
||||||
104
SHAL/Include/Peripheral/UART/Reg/SHAL_UART_REG_L432KC.h
Normal file
104
SHAL/Include/Peripheral/UART/Reg/SHAL_UART_REG_L432KC.h
Normal file
@@ -0,0 +1,104 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 9/7/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#ifndef SHAL_UART_REG_L432KC_H
|
||||||
|
#define SHAL_UART_REG_L432KC_H
|
||||||
|
|
||||||
|
#include <stm32l432xx.h>
|
||||||
|
#include <cassert>
|
||||||
|
|
||||||
|
#include "SHAL_UART_TYPES.h"
|
||||||
|
|
||||||
|
#define NUM_USART_LINES 4
|
||||||
|
|
||||||
|
#define SHAL_UART1 UART(1)
|
||||||
|
#define SHAL_UART2 UART(2)
|
||||||
|
|
||||||
|
|
||||||
|
//Valid usart Tx and Rx pairings for STM32L432KC
|
||||||
|
enum class UART_Pair_Key : uint8_t{
|
||||||
|
//UART1
|
||||||
|
Tx1A9_Rx1A10,
|
||||||
|
Tx1B6_Rx1B7,
|
||||||
|
|
||||||
|
//UART2
|
||||||
|
Tx2A2_Rx2A3,
|
||||||
|
|
||||||
|
NUM_PAIRS,
|
||||||
|
INVALID
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
|
static inline SHAL_UART_Pair getUARTPair(const UART_Pair_Key pair){
|
||||||
|
switch(pair){
|
||||||
|
case UART_Pair_Key::Tx1A9_Rx1A10: return {USART1, GPIO_Key::A9, GPIO_Key::A10, GPIO_Alternate_Function::AF7, GPIO_Alternate_Function::AF7};
|
||||||
|
case UART_Pair_Key::Tx1B6_Rx1B7: return {USART1, GPIO_Key::B6, GPIO_Key::B7, GPIO_Alternate_Function::AF7, GPIO_Alternate_Function::AF7};
|
||||||
|
case UART_Pair_Key::Tx2A2_Rx2A3: return {USART2, GPIO_Key::A2, GPIO_Key::A3, GPIO_Alternate_Function::AF7, GPIO_Alternate_Function::AF7};
|
||||||
|
|
||||||
|
case UART_Pair_Key::NUM_PAIRS:
|
||||||
|
case UART_Pair_Key::INVALID:
|
||||||
|
__builtin_unreachable();
|
||||||
|
}
|
||||||
|
__builtin_unreachable();
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline uint8_t getUARTChannel(const UART_Pair_Key pair){ //TODO remove?
|
||||||
|
switch(pair){
|
||||||
|
case UART_Pair_Key::Tx1A9_Rx1A10:
|
||||||
|
case UART_Pair_Key::Tx1B6_Rx1B7:
|
||||||
|
return 0;
|
||||||
|
case UART_Pair_Key::Tx2A2_Rx2A3:
|
||||||
|
return 1;
|
||||||
|
case UART_Pair_Key::NUM_PAIRS:
|
||||||
|
case UART_Pair_Key::INVALID:
|
||||||
|
assert(false);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
__builtin_unreachable();
|
||||||
|
}
|
||||||
|
|
||||||
|
constexpr SHAL_UART_Enable_Register getUARTEnableReg(const UART_Pair_Key pair){
|
||||||
|
switch(pair){
|
||||||
|
case UART_Pair_Key::Tx1A9_Rx1A10:
|
||||||
|
case UART_Pair_Key::Tx1B6_Rx1B7:
|
||||||
|
return {&RCC->APB2ENR,RCC_APB2ENR_USART1EN};
|
||||||
|
case UART_Pair_Key::Tx2A2_Rx2A3:
|
||||||
|
return {&RCC->APB1ENR1,RCC_APB1ENR1_USART2EN};
|
||||||
|
case UART_Pair_Key::NUM_PAIRS:
|
||||||
|
case UART_Pair_Key::INVALID:
|
||||||
|
assert(false);
|
||||||
|
return {nullptr, 0};
|
||||||
|
}
|
||||||
|
__builtin_unreachable();
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline SHAL_UART_Control_Register_1 getUARTControlRegister1(UART_Pair_Key key){
|
||||||
|
SHAL_UART_Control_Register_1 res = {nullptr, USART_CR1_UE, USART_CR1_TE, USART_CR1_RE};
|
||||||
|
|
||||||
|
res.reg = &getUARTPair(key).USARTReg->CR1;
|
||||||
|
return res;
|
||||||
|
};
|
||||||
|
|
||||||
|
static inline SHAL_UART_Baud_Rate_Generation_Register getUARTBaudRateGenerationRegister(UART_Pair_Key key){
|
||||||
|
SHAL_UART_Baud_Rate_Generation_Register res = {nullptr}; //TODO un-hardcode if other devices have wider baud rate allowances
|
||||||
|
|
||||||
|
res.reg = &getUARTPair(key).USARTReg->BRR;
|
||||||
|
return res;
|
||||||
|
};
|
||||||
|
|
||||||
|
static inline SHAL_UART_Transmit_Data_Register getUARTTransmitDataRegister(UART_Pair_Key key){
|
||||||
|
SHAL_UART_Transmit_Data_Register res = {nullptr}; //TODO un-hardcode if other devices have wider baud rate allowances
|
||||||
|
|
||||||
|
res.reg = &getUARTPair(key).USARTReg->TDR;
|
||||||
|
return res;
|
||||||
|
};
|
||||||
|
|
||||||
|
static inline SHAL_UART_ISR_FIFO_Disabled getUARTISRFifoDisabled(UART_Pair_Key key){
|
||||||
|
SHAL_UART_ISR_FIFO_Disabled res = {nullptr, USART_ISR_TXE};
|
||||||
|
|
||||||
|
res.reg = &getUARTPair(key).USARTReg->ISR;
|
||||||
|
return res;
|
||||||
|
};
|
||||||
|
|
||||||
|
#endif //SHAL_UART_REG_F072XB_H
|
||||||
58
SHAL/Include/Peripheral/UART/SHAL_UART.h
Normal file
58
SHAL/Include/Peripheral/UART/SHAL_UART.h
Normal file
@@ -0,0 +1,58 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file SHAL_TIM.h
|
||||||
|
* @author Luca Lizaranzu
|
||||||
|
* @brief Relating to SHAL_UART and USART object abstractions
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef SHMINGO_HAL_SHAL_UART_H
|
||||||
|
#define SHMINGO_HAL_SHAL_UART_H
|
||||||
|
|
||||||
|
#include "SHAL_UART_REG.h"
|
||||||
|
#include "SHAL_UART_TYPES.h"
|
||||||
|
|
||||||
|
class SHAL_UART{
|
||||||
|
|
||||||
|
friend class UARTManager;
|
||||||
|
public:
|
||||||
|
|
||||||
|
void init(UART_Pair_Key pair);
|
||||||
|
|
||||||
|
//begins Tx and Usart TODO either modify this function or add a new one that supports Rx
|
||||||
|
void begin(uint32_t baudRate) volatile;
|
||||||
|
|
||||||
|
//Sends a string
|
||||||
|
void sendString(const char* s) volatile;
|
||||||
|
|
||||||
|
//Sends a char
|
||||||
|
void sendChar(char c) volatile;
|
||||||
|
|
||||||
|
private:
|
||||||
|
|
||||||
|
SHAL_UART() = default; //Initializer for array
|
||||||
|
|
||||||
|
//Creates a SHAL_UART based on a pair of two valid U(S)ART pins
|
||||||
|
|
||||||
|
UART_Pair_Key m_key = UART_Pair_Key::INVALID;
|
||||||
|
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
|
#define UART(num) UARTManager::get(num)
|
||||||
|
|
||||||
|
class UARTManager{
|
||||||
|
|
||||||
|
public:
|
||||||
|
|
||||||
|
static SHAL_UART& get(uint8_t uart);
|
||||||
|
|
||||||
|
UARTManager() = delete;
|
||||||
|
|
||||||
|
private:
|
||||||
|
|
||||||
|
inline static SHAL_UART m_UARTs[NUM_USART_LINES] = {};
|
||||||
|
|
||||||
|
};
|
||||||
|
|
||||||
|
#endif //SHMINGO_HAL_SHAL_UART_H
|
||||||
97
SHAL/Include/Peripheral/UART/SHAL_UART_REG.h
Normal file
97
SHAL/Include/Peripheral/UART/SHAL_UART_REG.h
Normal file
@@ -0,0 +1,97 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 9/7/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#ifndef SHAL_UART_REG_H
|
||||||
|
#define SHAL_UART_REG_H
|
||||||
|
|
||||||
|
|
||||||
|
#if defined(STM32F030x6)
|
||||||
|
#include "stm32f030x6.h"
|
||||||
|
#elif defined(STM32F030x8)
|
||||||
|
#include "stm32f030x8.h"
|
||||||
|
#elif defined(STM32F031x6)
|
||||||
|
#include "stm32f031x6.h"
|
||||||
|
#elif defined(STM32F038xx)
|
||||||
|
#include "stm32f038xx.h"
|
||||||
|
#elif defined(STM32F042x6)
|
||||||
|
#include "stm32f042x6.h"
|
||||||
|
#elif defined(STM32F048xx)
|
||||||
|
#include "stm32f048xx.h"
|
||||||
|
#elif defined(STM32F051x8)
|
||||||
|
#include "stm32f051x8.h"
|
||||||
|
#elif defined(STM32F058xx)
|
||||||
|
#include "stm32f058xx.h"
|
||||||
|
#elif defined(STM32F070x6)
|
||||||
|
#include "stm32f070x6.h"
|
||||||
|
#elif defined(STM32F070xB)
|
||||||
|
#include "stm32f070xb.h"
|
||||||
|
#elif defined(STM32F071xB)
|
||||||
|
#include "stm32f071xb.h"
|
||||||
|
#elif defined(STM32F072xB)
|
||||||
|
#include "SHAL_UART_REG_F072xB.h"
|
||||||
|
#elif defined(STM32F078xx)
|
||||||
|
#include "stm32f078xx.h"
|
||||||
|
#elif defined(STM32F091xC)
|
||||||
|
#include "stm32f091xc.h"
|
||||||
|
#elif defined(STM32F098xx)
|
||||||
|
#include "stm32f098xx.h"
|
||||||
|
#elif defined(STM32F030xC)
|
||||||
|
#include "stm32f030xc.h"
|
||||||
|
#elif defined(STM32F030xC)
|
||||||
|
#include "stm32f030xc.h"
|
||||||
|
#elif defined(STM32L412xx)
|
||||||
|
#include "stm32l412xx.h"
|
||||||
|
#elif defined(STM32L422xx)
|
||||||
|
#include "stm32l422xx.h"
|
||||||
|
#elif defined(STM32L431xx)
|
||||||
|
#include "stm32l431xx.h"
|
||||||
|
#elif defined(STM32L432xx)
|
||||||
|
#include "SHAL_UART_REG_L432KC.h"
|
||||||
|
#elif defined(STM32L433xx)
|
||||||
|
#include "stm32l433xx.h"
|
||||||
|
#elif defined(STM32L442xx)
|
||||||
|
#include "stm32l442xx.h"
|
||||||
|
#elif defined(STM32L443xx)
|
||||||
|
#include "stm32l443xx.h"
|
||||||
|
#elif defined(STM32L451xx)
|
||||||
|
#include "stm32l451xx.h"
|
||||||
|
#elif defined(STM32L452xx)
|
||||||
|
#include "stm32l452xx.h"
|
||||||
|
#elif defined(STM32L462xx)
|
||||||
|
#include "stm32l462xx.h"
|
||||||
|
#elif defined(STM32L471xx)
|
||||||
|
#include "stm32l471xx.h"
|
||||||
|
#elif defined(STM32L475xx)
|
||||||
|
#include "stm32l475xx.h"
|
||||||
|
#elif defined(STM32L476xx)
|
||||||
|
#include "stm32l476xx.h"
|
||||||
|
#elif defined(STM32L485xx)
|
||||||
|
#include "stm32l485xx.h"
|
||||||
|
#elif defined(STM32L486xx)
|
||||||
|
#include "stm32l486xx.h"
|
||||||
|
#elif defined(STM32L496xx)
|
||||||
|
#include "stm32l496xx.h"
|
||||||
|
#elif defined(STM32L4A6xx)
|
||||||
|
#include "stm32l4a6xx.h"
|
||||||
|
#elif defined(STM32L4P5xx)
|
||||||
|
#include "stm32l4p5xx.h"
|
||||||
|
#elif defined(STM32L4Q5xx)
|
||||||
|
#include "stm32l4q5xx.h"
|
||||||
|
#elif defined(STM32L4R5xx)
|
||||||
|
#include "stm32l4r5xx.h"
|
||||||
|
#elif defined(STM32L4R7xx)
|
||||||
|
#include "stm32l4r7xx.h"
|
||||||
|
#elif defined(STM32L4R9xx)
|
||||||
|
#include "stm32l4r9xx.h"
|
||||||
|
#elif defined(STM32L4S5xx)
|
||||||
|
#include "stm32l4s5xx.h"
|
||||||
|
#elif defined(STM32L4S7xx)
|
||||||
|
#include "stm32l4s7xx.h"
|
||||||
|
#elif defined(STM32L4S9xx)
|
||||||
|
#else
|
||||||
|
#error "Please select first the target STM32F0xx device used in your application (in stm32f0xx.h file)"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
#endif //SHMINGO_HAL_SHAL_UART_REG_H
|
||||||
49
SHAL/Include/Peripheral/UART/SHAL_UART_TYPES.h
Normal file
49
SHAL/Include/Peripheral/UART/SHAL_UART_TYPES.h
Normal file
@@ -0,0 +1,49 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 9/7/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#ifndef SHAL_UART_TYPES_H
|
||||||
|
#define SHAL_UART_TYPES_H
|
||||||
|
|
||||||
|
#include "SHAL_CORE.h"
|
||||||
|
#include "SHAL_GPIO_REG.h"
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
//Represents a pair of pins usable for USART Tx + Rx in combination, and their alternate function mapping
|
||||||
|
struct SHAL_UART_Pair{
|
||||||
|
USART_TypeDef* USARTReg;
|
||||||
|
GPIO_Key TxKey;
|
||||||
|
GPIO_Key RxKey;
|
||||||
|
GPIO_Alternate_Function TxAlternateFunctionMask;
|
||||||
|
GPIO_Alternate_Function RxAlternateFunctionMask;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct SHAL_UART_Enable_Register{
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t mask;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct SHAL_UART_Control_Register_1 {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t usart_enable_mask;
|
||||||
|
uint32_t transmit_enable_mask;
|
||||||
|
uint32_t receive_enable_mask;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct SHAL_UART_Baud_Rate_Generation_Register {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct SHAL_UART_Transmit_Data_Register {
|
||||||
|
volatile uint16_t* reg;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct SHAL_UART_ISR_FIFO_Disabled {
|
||||||
|
volatile uint32_t* reg;
|
||||||
|
uint32_t transmit_data_register_empty_mask;
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
#endif //SHMINGO_HAL_SHAL_UART_TYPES_H
|
||||||
@@ -10,5 +10,9 @@
|
|||||||
|
|
||||||
#include "SHAL_TIM.h"
|
#include "SHAL_TIM.h"
|
||||||
#include "SHAL_GPIO.h"
|
#include "SHAL_GPIO.h"
|
||||||
|
#include "SHAL_UART.h"
|
||||||
|
#include "SHAL_ADC.h"
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
@@ -1,75 +0,0 @@
|
|||||||
//
|
|
||||||
// Created by Luca on 8/30/2025.
|
|
||||||
//
|
|
||||||
|
|
||||||
#include "SHAL_GPIO.h"
|
|
||||||
|
|
||||||
|
|
||||||
unsigned long getPinMode(PinMode mode){
|
|
||||||
switch(mode){
|
|
||||||
case PinMode::INPUT_MODE:
|
|
||||||
return 0b00;
|
|
||||||
case PinMode::OUTPUT_MODE:
|
|
||||||
return 0b01;
|
|
||||||
case PinMode::ALTERNATE_FUNCTION_MODE:
|
|
||||||
return 0b10;
|
|
||||||
case PinMode::ANALOG_MODE:
|
|
||||||
return 0b11;
|
|
||||||
case PinMode::INVALID:
|
|
||||||
assert(false);
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
__builtin_unreachable();
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
GPIO::GPIO() : m_GPIO_KEY(GPIO_Key::INVALID){
|
|
||||||
//Do not initialize anything
|
|
||||||
}
|
|
||||||
|
|
||||||
GPIO::GPIO(GPIO_Key key, PinMode pinMode) : m_GPIO_KEY(key) {
|
|
||||||
|
|
||||||
SHAL_Peripheral gpioPeripheral = getGPIORegister(key);
|
|
||||||
|
|
||||||
auto gpioRegister = static_cast<GPIO_TypeDef*>(gpioPeripheral.registers);
|
|
||||||
unsigned long registerOffset = gpioPeripheral.global_offset;
|
|
||||||
|
|
||||||
volatile unsigned long* gpioEnable = getGPIORCCEnable(key).reg;
|
|
||||||
unsigned long gpioOffset = getGPIORCCEnable(key).offset;
|
|
||||||
|
|
||||||
*gpioEnable |= (1 << gpioOffset); //Set enable flag
|
|
||||||
|
|
||||||
gpioRegister->MODER &= ~(0b11 << (2 * registerOffset)); //Clear any previous mode
|
|
||||||
gpioRegister->MODER |= (getPinMode(pinMode) << (2 * registerOffset)); //Set mode based on pinmode bit structure
|
|
||||||
}
|
|
||||||
|
|
||||||
void GPIO::setLow() {
|
|
||||||
auto gpioPeripheral = getGPIORegister(m_GPIO_KEY);
|
|
||||||
static_cast<GPIO_TypeDef*>(gpioPeripheral.registers)->ODR &= ~(1 << gpioPeripheral.global_offset);
|
|
||||||
}
|
|
||||||
|
|
||||||
void GPIO::setHigh() {
|
|
||||||
auto gpioPeripheral = getGPIORegister(m_GPIO_KEY);
|
|
||||||
static_cast<GPIO_TypeDef*>(gpioPeripheral.registers)->ODR |= (1 << gpioPeripheral.global_offset);
|
|
||||||
}
|
|
||||||
|
|
||||||
void GPIO::toggle() {
|
|
||||||
auto gpioPeripheral = getGPIORegister(m_GPIO_KEY);
|
|
||||||
static_cast<GPIO_TypeDef*>(gpioPeripheral.registers)->ODR ^= (1 << gpioPeripheral.global_offset);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
GPIO& GPIOManager::get(GPIO_Key key, PinMode pinMode) {
|
|
||||||
|
|
||||||
unsigned int gpioPort = getGPIOPortNumber(key);
|
|
||||||
unsigned long gpioPin = getGPIORegister(key).global_offset; //Use existing structs to get offset
|
|
||||||
|
|
||||||
if (m_gpios[gpioPort][gpioPin].m_GPIO_KEY == GPIO_Key::INVALID){
|
|
||||||
m_gpios[gpioPort][gpioPin] = GPIO(key,pinMode);
|
|
||||||
}
|
|
||||||
|
|
||||||
return m_gpios[gpioPort][gpioPin];
|
|
||||||
}
|
|
||||||
42
SHAL/Src/STM32F0xx/Core/SHAL_CORE.cpp
Normal file
42
SHAL/Src/STM32F0xx/Core/SHAL_CORE.cpp
Normal file
@@ -0,0 +1,42 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 9/15/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#include "SHAL_CORE.h"
|
||||||
|
|
||||||
|
void SHAL_init(){
|
||||||
|
systick_init(); //Just this for now
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
void systick_init(){
|
||||||
|
SysTick->CTRL = 0; //Disable first
|
||||||
|
SysTick->LOAD = 0xFFFFFF; //Max 24-bit
|
||||||
|
SysTick->VAL = 0; //Clear
|
||||||
|
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
void SHAL_delay_us(uint32_t us){
|
||||||
|
uint32_t ticks = us * (SystemCoreClock / 1000000U);
|
||||||
|
uint32_t start = SysTick->VAL;
|
||||||
|
|
||||||
|
//Calculate target value (may wrap around)
|
||||||
|
uint32_t target = (start >= ticks) ? (start - ticks) : (start + 0x01000000 - ticks);
|
||||||
|
target &= 0x00FFFFFF;
|
||||||
|
|
||||||
|
//Wait until we reach the target
|
||||||
|
if (start >= ticks) {
|
||||||
|
//No wraparound case
|
||||||
|
while (SysTick->VAL > target) {}
|
||||||
|
} else {
|
||||||
|
while (SysTick->VAL <= start) {} //Wait for wraparound
|
||||||
|
while (SysTick->VAL > target) {} //Wait for target
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void SHAL_delay_ms(uint32_t ms){
|
||||||
|
while(ms-- > 0){
|
||||||
|
SHAL_delay_us(1000);
|
||||||
|
}
|
||||||
|
}
|
||||||
40
SHAL/Src/STM32F0xx/EXT/SHAL_EXTI_CALLBACK.cpp
Normal file
40
SHAL/Src/STM32F0xx/EXT/SHAL_EXTI_CALLBACK.cpp
Normal file
@@ -0,0 +1,40 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 9/3/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#include "SHAL_EXTI_CALLBACK.h"
|
||||||
|
|
||||||
|
#if defined(STM32F030x6)
|
||||||
|
#elif defined(STM32F030x8)
|
||||||
|
#elif defined(STM32F031x6)
|
||||||
|
#elif defined(STM32F038xx)
|
||||||
|
#elif defined(STM32F042x6)
|
||||||
|
#elif defined(STM32F048xx)
|
||||||
|
#elif defined(STM32F051x8)
|
||||||
|
#elif defined(STM32F058xx)
|
||||||
|
#elif defined(STM32F070x6)
|
||||||
|
#elif defined(STM32F070xB)
|
||||||
|
#elif defined(STM32F071xB)
|
||||||
|
#elif defined(STM32F072xB)
|
||||||
|
|
||||||
|
DEFINE_MULTI_EXTI_IRQ(0,1);
|
||||||
|
DEFINE_MULTI_EXTI_IRQ(2,3);
|
||||||
|
DEFINE_MULTI_EXTI_IRQ(4,15);
|
||||||
|
|
||||||
|
#elif defined(STM32F078xx)
|
||||||
|
#include "stm32f078xx.h"
|
||||||
|
#elif defined(STM32F091xC)
|
||||||
|
#include "stm32f091xc.h"
|
||||||
|
#elif defined(STM32F098xx)
|
||||||
|
#include "stm32f098xx.h"
|
||||||
|
#elif defined(STM32F030xC)
|
||||||
|
#include "stm32f030xc.h"
|
||||||
|
#else
|
||||||
|
#error "Please select first the target STM32F0xx device used in your application (in stm32f0xx.h file)"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
//Link function to EXTI line
|
||||||
|
void registerEXTICallback(GPIO_Key key, EXTICallback callback){
|
||||||
|
EXTI_callbacks[getGPIORegister(key).global_offset] = callback;
|
||||||
|
}
|
||||||
115
SHAL/Src/STM32F0xx/Peripheral/ADC/SHAL_ADC.cpp
Normal file
115
SHAL/Src/STM32F0xx/Peripheral/ADC/SHAL_ADC.cpp
Normal file
@@ -0,0 +1,115 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 9/21/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#include "SHAL_ADC.h"
|
||||||
|
|
||||||
|
//Can hard code registers on F0 because all F0 devices have only one ADC, and use only one clock
|
||||||
|
SHAL_Result SHAL_ADC::init() {
|
||||||
|
|
||||||
|
if(m_ADCKey == ADC_Key::INVALID || m_ADCKey == ADC_Key::NUM_ADC){
|
||||||
|
return SHAL_Result::ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
ADC_TypeDef* ADC_reg = getADCRegister(m_ADCKey);
|
||||||
|
|
||||||
|
|
||||||
|
RCC->APB2ENR |= RCC_APB2ENR_ADC1EN; //Enable clock
|
||||||
|
RCC->CR2 |= RCC_CR2_HSI14ON; //Start peripheral oscillator
|
||||||
|
|
||||||
|
if(!SHAL_WAIT_FOR_CONDITION_US(((RCC->CR2 & RCC_CR2_HSI14RDY) != 0),50)){ //Wait for clock OKAY
|
||||||
|
return SHAL_Result::ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
if((ADC_reg->ISR & ADC_ISR_ADRDY) != 0){ //Set ADRDY to 0
|
||||||
|
ADC_reg->ISR |= ADC_ISR_ADRDY;
|
||||||
|
}
|
||||||
|
|
||||||
|
ADC_reg->CR |= ADC_CR_ADEN; //Enable
|
||||||
|
|
||||||
|
if(!SHAL_WAIT_FOR_CONDITION_US(((ADC_reg->ISR & ADC_ISR_ADRDY) != 0),50)){ //Wait for disable
|
||||||
|
return SHAL_Result::ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
if(calibrate() != SHAL_Result::OKAY){ //Calibrate
|
||||||
|
return SHAL_Result::ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
return SHAL_Result::OKAY;
|
||||||
|
}
|
||||||
|
|
||||||
|
SHAL_Result SHAL_ADC::calibrate() {
|
||||||
|
|
||||||
|
if(m_ADCKey == ADC_Key::INVALID || m_ADCKey == ADC_Key::NUM_ADC){
|
||||||
|
return SHAL_Result::ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
ADC_TypeDef* ADC_reg = getADCRegister(m_ADCKey);
|
||||||
|
|
||||||
|
if((ADC_reg->CR & ADC_CR_ADEN) != 0){ //Clear ADEN (enable)
|
||||||
|
ADC_reg->CR |= ADC_CR_ADDIS;
|
||||||
|
}
|
||||||
|
|
||||||
|
if(!SHAL_WAIT_FOR_CONDITION_US(((ADC_reg->CR & ADC_CR_ADEN) == 0),50)){ //Wait for disable
|
||||||
|
return SHAL_Result::ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
ADC_reg->CFGR1 &= ~ADC_CFGR1_DMAEN; //Clear DMAEN
|
||||||
|
ADC_reg->CR |= ADC_CR_ADCAL; //Launch calibration by setting ADCAL
|
||||||
|
|
||||||
|
if(!SHAL_WAIT_FOR_CONDITION_US(((ADC_reg->CR & ADC_CR_ADCAL) == 0),50)){ //Wait for calibration
|
||||||
|
return SHAL_Result::ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
return SHAL_Result::OKAY;
|
||||||
|
}
|
||||||
|
|
||||||
|
uint16_t SHAL_ADC::singleConvertSingle(SHAL_ADC_Channel channel, SHAL_ADC_SampleTime time) {
|
||||||
|
|
||||||
|
ADC_TypeDef* ADC_reg = getADCRegister(m_ADCKey);
|
||||||
|
|
||||||
|
ADC->CCR |= ADC_CCR_VREFEN | ADC_CCR_TSEN; //Enable VREFINT and Temp sensor in global ADC struct
|
||||||
|
|
||||||
|
ADC_reg->CHSELR = static_cast<uint32_t>(channel); //Enable channel for conversion
|
||||||
|
ADC_reg->SMPR |= static_cast<uint32_t>(time); //Set sampling time
|
||||||
|
|
||||||
|
if(!SHAL_WAIT_FOR_CONDITION_US(((ADC_reg->ISR & ADC_ISR_EOC) != 0),500)){ //Wait for conversion
|
||||||
|
return 0; //Failed
|
||||||
|
}
|
||||||
|
|
||||||
|
uint16_t result = ADC_reg->DR;
|
||||||
|
return result;
|
||||||
|
}
|
||||||
|
|
||||||
|
void SHAL_ADC::multiConvertSingle(SHAL_ADC_Channel* channels, const int numChannels, uint16_t* result, SHAL_ADC_SampleTime time) {
|
||||||
|
ADC_TypeDef* ADC_reg = getADCRegister(m_ADCKey);
|
||||||
|
|
||||||
|
ADC->CCR |= ADC_CCR_VREFEN | ADC_CCR_TSEN; //Enable VREFINT and Temp sensor in global ADC struct
|
||||||
|
|
||||||
|
for(int i = 0; i < numChannels; i++){ //Enable all channels
|
||||||
|
ADC_reg->CHSELR = static_cast<uint32_t>(channels[i]);
|
||||||
|
}
|
||||||
|
|
||||||
|
ADC_reg->SMPR |= static_cast<uint32_t>(time); //Set sampling time
|
||||||
|
|
||||||
|
|
||||||
|
for(int i = 0; i < numChannels; i++){
|
||||||
|
if(!SHAL_WAIT_FOR_CONDITION_US(((ADC_reg->ISR & ADC_ISR_EOC) != 0),500)){ //Wait for conversion
|
||||||
|
continue; //Failed
|
||||||
|
}
|
||||||
|
|
||||||
|
result[i] = ADC_reg->DR;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
SHAL_ADC &ADCManager::get(ADC_Key key) {
|
||||||
|
return m_ADCs[static_cast<uint8_t>(key)];
|
||||||
|
}
|
||||||
|
|
||||||
|
SHAL_ADC& ADCManager::getByIndex(int index) {
|
||||||
|
|
||||||
|
if(index < static_cast<int>(ADC_Key::NUM_ADC)){
|
||||||
|
return m_ADCs[index];
|
||||||
|
}
|
||||||
|
return m_ADCs[0];
|
||||||
|
}
|
||||||
120
SHAL/Src/STM32F0xx/Peripheral/GPIO/SHAL_GPIO.cpp
Normal file
120
SHAL/Src/STM32F0xx/Peripheral/GPIO/SHAL_GPIO.cpp
Normal file
@@ -0,0 +1,120 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 8/30/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#include "SHAL_GPIO.h"
|
||||||
|
#include "SHAL_EXTI_CALLBACK.h"
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
SHAL_GPIO::SHAL_GPIO() : m_GPIO_KEY(GPIO_Key::INVALID){
|
||||||
|
//Do not initialize anything
|
||||||
|
}
|
||||||
|
|
||||||
|
SHAL_GPIO::SHAL_GPIO(GPIO_Key key) : m_GPIO_KEY(key) {
|
||||||
|
|
||||||
|
volatile unsigned long* gpioEnable = getGPIORCCEnable(key).reg;
|
||||||
|
unsigned long gpioOffset = getGPIORCCEnable(key).offset;
|
||||||
|
|
||||||
|
*gpioEnable |= (1 << gpioOffset); //Set enable flag
|
||||||
|
}
|
||||||
|
|
||||||
|
void SHAL_GPIO::setLow() {
|
||||||
|
auto outputDataReg = getGPIOOutputDataRegister(m_GPIO_KEY);
|
||||||
|
SHAL_set_bits(outputDataReg.reg,1,0,outputDataReg.offset);
|
||||||
|
}
|
||||||
|
|
||||||
|
void SHAL_GPIO::setHigh() {
|
||||||
|
auto outputDataReg = getGPIOOutputDataRegister(m_GPIO_KEY);
|
||||||
|
SHAL_set_bits(outputDataReg.reg,1,1,outputDataReg.offset);
|
||||||
|
}
|
||||||
|
|
||||||
|
void SHAL_GPIO::toggle() volatile {
|
||||||
|
auto outputDataReg = getGPIOOutputDataRegister(m_GPIO_KEY);
|
||||||
|
SHAL_flip_bits(outputDataReg.reg,1,outputDataReg.offset);
|
||||||
|
}
|
||||||
|
|
||||||
|
void SHAL_GPIO::setOutputType(PinType type) volatile {
|
||||||
|
auto outputTypeReg = getGPIOOutputTypeRegister(m_GPIO_KEY);
|
||||||
|
SHAL_set_bits(outputTypeReg.reg,2,static_cast<uint8_t>(type),outputTypeReg.offset);
|
||||||
|
}
|
||||||
|
|
||||||
|
void SHAL_GPIO::setOutputSpeed(OutputSpeed speed) volatile {
|
||||||
|
auto outputSpeedReg = getGPIOOutputSpeedRegister(m_GPIO_KEY);
|
||||||
|
SHAL_set_bits(outputSpeedReg.reg,2,static_cast<uint8_t>(speed),outputSpeedReg.offset);
|
||||||
|
}
|
||||||
|
|
||||||
|
void SHAL_GPIO::setInternalResistor(InternalResistorType type) volatile {
|
||||||
|
auto pupdreg = getGPIOPUPDRegister(m_GPIO_KEY);
|
||||||
|
SHAL_set_bits(pupdreg.reg,2,static_cast<uint8_t>(type),pupdreg.offset);
|
||||||
|
}
|
||||||
|
|
||||||
|
void SHAL_GPIO::setAlternateFunction(GPIO_Alternate_Function AF) volatile {
|
||||||
|
auto alternateFunctionReg = getGPIOAlternateFunctionRegister(m_GPIO_KEY);
|
||||||
|
SHAL_set_bits(alternateFunctionReg.reg,4,static_cast<uint8_t>(AF),alternateFunctionReg.offset);
|
||||||
|
}
|
||||||
|
|
||||||
|
void SHAL_GPIO::setPinMode(PinMode mode) volatile {
|
||||||
|
SHAL_GPIO_Peripheral gpioPeripheral = getGPIORegister(m_GPIO_KEY);
|
||||||
|
gpioPeripheral.reg->MODER &= ~(0x03 << (2 * gpioPeripheral.global_offset)); //Clear any previous mode
|
||||||
|
gpioPeripheral.reg->MODER |= (static_cast<uint8_t>(mode) << (2 * gpioPeripheral.global_offset)); //Set mode based on pinmode bit structure
|
||||||
|
}
|
||||||
|
|
||||||
|
void SHAL_GPIO::useAsExternalInterrupt(TriggerMode mode, EXTICallback callback) {
|
||||||
|
|
||||||
|
uint32_t gpioPin = getGPIORegister(m_GPIO_KEY).global_offset; //Use existing structs to get offset
|
||||||
|
|
||||||
|
setPinMode(PinMode::INPUT_MODE); //Explicitly set mode to input
|
||||||
|
|
||||||
|
RCC->APB2ENR |= RCC_APB2ENR_SYSCFGCOMPEN; //Enable EXT, TODO check if this is different across STM32 models
|
||||||
|
NVIC_EnableIRQ(getGPIOEXTICR(m_GPIO_KEY).IRQN); //Enable IRQN for pin
|
||||||
|
EXTI->IMR |= (1 << gpioPin); //Enable correct EXTI line
|
||||||
|
|
||||||
|
SHAL_EXTIO_Register EXTILineEnable = getGPIOEXTICR(m_GPIO_KEY);
|
||||||
|
*EXTILineEnable.EXT_ICR |= EXTILineEnable.mask; //Set bits to enable correct port on correct line TODO Find way to clear bits before
|
||||||
|
|
||||||
|
uint32_t rising_mask = 0x00;
|
||||||
|
uint32_t falling_mask = 0x00;
|
||||||
|
|
||||||
|
//Set rising and falling edge triggers based on pin offset (enabled EXTI line)
|
||||||
|
switch(mode){
|
||||||
|
case TriggerMode::RISING_EDGE:
|
||||||
|
rising_mask = 1 << gpioPin;
|
||||||
|
break;
|
||||||
|
case TriggerMode::FALLING_EDGE:
|
||||||
|
falling_mask = 1 << gpioPin;
|
||||||
|
break;
|
||||||
|
case TriggerMode::RISING_FALLING_EDGE:
|
||||||
|
falling_mask = 1 << gpioPin;
|
||||||
|
falling_mask = 1 << gpioPin;
|
||||||
|
}
|
||||||
|
|
||||||
|
//Set triggers
|
||||||
|
EXTI->RTSR |= rising_mask;
|
||||||
|
EXTI->FTSR |= falling_mask;
|
||||||
|
|
||||||
|
//Set callback
|
||||||
|
registerEXTICallback(m_GPIO_KEY,callback);
|
||||||
|
|
||||||
|
__enable_irq(); //Enable IRQ just in case
|
||||||
|
}
|
||||||
|
|
||||||
|
uint16_t SHAL_GPIO::analogRead(SHAL_ADC_SampleTime sampleTime) {
|
||||||
|
|
||||||
|
SHAL_ADC_Channel channel = getGPIOPortInfo(m_GPIO_KEY).ADCChannel;
|
||||||
|
|
||||||
|
return GPIOManager::getGPIOADC().singleConvertSingle(channel,sampleTime);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
SHAL_GPIO& GPIOManager::get(GPIO_Key key) {
|
||||||
|
|
||||||
|
unsigned int gpioPort = getGPIOPortNumber(key);
|
||||||
|
unsigned long gpioPin = getGPIORegister(key).global_offset; //Use existing structs to get offset
|
||||||
|
|
||||||
|
if (m_gpios[gpioPort][gpioPin].m_GPIO_KEY == GPIO_Key::INVALID){
|
||||||
|
m_gpios[gpioPort][gpioPin] = SHAL_GPIO(key);
|
||||||
|
}
|
||||||
|
|
||||||
|
return m_gpios[gpioPort][gpioPin];
|
||||||
|
}
|
||||||
142
SHAL/Src/STM32F0xx/Peripheral/I2C/SHAL_I2C.cpp
Normal file
142
SHAL/Src/STM32F0xx/Peripheral/I2C/SHAL_I2C.cpp
Normal file
@@ -0,0 +1,142 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 9/9/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#include "SHAL_I2C.h"
|
||||||
|
#include "SHAL_GPIO.h"
|
||||||
|
|
||||||
|
#include "SHAL_UART.h"
|
||||||
|
|
||||||
|
void SHAL_I2C::init(I2C_Pair pair) volatile {
|
||||||
|
m_I2CPair = pair;
|
||||||
|
|
||||||
|
SHAL_I2C_Pair I2CPair = getI2CPair(pair); //Get the I2C_PAIR information to be initialized
|
||||||
|
|
||||||
|
//Get the SHAL_GPIO pins for this SHAL_I2C setup
|
||||||
|
GPIO_Key SCL_Key = I2CPair.SCL_Key; //SCL pin
|
||||||
|
GPIO_Key SDA_Key = I2CPair.SDA_Key; //SDA pin
|
||||||
|
|
||||||
|
SHAL_I2C_Enable_Reg pairI2CEnable = getI2CEnableReg(pair); //Register and mask to enable the I2C peripheral
|
||||||
|
|
||||||
|
*pairI2CEnable.reg &= ~pairI2CEnable.mask; //Enable I2C peripheral clock
|
||||||
|
|
||||||
|
GET_GPIO(SCL_Key).setPinMode(PinMode::ALTERNATE_FUNCTION_MODE); //Implicitly initializes and enables GPIO bus
|
||||||
|
GET_GPIO(SDA_Key).setPinMode(PinMode::ALTERNATE_FUNCTION_MODE);
|
||||||
|
|
||||||
|
GET_GPIO(SCL_Key).setAlternateFunction(I2CPair.SCL_Mask);
|
||||||
|
GET_GPIO(SDA_Key).setAlternateFunction(I2CPair.SDA_Mask);
|
||||||
|
|
||||||
|
//These may be abstracted further to support multiple I2C configurations
|
||||||
|
GET_GPIO(SCL_Key).setOutputType(PinType::OPEN_DRAIN);
|
||||||
|
GET_GPIO(SDA_Key).setOutputType(PinType::OPEN_DRAIN);
|
||||||
|
|
||||||
|
GET_GPIO(SCL_Key).setOutputSpeed(OutputSpeed::HIGH_SPEED);
|
||||||
|
GET_GPIO(SDA_Key).setOutputSpeed(OutputSpeed::HIGH_SPEED);
|
||||||
|
|
||||||
|
GET_GPIO(SCL_Key).setInternalResistor(InternalResistorType::PULLUP);
|
||||||
|
GET_GPIO(SDA_Key).setInternalResistor(InternalResistorType::PULLUP);
|
||||||
|
|
||||||
|
SHAL_I2C_Reset_Reg pairI2CReset = getI2CResetReg(pair);
|
||||||
|
|
||||||
|
*pairI2CEnable.reg |= pairI2CEnable.mask; //Enable I2C peripheral clock
|
||||||
|
|
||||||
|
*pairI2CReset.reg |= pairI2CReset.mask; //Reset peripheral
|
||||||
|
*pairI2CReset.reg &= ~pairI2CReset.mask; //Reset peripheral
|
||||||
|
}
|
||||||
|
|
||||||
|
void SHAL_I2C::setClockConfig(uint8_t prescaler, uint8_t dataSetupTime, uint8_t dataHoldTime, uint8_t SCLHighPeriod, uint8_t SCLLowPeriod) {
|
||||||
|
|
||||||
|
SHAL_I2C_Timing_Reg clockReg = getI2CTimerReg(m_I2CPair);
|
||||||
|
|
||||||
|
*clockReg.reg |= (prescaler << clockReg.prescaler_offset);
|
||||||
|
*clockReg.reg |= (dataSetupTime << clockReg.dataSetupTime_offset);
|
||||||
|
*clockReg.reg |= (dataHoldTime << clockReg.dataHoldTime_offset);
|
||||||
|
*clockReg.reg |= (SCLHighPeriod << clockReg.SCLHighPeriod_offset);
|
||||||
|
*clockReg.reg |= (SCLLowPeriod << clockReg.SCLLowPeriod_offset);
|
||||||
|
|
||||||
|
getI2CPair(m_I2CPair).I2CReg->CR1 |= I2C_CR1_PE; //Enable I2C peripheral
|
||||||
|
}
|
||||||
|
|
||||||
|
void SHAL_I2C::setClockConfig(uint32_t configuration) {
|
||||||
|
*getI2CTimerReg(m_I2CPair).reg = configuration;
|
||||||
|
|
||||||
|
getI2CPair(m_I2CPair).I2CReg->CR1 |= I2C_CR1_PE; //Enable I2C peripheral
|
||||||
|
}
|
||||||
|
|
||||||
|
void SHAL_I2C::masterWriteRead(uint8_t addr,const uint8_t* writeData, size_t writeLen, uint8_t* readData, size_t readLen) {
|
||||||
|
|
||||||
|
volatile I2C_TypeDef* I2CPeripheral = getI2CPair(m_I2CPair).I2CReg;
|
||||||
|
|
||||||
|
if(!SHAL_WAIT_FOR_CONDITION_MS((I2CPeripheral->ISR & I2C_ISR_BUSY) == 0, 100)){
|
||||||
|
SHAL_UART2.sendString("I2C timed out waiting for not busy\r\n");
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
//Write phase
|
||||||
|
if (writeLen > 0) {
|
||||||
|
//Configure: NBYTES = wlen, write mode, START
|
||||||
|
I2CPeripheral->CR2 = (addr << 1) | (writeLen << I2C_CR2_NBYTES_Pos) | I2C_CR2_START;
|
||||||
|
|
||||||
|
for (size_t i = 0; i < writeLen; i++) {
|
||||||
|
if(!SHAL_WAIT_FOR_CONDITION_MS((I2CPeripheral->ISR & I2C_ISR_TXIS) != 0, 100)){
|
||||||
|
SHAL_UART2.sendString("I2C timed out waiting for TX\r\n");
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
I2CPeripheral->TXDR = writeData[i];
|
||||||
|
}
|
||||||
|
|
||||||
|
//Wait until transfer complete
|
||||||
|
if(!SHAL_WAIT_FOR_CONDITION_MS((I2CPeripheral->ISR & I2C_ISR_TC) != 0, 100)){
|
||||||
|
SHAL_UART2.sendString("I2C timed out waiting for TC\r\n");
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
//Read phase
|
||||||
|
if (readLen > 0) {
|
||||||
|
|
||||||
|
SHAL_UART2.sendString("Read initiated\r\n");
|
||||||
|
|
||||||
|
I2CPeripheral->CR2 &= ~(I2C_CR2_NBYTES | I2C_CR2_SADD | I2C_CR2_RD_WRN);
|
||||||
|
I2CPeripheral->CR2 |= (addr << 1) |
|
||||||
|
I2C_CR2_RD_WRN |
|
||||||
|
(readLen << I2C_CR2_NBYTES_Pos) |
|
||||||
|
I2C_CR2_START | I2C_CR2_AUTOEND;
|
||||||
|
|
||||||
|
for (size_t i = 0; i < readLen; i++) {
|
||||||
|
if(!SHAL_WAIT_FOR_CONDITION_MS((I2CPeripheral->ISR & I2C_ISR_RXNE) != 0 , 100)){
|
||||||
|
SHAL_UART2.sendString("I2C timed out waiting for RXNE\r\n");
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
SHAL_UART2.sendString("Read byte");
|
||||||
|
readData[i] = static_cast<uint8_t>(I2CPeripheral->RXDR);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
else{
|
||||||
|
I2CPeripheral->CR2 |= I2C_CR2_STOP;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void SHAL_I2C::masterWrite(uint8_t addr, const uint8_t *writeData, uint8_t writeLen) {
|
||||||
|
masterWriteRead(addr,writeData,writeLen,nullptr,0);
|
||||||
|
}
|
||||||
|
|
||||||
|
void SHAL_I2C::masterRead(uint8_t addr, uint8_t *readBuffer, uint8_t bytesToRead) {
|
||||||
|
masterWriteRead(addr,nullptr,0,readBuffer,bytesToRead);
|
||||||
|
}
|
||||||
|
|
||||||
|
uint8_t SHAL_I2C::masterWriteReadByte(uint8_t addr, const uint8_t *writeData, size_t writeLen) {
|
||||||
|
uint8_t val = 0;
|
||||||
|
masterWriteRead(addr, writeData, writeLen, &val, 1);
|
||||||
|
return val;
|
||||||
|
}
|
||||||
|
|
||||||
|
SHAL_I2C& I2CManager::get(uint8_t I2CBus) {
|
||||||
|
|
||||||
|
if(I2CBus > NUM_I2C_BUSES - 1){
|
||||||
|
assert(false);
|
||||||
|
//Memory fault
|
||||||
|
}
|
||||||
|
|
||||||
|
return m_I2CBuses[I2CBus];
|
||||||
|
}
|
||||||
@@ -6,8 +6,7 @@
|
|||||||
#include <cassert>
|
#include <cassert>
|
||||||
|
|
||||||
Timer::Timer(Timer_Key t) : TIMER_KEY(t){
|
Timer::Timer(Timer_Key t) : TIMER_KEY(t){
|
||||||
SHAL_Peripheral_Register rcc = getTimerRCC(TIMER_KEY);
|
|
||||||
*rcc.reg |= (1 << rcc.offset);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
Timer::Timer() : TIMER_KEY(Timer_Key::S_TIM_INVALID){
|
Timer::Timer() : TIMER_KEY(Timer_Key::S_TIM_INVALID){
|
||||||
@@ -37,6 +36,14 @@ void Timer::enableInterrupt() {
|
|||||||
NVIC_EnableIRQ(getIRQn(TIMER_KEY));
|
NVIC_EnableIRQ(getIRQn(TIMER_KEY));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void Timer::init(uint32_t prescaler, uint32_t autoReload) {
|
||||||
|
TIM_RCC_Enable rcc = getTimerRCC(TIMER_KEY);
|
||||||
|
*rcc.busEnableReg |= (1 << rcc.offset);
|
||||||
|
|
||||||
|
setPrescaler(prescaler);
|
||||||
|
setARR(autoReload);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
Timer &TimerManager::get(Timer_Key timer_key) {
|
Timer &TimerManager::get(Timer_Key timer_key) {
|
||||||
|
|
||||||
@@ -52,3 +59,5 @@ Timer &TimerManager::get(Timer_Key timer_key) {
|
|||||||
|
|
||||||
return timers[static_cast<int>(timer_key)];
|
return timers[static_cast<int>(timer_key)];
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
75
SHAL/Src/STM32F0xx/Peripheral/UART/SHAL_UART.cpp
Normal file
75
SHAL/Src/STM32F0xx/Peripheral/UART/SHAL_UART.cpp
Normal file
@@ -0,0 +1,75 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file SHAL_TIM.h
|
||||||
|
* @author Luca Lizaranzu
|
||||||
|
* @brief Related to USART and SHAL_UART abstractions
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
#include "SHAL_UART.h"
|
||||||
|
#include "SHAL_GPIO.h"
|
||||||
|
|
||||||
|
void SHAL_UART::init(const UART_Pair_Key pair){
|
||||||
|
|
||||||
|
m_UARTPair = pair;
|
||||||
|
|
||||||
|
SHAL_UART_Pair uart_pair = getUARTPair(pair); //Get the UART_PAIR information to be initialized
|
||||||
|
|
||||||
|
//Get the SHAL_GPIO pins for this SHAL_UART setup
|
||||||
|
GPIO_Key Tx_Key = uart_pair.TxKey; //Tx pin
|
||||||
|
GPIO_Key Rx_Key = uart_pair.RxKey; //Rx pin
|
||||||
|
|
||||||
|
GET_GPIO(Tx_Key).setPinMode(PinMode::ALTERNATE_FUNCTION_MODE);
|
||||||
|
GET_GPIO(Rx_Key).setPinMode(PinMode::ALTERNATE_FUNCTION_MODE);
|
||||||
|
|
||||||
|
GET_GPIO(Tx_Key).setAlternateFunction(uart_pair.TxAlternateFunctionMask);
|
||||||
|
GET_GPIO(Rx_Key).setAlternateFunction(uart_pair.RxAlternateFunctionMask);
|
||||||
|
|
||||||
|
SHAL_UART_Enable_Register pairUARTEnable = getUARTEnableReg(pair); //Register and mask to enable the SHAL_UART channel
|
||||||
|
|
||||||
|
*pairUARTEnable.reg |= pairUARTEnable.mask; //Enable SHAL_UART line
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
void SHAL_UART::begin(uint32_t baudRate) volatile {
|
||||||
|
|
||||||
|
USART_TypeDef* usart = getUARTPair(m_UARTPair).USARTReg;
|
||||||
|
|
||||||
|
usart->CR1 &= ~USART_CR1_UE; //Disable USART
|
||||||
|
|
||||||
|
usart->CR1 = 0; //Clear USART config
|
||||||
|
|
||||||
|
usart->CR1 = USART_CR1_TE | USART_CR1_RE; //Tx enable and Rx Enable
|
||||||
|
|
||||||
|
usart->BRR = 8000000 / baudRate; //MAKE SURE ANY FUNCTION THAT CHANGES CLOCK UPDATES THIS! //TODO DO NOT HARDCODE THIS SHIT
|
||||||
|
|
||||||
|
usart->CR1 |= USART_CR1_UE;
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
void SHAL_UART::sendString(const char *s) volatile {
|
||||||
|
while (*s) sendChar(*s++); //Send chars while we haven't reached end of s
|
||||||
|
}
|
||||||
|
|
||||||
|
void SHAL_UART::sendChar(char c) volatile {
|
||||||
|
|
||||||
|
USART_TypeDef* usart = getUARTPair(m_UARTPair).USARTReg;
|
||||||
|
|
||||||
|
while(!(usart->ISR & USART_ISR_TXE)); //Wait for usart to finish what it's doing
|
||||||
|
|
||||||
|
usart->TDR = c; //Send character
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
SHAL_UART& UARTManager::get(uint8_t uart) {
|
||||||
|
|
||||||
|
if(uart > NUM_USART_LINES - 1){
|
||||||
|
assert(false);
|
||||||
|
//Memory fault
|
||||||
|
}
|
||||||
|
|
||||||
|
return m_UARTs[uart];
|
||||||
|
}
|
||||||
@@ -91,11 +91,6 @@
|
|||||||
*/
|
*/
|
||||||
/* This variable is updated in three ways:
|
/* This variable is updated in three ways:
|
||||||
1) by calling CMSIS function SystemCoreClockUpdate()
|
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||||
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
|
||||||
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
|
||||||
Note: If you use this function to configure the system clock; then there
|
|
||||||
is no need to call the 2 first functions listed above, since SystemCoreClock
|
|
||||||
variable is updated automatically.
|
|
||||||
*/
|
*/
|
||||||
uint32_t SystemCoreClock = 8000000;
|
uint32_t SystemCoreClock = 8000000;
|
||||||
|
|
||||||
63
SHAL/Src/STM32L4xx/Core/SHAL_CORE.cpp
Normal file
63
SHAL/Src/STM32L4xx/Core/SHAL_CORE.cpp
Normal file
@@ -0,0 +1,63 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 9/15/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#include <cstdio>
|
||||||
|
|
||||||
|
#include "SHAL_CORE.h"
|
||||||
|
#include "SHAL_GPIO.h"
|
||||||
|
#include "SHAL_ADC.h"
|
||||||
|
#include "SHAL_UART.h"
|
||||||
|
|
||||||
|
void SHAL_init(){
|
||||||
|
systick_init();
|
||||||
|
|
||||||
|
|
||||||
|
for(auto i = static_cast<uint8_t>(ADC_Key::S_ADC1); i < static_cast<uint8_t>(ADC_Key::NUM_ADC); i++){ //Init all ADCs
|
||||||
|
auto adc_key = static_cast<ADC_Key>(i);
|
||||||
|
|
||||||
|
ADCManager::getByIndex(i).init(adc_key);
|
||||||
|
}
|
||||||
|
|
||||||
|
SET_ANALOGREAD_ADC(SHAL_ADC1); //Default ADC1 for analogread calls
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
void systick_init(){
|
||||||
|
SysTick->CTRL = 0; //Disable first
|
||||||
|
SysTick->LOAD = 0xFFFFFF; //Max 24-bit
|
||||||
|
SysTick->VAL = 0; //Clear
|
||||||
|
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
void SHAL_delay_us(uint32_t us){
|
||||||
|
uint32_t ticks = us * (SystemCoreClock / 1000000U);
|
||||||
|
uint32_t start = SysTick->VAL;
|
||||||
|
|
||||||
|
//Calculate target value (may wrap around)
|
||||||
|
uint32_t target = (start >= ticks) ? (start - ticks) : (start + 0x01000000 - ticks);
|
||||||
|
target &= 0x00FFFFFF;
|
||||||
|
|
||||||
|
//Wait until we reach the target
|
||||||
|
if (start >= ticks) {
|
||||||
|
//No wraparound case
|
||||||
|
while (SysTick->VAL > target) {}
|
||||||
|
} else {
|
||||||
|
while (SysTick->VAL <= start) {} //Wait for wraparound
|
||||||
|
while (SysTick->VAL > target) {} //Wait for target
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void SHAL_delay_ms(uint32_t ms){
|
||||||
|
while(ms-- > 0){
|
||||||
|
SHAL_delay_us(1000);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void SHAL_print_register(const volatile uint32_t* reg){
|
||||||
|
char buff[32];
|
||||||
|
sprintf(buff, "0x%08lX\r\n", (unsigned long)(*reg));
|
||||||
|
SHAL_UART2.sendString(buff);
|
||||||
|
}
|
||||||
47
SHAL/Src/STM32L4xx/EXT/SHAL_EXTI_CALLBACK.cpp
Normal file
47
SHAL/Src/STM32L4xx/EXT/SHAL_EXTI_CALLBACK.cpp
Normal file
@@ -0,0 +1,47 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 9/3/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#include "SHAL_EXTI_CALLBACK.h"
|
||||||
|
|
||||||
|
|
||||||
|
#if defined(STM32L412xx)
|
||||||
|
#elif defined(STM32L422xx)
|
||||||
|
#elif defined(STM32L431xx)
|
||||||
|
#elif defined(STM32L432xx)
|
||||||
|
DEFINE_EXTI_IRQ(0);
|
||||||
|
DEFINE_EXTI_IRQ(1);
|
||||||
|
DEFINE_EXTI_IRQ(2);
|
||||||
|
DEFINE_EXTI_IRQ(3);
|
||||||
|
DEFINE_EXTI_IRQ(4);
|
||||||
|
DEFINE_MULTI_EXTI_IRQ(5,9);
|
||||||
|
DEFINE_MULTI_EXTI_IRQ(10,15);
|
||||||
|
#elif defined(STM32L433xx)
|
||||||
|
#elif defined(STM32L442xx)
|
||||||
|
#elif defined(STM32L443xx)
|
||||||
|
#elif defined(STM32L451xx)
|
||||||
|
#elif defined(STM32L452xx)
|
||||||
|
#elif defined(STM32L462xx)
|
||||||
|
#elif defined(STM32L471xx)
|
||||||
|
#elif defined(STM32L475xx)
|
||||||
|
#elif defined(STM32L476xx)
|
||||||
|
#elif defined(STM32L485xx)
|
||||||
|
#elif defined(STM32L486xx)
|
||||||
|
#elif defined(STM32L496xx)
|
||||||
|
#elif defined(STM32L4A6xx)
|
||||||
|
#elif defined(STM32L4P5xx)
|
||||||
|
#elif defined(STM32L4Q5xx)
|
||||||
|
#elif defined(STM32L4R5xx)
|
||||||
|
#elif defined(STM32L4R7xx)
|
||||||
|
#elif defined(STM32L4R9xx)
|
||||||
|
#elif defined(STM32L4S5xx)
|
||||||
|
#elif defined(STM32L4S7xx)
|
||||||
|
#elif defined(STM32L4S9xx)
|
||||||
|
#error "Please select first the target STM32L4xx device used in your application (in stm32f0xx.h file)"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
//Link function to EXTI line
|
||||||
|
void registerEXTICallback(GPIO_Key key, EXTICallback callback){
|
||||||
|
EXTI_callbacks[getGPIOPinNumber(key)] = callback;
|
||||||
|
}
|
||||||
308
SHAL/Src/STM32L4xx/Peripheral/ADC/SHAL_ADC.cpp
Normal file
308
SHAL/Src/STM32L4xx/Peripheral/ADC/SHAL_ADC.cpp
Normal file
@@ -0,0 +1,308 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 9/21/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#include "SHAL_ADC.h"
|
||||||
|
#include "SHAL_GPIO.h"
|
||||||
|
#include "SHAL_UART.h"
|
||||||
|
#include <cstdio>
|
||||||
|
|
||||||
|
SHAL_Result SHAL_ADC::init(ADC_Key key) {
|
||||||
|
|
||||||
|
m_ADCKey = key;
|
||||||
|
|
||||||
|
if(!isValid()){
|
||||||
|
SHAL_UART2.sendString("Not valid\r\n");
|
||||||
|
return SHAL_Result::ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
SHAL_ADC_RCC_Enable_Reg clock_reg = getADCRCCEnableRegister(m_ADCKey); //Clock enable
|
||||||
|
|
||||||
|
SHAL_apply_bitmask(clock_reg.reg,clock_reg.mask);
|
||||||
|
|
||||||
|
auto clock_select_register = getADCClockSelectRegister();
|
||||||
|
|
||||||
|
SHAL_set_bits(clock_select_register.reg, 2, static_cast<uint32_t>(ADC_Clock_Source::SHAL_SYSCLK),clock_select_register.offset); //Set ADC clock
|
||||||
|
|
||||||
|
wakeFromDeepSleep();
|
||||||
|
|
||||||
|
if(calibrate() != SHAL_Result::OKAY){ //Calibrate
|
||||||
|
SHAL_UART2.sendString("Calibration failed");
|
||||||
|
return SHAL_Result::ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
if(enable() != SHAL_Result::OKAY){
|
||||||
|
SHAL_UART2.sendString("Could not enable from init\r\n");
|
||||||
|
return SHAL_Result::ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
configureAlignment(SHAL_ADC_Alignment::RIGHT);
|
||||||
|
configureResolution(SHAL_ADC_Resolution::B12);
|
||||||
|
|
||||||
|
return SHAL_Result::OKAY;
|
||||||
|
}
|
||||||
|
|
||||||
|
SHAL_Result SHAL_ADC::calibrate() {
|
||||||
|
SHAL_ADC_Control_Reg control_reg = getADCControlReg(m_ADCKey);
|
||||||
|
|
||||||
|
if(disable() != SHAL_Result::OKAY){
|
||||||
|
return SHAL_Result::ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
SHAL_delay_us(1000);
|
||||||
|
|
||||||
|
if ((*control_reg.reg & (control_reg.enable_mask | control_reg.disable_mask)) != 0) {
|
||||||
|
return SHAL_Result::ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
SHAL_clear_bitmask(control_reg.reg, control_reg.differential_mode_mask);
|
||||||
|
|
||||||
|
SHAL_apply_bitmask(control_reg.reg, control_reg.calibration_mask);
|
||||||
|
|
||||||
|
if ((*control_reg.reg & control_reg.calibration_mask) == 0) {
|
||||||
|
return SHAL_Result::ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (!SHAL_WAIT_FOR_CONDITION_US(((*control_reg.reg & control_reg.calibration_mask) != 0),500)) { //Wait for conversion
|
||||||
|
return SHAL_Result::ERROR; //Failed sequence
|
||||||
|
}
|
||||||
|
|
||||||
|
SHAL_UART2.sendString("Calibration OK\r\n");
|
||||||
|
return SHAL_Result::OKAY;
|
||||||
|
}
|
||||||
|
|
||||||
|
uint16_t SHAL_ADC::singleConvertSingle(SHAL_ADC_Channel channel, SHAL_ADC_SampleTime time) {
|
||||||
|
auto data_reg = getADCDataReg(m_ADCKey);
|
||||||
|
auto ISR_reg = getADCISRReg(m_ADCKey);
|
||||||
|
auto config_reg = getADCConfigReg(m_ADCKey);
|
||||||
|
|
||||||
|
SHAL_clear_bitmask(config_reg.reg, config_reg.continuous_mode_mask);
|
||||||
|
|
||||||
|
auto sampleTimeReg = getADCChannelSamplingTimeRegister(m_ADCKey, channel);
|
||||||
|
SHAL_set_bits(sampleTimeReg.reg, 3, static_cast<uint8_t>(time), sampleTimeReg.channel_offset);
|
||||||
|
|
||||||
|
addADCChannelToSequence(channel, 0);
|
||||||
|
if(setADCSequenceAmount(1) == SHAL_Result::ERROR) { return 0; }
|
||||||
|
|
||||||
|
if(enable() != SHAL_Result::OKAY) {
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
// CRITICAL: Clear ALL relevant flags before starting
|
||||||
|
SHAL_apply_bitmask(ISR_reg.reg, ISR_reg.end_of_sequence_mask);
|
||||||
|
SHAL_apply_bitmask(ISR_reg.reg, ISR_reg.end_of_conversion_mask);
|
||||||
|
if(ISR_reg.overrun_mask) {
|
||||||
|
SHAL_apply_bitmask(ISR_reg.reg, ISR_reg.overrun_mask);
|
||||||
|
}
|
||||||
|
|
||||||
|
volatile uint16_t dummy = *data_reg.reg;
|
||||||
|
(void)dummy;
|
||||||
|
|
||||||
|
startConversion();
|
||||||
|
|
||||||
|
if(!SHAL_WAIT_FOR_CONDITION_US(((*ISR_reg.reg & ISR_reg.end_of_conversion_mask) != 0), 2000)) {
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
uint16_t result = *data_reg.reg;
|
||||||
|
|
||||||
|
SHAL_apply_bitmask(ISR_reg.reg, ISR_reg.end_of_conversion_mask);
|
||||||
|
SHAL_apply_bitmask(ISR_reg.reg, ISR_reg.end_of_sequence_mask);
|
||||||
|
|
||||||
|
return result;
|
||||||
|
}
|
||||||
|
|
||||||
|
SHAL_Result SHAL_ADC::multiConvertSingle(SHAL_ADC_Channel* channels, const int numChannels, uint16_t* result, SHAL_ADC_SampleTime time) {
|
||||||
|
auto data_reg = getADCDataReg(m_ADCKey); //Where our output will be stored
|
||||||
|
|
||||||
|
setADCSequenceAmount(numChannels); //Convert the correct amount of channels
|
||||||
|
|
||||||
|
for(int i = 0; i < numChannels; i++){
|
||||||
|
auto channel = channels[i];
|
||||||
|
|
||||||
|
auto sampleTimeReg = getADCChannelSamplingTimeRegister(m_ADCKey,channel);
|
||||||
|
|
||||||
|
SHAL_set_bits(sampleTimeReg.reg,3,static_cast<uint8_t>(time),sampleTimeReg.channel_offset); //Set sample time register TODO un-hardcode bit width?
|
||||||
|
|
||||||
|
addADCChannelToSequence(channel,i); //Use index 0 to convert channel
|
||||||
|
}
|
||||||
|
|
||||||
|
startConversion(); //Start ADC conversion
|
||||||
|
|
||||||
|
auto ISR_reg = getADCISRReg(m_ADCKey);
|
||||||
|
|
||||||
|
for(int i = 0; i < numChannels; i++) {
|
||||||
|
if (!SHAL_WAIT_FOR_CONDITION_US(((*ISR_reg.reg & ISR_reg.end_of_conversion_mask) != 0),500)) { //Wait for conversion
|
||||||
|
return SHAL_Result::ERROR; //Failed conversion
|
||||||
|
}
|
||||||
|
result[i] = *data_reg.reg;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (!SHAL_WAIT_FOR_CONDITION_US(((*ISR_reg.reg & ISR_reg.end_of_sequence_mask) != 0),500)) { //Wait for conversion
|
||||||
|
return SHAL_Result::ERROR; //Failed sequence
|
||||||
|
}
|
||||||
|
|
||||||
|
return SHAL_Result::OKAY;
|
||||||
|
}
|
||||||
|
|
||||||
|
SHAL_Result SHAL_ADC::enable() {
|
||||||
|
if(!isValid()){
|
||||||
|
SHAL_UART2.sendString("Enable failed: Invalid \r\n");
|
||||||
|
return SHAL_Result::ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
SHAL_ADC_Control_Reg control_reg = getADCControlReg(m_ADCKey);
|
||||||
|
SHAL_ADC_ISR_Reg ISR_reg = getADCISRReg(m_ADCKey);
|
||||||
|
|
||||||
|
if(!SHAL_WAIT_FOR_CONDITION_MS((*control_reg.reg & control_reg.calibration_mask) == 0, 100)) {
|
||||||
|
return SHAL_Result::ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (*control_reg.reg & control_reg.enable_mask) {
|
||||||
|
return SHAL_Result::OKAY; //Not an error
|
||||||
|
}
|
||||||
|
|
||||||
|
if (*control_reg.reg & control_reg.disable_mask) {
|
||||||
|
return SHAL_Result::ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
//Clear ADRDY flag by writing 1 to it
|
||||||
|
SHAL_apply_bitmask(ISR_reg.reg, ISR_reg.ready_mask);
|
||||||
|
|
||||||
|
//Enable the ADC by setting ADEN
|
||||||
|
SHAL_apply_bitmask(control_reg.reg, control_reg.enable_mask);
|
||||||
|
|
||||||
|
if(!SHAL_WAIT_FOR_CONDITION_MS((*ISR_reg.reg & ISR_reg.ready_mask) != 0, 100)) {
|
||||||
|
return SHAL_Result::ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
//Clear ADRDY again
|
||||||
|
SHAL_apply_bitmask(ISR_reg.reg, ISR_reg.ready_mask);
|
||||||
|
|
||||||
|
return SHAL_Result::OKAY;
|
||||||
|
}
|
||||||
|
|
||||||
|
SHAL_Result SHAL_ADC::wakeFromDeepSleep() {
|
||||||
|
SHAL_ADC_Control_Reg control_reg = getADCControlReg(m_ADCKey); //ADC Control register
|
||||||
|
|
||||||
|
SHAL_clear_bitmask(control_reg.reg,control_reg.deep_power_down_mask); //Wake ADC from sleep
|
||||||
|
|
||||||
|
SHAL_apply_bitmask(control_reg.reg,control_reg.voltage_regulator_mask);
|
||||||
|
|
||||||
|
SHAL_delay_us(50); //Wait for regulator to stabilize
|
||||||
|
|
||||||
|
return SHAL_Result::OKAY;
|
||||||
|
}
|
||||||
|
|
||||||
|
SHAL_Result SHAL_ADC::disable() {
|
||||||
|
if(!isValid()){
|
||||||
|
return SHAL_Result::ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
auto control_reg = getADCControlReg(m_ADCKey);
|
||||||
|
|
||||||
|
//Stop any ongoing conversion
|
||||||
|
if (*control_reg.reg & control_reg.start_mask) {
|
||||||
|
SHAL_apply_bitmask(control_reg.reg, control_reg.stop_mask);
|
||||||
|
}
|
||||||
|
|
||||||
|
//Only disable if ADC is enabled otherwise it hangs
|
||||||
|
if (*control_reg.reg & control_reg.enable_mask) {
|
||||||
|
SHAL_apply_bitmask(control_reg.reg, control_reg.disable_mask);
|
||||||
|
|
||||||
|
if (!SHAL_WAIT_FOR_CONDITION_MS(((*control_reg.reg & (control_reg.enable_mask | control_reg.disable_mask)) == 0),500)){
|
||||||
|
return SHAL_Result::ERROR;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
return SHAL_Result::OKAY;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
SHAL_Result SHAL_ADC::startConversion() {
|
||||||
|
auto control_reg = getADCControlReg(m_ADCKey);
|
||||||
|
|
||||||
|
SHAL_apply_bitmask(control_reg.reg,control_reg.start_mask);
|
||||||
|
|
||||||
|
return SHAL_Result::OKAY;
|
||||||
|
}
|
||||||
|
|
||||||
|
bool SHAL_ADC::isValid() {
|
||||||
|
if(m_ADCKey == ADC_Key::INVALID || m_ADCKey == ADC_Key::NUM_ADC){
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
|
||||||
|
SHAL_Result SHAL_ADC::configureResolution(SHAL_ADC_Resolution resolution) {
|
||||||
|
if(!isValid()){
|
||||||
|
return SHAL_Result::ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
SHAL_ADC_Config_Reg config_reg = getADCConfigReg(m_ADCKey);
|
||||||
|
|
||||||
|
SHAL_set_bits(config_reg.reg,2,static_cast<uint8_t>(resolution),config_reg.resolution_offset);
|
||||||
|
|
||||||
|
return SHAL_Result::OKAY;
|
||||||
|
}
|
||||||
|
|
||||||
|
SHAL_Result SHAL_ADC::configureAlignment(SHAL_ADC_Alignment alignment) {
|
||||||
|
if(!isValid()){
|
||||||
|
return SHAL_Result::ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
SHAL_ADC_Config_Reg config_reg = getADCConfigReg(m_ADCKey);
|
||||||
|
|
||||||
|
//TODO check if this needs to be abstracted (Do other platforms have >2 resolution possibilities?
|
||||||
|
SHAL_set_bits(config_reg.reg,1,static_cast<uint8_t>(alignment),config_reg.alignment_offset);
|
||||||
|
|
||||||
|
return SHAL_Result::OKAY;
|
||||||
|
}
|
||||||
|
|
||||||
|
SHAL_Result SHAL_ADC::setADCSequenceAmount(uint32_t amount) {
|
||||||
|
if(!isValid()){return SHAL_Result::ERROR;}
|
||||||
|
|
||||||
|
if(amount == 0){
|
||||||
|
return SHAL_Result::ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
SHAL_ADC_Sequence_Amount_Reg sequence_amount_reg = getADCSequenceAmountRegister(m_ADCKey);
|
||||||
|
|
||||||
|
SHAL_set_bits(sequence_amount_reg.reg, 4, amount - 1, sequence_amount_reg.offset);
|
||||||
|
|
||||||
|
return SHAL_Result::OKAY;
|
||||||
|
}
|
||||||
|
|
||||||
|
SHAL_Result SHAL_ADC::addADCChannelToSequence(SHAL_ADC_Channel channel, uint32_t index) {
|
||||||
|
if(!isValid()) { return SHAL_Result::ERROR; }
|
||||||
|
|
||||||
|
auto sequenceRegisters = getADCSequenceRegisters(m_ADCKey);
|
||||||
|
auto channelNum = static_cast<uint8_t>(channel);
|
||||||
|
|
||||||
|
uint32_t bitSection = (index + 1) % 5;
|
||||||
|
uint32_t sequenceRegNumber = (index + 1) / 5;
|
||||||
|
|
||||||
|
volatile uint32_t* sequenceReg = sequenceRegisters.regs[sequenceRegNumber];
|
||||||
|
uint32_t bitSectionOffset = sequenceRegisters.offsets[bitSection];
|
||||||
|
|
||||||
|
// Clear only the specific 5 bits we're setting, not the entire register
|
||||||
|
uint32_t clearMask = ~(0x1F << bitSectionOffset);
|
||||||
|
*sequenceReg &= clearMask;
|
||||||
|
|
||||||
|
// Set the new channel number
|
||||||
|
*sequenceReg |= (channelNum << bitSectionOffset);
|
||||||
|
|
||||||
|
return SHAL_Result::OKAY;
|
||||||
|
}
|
||||||
|
|
||||||
|
SHAL_ADC &ADCManager::get(ADC_Key key) {
|
||||||
|
return m_ADCs[static_cast<uint8_t>(key)];
|
||||||
|
}
|
||||||
|
|
||||||
|
SHAL_ADC& ADCManager::getByIndex(int index) {
|
||||||
|
|
||||||
|
if(index < static_cast<int>(ADC_Key::NUM_ADC)){
|
||||||
|
return m_ADCs[index];
|
||||||
|
}
|
||||||
|
return m_ADCs[0];
|
||||||
|
}
|
||||||
126
SHAL/Src/STM32L4xx/Peripheral/GPIO/SHAL_GPIO.cpp
Normal file
126
SHAL/Src/STM32L4xx/Peripheral/GPIO/SHAL_GPIO.cpp
Normal file
@@ -0,0 +1,126 @@
|
|||||||
|
//
|
||||||
|
// Created by Luca on 8/30/2025.
|
||||||
|
//
|
||||||
|
|
||||||
|
#include <cstdio>
|
||||||
|
#include "SHAL_GPIO.h"
|
||||||
|
#include "SHAL_EXTI_CALLBACK.h"
|
||||||
|
|
||||||
|
#include "SHAL_UART.h"
|
||||||
|
|
||||||
|
SHAL_GPIO::SHAL_GPIO() : m_GPIO_KEY(GPIO_Key::INVALID){
|
||||||
|
//Do not initialize anything
|
||||||
|
}
|
||||||
|
|
||||||
|
SHAL_GPIO::SHAL_GPIO(GPIO_Key key) : m_GPIO_KEY(key) {
|
||||||
|
|
||||||
|
volatile unsigned long* gpioEnable = getGPIORCCEnable(key).reg;
|
||||||
|
unsigned long gpioOffset = getGPIORCCEnable(key).offset;
|
||||||
|
|
||||||
|
*gpioEnable |= (1 << gpioOffset); //Set enable flag
|
||||||
|
}
|
||||||
|
|
||||||
|
void SHAL_GPIO::setLow() {
|
||||||
|
auto outputDataReg = getGPIOOutputDataRegister(m_GPIO_KEY);
|
||||||
|
SHAL_set_bits(outputDataReg.reg,1,0,outputDataReg.offset);
|
||||||
|
}
|
||||||
|
|
||||||
|
void SHAL_GPIO::setHigh() {
|
||||||
|
auto outputDataReg = getGPIOOutputDataRegister(m_GPIO_KEY);
|
||||||
|
SHAL_set_bits(outputDataReg.reg,1,1,outputDataReg.offset);
|
||||||
|
}
|
||||||
|
|
||||||
|
void SHAL_GPIO::toggle() volatile {
|
||||||
|
auto outputDataReg = getGPIOOutputDataRegister(m_GPIO_KEY);
|
||||||
|
SHAL_flip_bits(outputDataReg.reg,1,outputDataReg.offset);
|
||||||
|
}
|
||||||
|
|
||||||
|
void SHAL_GPIO::setOutputType(PinType type) volatile {
|
||||||
|
auto outputTypeReg = getGPIOOutputTypeRegister(m_GPIO_KEY);
|
||||||
|
SHAL_set_bits(outputTypeReg.reg,2,static_cast<uint8_t>(type),outputTypeReg.offset);
|
||||||
|
}
|
||||||
|
|
||||||
|
void SHAL_GPIO::setOutputSpeed(OutputSpeed speed) volatile {
|
||||||
|
auto outputSpeedReg = getGPIOOutputSpeedRegister(m_GPIO_KEY);
|
||||||
|
SHAL_set_bits(outputSpeedReg.reg,2,static_cast<uint8_t>(speed),outputSpeedReg.offset);
|
||||||
|
}
|
||||||
|
|
||||||
|
void SHAL_GPIO::setInternalResistor(InternalResistorType type) volatile {
|
||||||
|
auto pupdreg = getGPIOPUPDRegister(m_GPIO_KEY);
|
||||||
|
SHAL_set_bits(pupdreg.reg,2,static_cast<uint8_t>(type),pupdreg.offset);
|
||||||
|
}
|
||||||
|
|
||||||
|
void SHAL_GPIO::setAlternateFunction(GPIO_Alternate_Function AF) volatile {
|
||||||
|
auto alternateFunctionReg = getGPIOAlternateFunctionRegister(m_GPIO_KEY);
|
||||||
|
SHAL_set_bits(alternateFunctionReg.reg,4,static_cast<uint8_t>(AF),alternateFunctionReg.offset);
|
||||||
|
}
|
||||||
|
|
||||||
|
SHAL_Result SHAL_GPIO::setPinMode(PinMode mode) volatile {
|
||||||
|
auto pinModeReg = getGPIOModeRegister(m_GPIO_KEY);
|
||||||
|
|
||||||
|
if(mode == PinMode::ANALOG_MODE && getGPIOPortInfo(m_GPIO_KEY).ADCChannel == SHAL_ADC_Channel::NO_ADC_MAPPING){
|
||||||
|
char buff[100];
|
||||||
|
sprintf(buff, "Error: GPIO pin %d has no valid ADC mapping\r\n", static_cast<uint8_t>(m_GPIO_KEY));
|
||||||
|
SHAL_UART2.sendString(buff);
|
||||||
|
return SHAL_Result::ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
SHAL_set_bits(pinModeReg.reg,2,static_cast<uint8_t>(mode),pinModeReg.offset); //Set mode
|
||||||
|
|
||||||
|
return SHAL_Result::OKAY;
|
||||||
|
}
|
||||||
|
|
||||||
|
void SHAL_GPIO::useAsExternalInterrupt(TriggerMode mode, EXTICallback callback) {
|
||||||
|
|
||||||
|
|
||||||
|
/* ---- Connect PB6 to EXTI6 via SYSCFG ---- */
|
||||||
|
uint32_t port_b_val = 1; // 0=A, 1=B, 2=C, 3=D, etc.
|
||||||
|
SYSCFG->EXTICR[1] &= ~(0xFUL << 8); // Clear EXTI6 bits (bits 8-11)
|
||||||
|
SYSCFG->EXTICR[1] |= (port_b_val << 8); // Set EXTI6 to PB6
|
||||||
|
|
||||||
|
/* ---- Configure EXTI line 6 ---- */
|
||||||
|
EXTI->IMR1 |= (1UL << 6); // Unmask line 6
|
||||||
|
EXTI->RTSR1 |= (1UL << 6); // Rising trigger enable
|
||||||
|
EXTI->FTSR1 &= ~(1UL << 6); // Falling trigger disable
|
||||||
|
|
||||||
|
/* ---- Enable NVIC interrupt for EXTI lines [9:5] ---- */
|
||||||
|
NVIC_SetPriority(EXTI9_5_IRQn, 2);
|
||||||
|
NVIC_EnableIRQ(EXTI9_5_IRQn);
|
||||||
|
|
||||||
|
__enable_irq(); //Enable IRQ just in case
|
||||||
|
}
|
||||||
|
|
||||||
|
uint16_t SHAL_GPIO::analogRead(SHAL_ADC_SampleTime sampleTime) {
|
||||||
|
|
||||||
|
SHAL_ADC_Channel channel = getGPIOPortInfo(m_GPIO_KEY).ADCChannel;
|
||||||
|
|
||||||
|
return GPIOManager::getGPIOADC().singleConvertSingle(channel,sampleTime);
|
||||||
|
}
|
||||||
|
|
||||||
|
void SHAL_GPIO::setAlternateFunction(GPIO_Alternate_Function_Mapping AF) volatile {
|
||||||
|
setPinMode(PinMode::ALTERNATE_FUNCTION_MODE);
|
||||||
|
auto alternateFunctionReg = getGPIOAlternateFunctionRegister(m_GPIO_KEY);
|
||||||
|
SHAL_set_bits(alternateFunctionReg.reg,4,static_cast<uint8_t>(AF),alternateFunctionReg.offset);
|
||||||
|
}
|
||||||
|
|
||||||
|
uint16_t SHAL_GPIO::digitalRead() {
|
||||||
|
auto inputDataReg = getGPIOInputDataRegister(m_GPIO_KEY);
|
||||||
|
|
||||||
|
if((*inputDataReg.reg & (1 << 6)) != 0){
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
SHAL_GPIO& GPIOManager::get(GPIO_Key key) {
|
||||||
|
|
||||||
|
unsigned int gpioPort = getGPIOPortNumber(key);
|
||||||
|
uint8_t gpioPin = getGPIOPinNumber(key);
|
||||||
|
|
||||||
|
if (m_gpios[gpioPort][gpioPin].m_GPIO_KEY == GPIO_Key::INVALID){
|
||||||
|
m_gpios[gpioPort][gpioPin] = SHAL_GPIO(key);
|
||||||
|
}
|
||||||
|
|
||||||
|
return m_gpios[gpioPort][gpioPin];
|
||||||
|
}
|
||||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user